tree a6b8223a49b8383263930c1877b8bd5166de9192
parent 414bd9d5ebd7b665e3654a78b3281c1fdf01f36e
author Krish Sadhukhan <krish.sadhukhan@oracle.com> 1538073208 -0400
committer Paolo Bonzini <pbonzini@redhat.com> 1538413442 +0200

nVMX x86: Check PML and EPT on vmentry of L2 guests

According to section "Checks on VMX Controls" in Intel SDM vol 3C, the
following check needs to be enforced on vmentry of L2 guests:

    If the "enable PML" VM-execution control is 1, the "enable EPT"
    VM-execution control must also be 1. In addition, the PML address
    must satisfy the following checks:

      * Bits 11:0 of the address must be 0.
      * The address should not set any bits beyond the processor's
	physical-address width.

Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Reviewed-by: Mark Kanda <mark.kanda@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>