riscv: Rewrite hartid_to_cpu in assembly
Some SBI HSM tests run without a stack being setup so they can't
run C code. Those tests still need to know the corresponding cpuid
for the hartid on which they are running. Give those tests
hartid_to_cpu() by reimplementing it in assembly.
Signed-off-by: James Raphael Tiovalen <jamestiotio@gmail.com>
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
diff --git a/lib/riscv/asm-offsets.c b/lib/riscv/asm-offsets.c
index a2a3243..6c511c1 100644
--- a/lib/riscv/asm-offsets.c
+++ b/lib/riscv/asm-offsets.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only
#include <kbuild.h>
#include <elf.h>
+#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/smp.h>
@@ -58,5 +59,9 @@
OFFSET(SECONDARY_FUNC, secondary_data, func);
DEFINE(SECONDARY_DATA_SIZE, sizeof(struct secondary_data));
+ OFFSET(THREAD_INFO_CPU, thread_info, cpu);
+ OFFSET(THREAD_INFO_HARTID, thread_info, hartid);
+ DEFINE(THREAD_INFO_SIZE, sizeof(struct thread_info));
+
return 0;
}
diff --git a/lib/riscv/setup.c b/lib/riscv/setup.c
index 495db04..f347ad6 100644
--- a/lib/riscv/setup.c
+++ b/lib/riscv/setup.c
@@ -43,16 +43,6 @@
static struct mem_region riscv_mem_regions[NR_MEM_REGIONS + 1];
-int hartid_to_cpu(unsigned long hartid)
-{
- int cpu;
-
- for_each_present_cpu(cpu)
- if (cpus[cpu].hartid == hartid)
- return cpu;
- return -1;
-}
-
static void cpu_set_fdt(int fdtnode __unused, u64 regval, void *info __unused)
{
int cpu = nr_cpus++;
diff --git a/riscv/cstart.S b/riscv/cstart.S
index a9ac72d..bae1d2f 100644
--- a/riscv/cstart.S
+++ b/riscv/cstart.S
@@ -109,6 +109,30 @@
1: wfi
j 1b
+/*
+ * hartid_to_cpu
+ * a0 is a hartid on entry
+ * Returns, in a0, the corresponding cpuid, or -1 if no
+ * thread_info struct with 'hartid' is found.
+ */
+.balign 4
+.global hartid_to_cpu
+hartid_to_cpu:
+ la t0, cpus
+ la t1, nr_cpus
+ lw t1, 0(t1)
+ li t2, 0
+1: bne t2, t1, 2f
+ li a0, -1
+ ret
+2: REG_L t3, THREAD_INFO_HARTID(t0)
+ bne a0, t3, 3f
+ lw a0, THREAD_INFO_CPU(t0)
+ ret
+3: addi t0, t0, THREAD_INFO_SIZE
+ addi t2, t2, 1
+ j 1b
+
.balign 4
.global secondary_entry
secondary_entry:
