pci: Add helpers for BAR values and memory/IO space access
We're going to be checking the BAR type, the address written to it and if
access to memory or I/O space is enabled quite often when we add support
for reasignable BARs; make our life easier by adding helpers for it.
Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/1589470709-4104-3-git-send-email-alexandru.elisei@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
diff --git a/include/kvm/pci.h b/include/kvm/pci.h
index 2c29c09..0f0815b 100644
--- a/include/kvm/pci.h
+++ b/include/kvm/pci.h
@@ -5,6 +5,7 @@
#include <linux/kvm.h>
#include <linux/pci_regs.h>
#include <endian.h>
+#include <stdbool.h>
#include "kvm/devices.h"
#include "kvm/msi.h"
@@ -161,4 +162,56 @@
void *pci_find_cap(struct pci_device_header *hdr, u8 cap_type);
+static inline bool __pci__memory_space_enabled(u16 command)
+{
+ return command & PCI_COMMAND_MEMORY;
+}
+
+static inline bool pci__memory_space_enabled(struct pci_device_header *pci_hdr)
+{
+ return __pci__memory_space_enabled(pci_hdr->command);
+}
+
+static inline bool __pci__io_space_enabled(u16 command)
+{
+ return command & PCI_COMMAND_IO;
+}
+
+static inline bool pci__io_space_enabled(struct pci_device_header *pci_hdr)
+{
+ return __pci__io_space_enabled(pci_hdr->command);
+}
+
+static inline bool __pci__bar_is_io(u32 bar)
+{
+ return bar & PCI_BASE_ADDRESS_SPACE_IO;
+}
+
+static inline bool pci__bar_is_io(struct pci_device_header *pci_hdr, int bar_num)
+{
+ return __pci__bar_is_io(pci_hdr->bar[bar_num]);
+}
+
+static inline bool pci__bar_is_memory(struct pci_device_header *pci_hdr, int bar_num)
+{
+ return !pci__bar_is_io(pci_hdr, bar_num);
+}
+
+static inline u32 __pci__bar_address(u32 bar)
+{
+ if (__pci__bar_is_io(bar))
+ return bar & PCI_BASE_ADDRESS_IO_MASK;
+ return bar & PCI_BASE_ADDRESS_MEM_MASK;
+}
+
+static inline u32 pci__bar_address(struct pci_device_header *pci_hdr, int bar_num)
+{
+ return __pci__bar_address(pci_hdr->bar[bar_num]);
+}
+
+static inline u32 pci__bar_size(struct pci_device_header *pci_hdr, int bar_num)
+{
+ return pci_hdr->bar_size[bar_num];
+}
+
#endif /* KVM__PCI_H */
diff --git a/pci.c b/pci.c
index 3ecdd0f..81e9cec 100644
--- a/pci.c
+++ b/pci.c
@@ -185,7 +185,7 @@
* size, it will write the address back.
*/
if (bar < 6) {
- if (pci_hdr->bar[bar] & PCI_BASE_ADDRESS_SPACE_IO)
+ if (pci__bar_is_io(pci_hdr, bar))
mask = (u32)PCI_BASE_ADDRESS_IO_MASK;
else
mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
@@ -211,7 +211,7 @@
*/
memcpy(&value, data, size);
if (value == 0xffffffff)
- value = ~(pci_hdr->bar_size[bar] - 1);
+ value = ~(pci__bar_size(pci_hdr, bar) - 1);
/* Preserve the special bits. */
value = (value & mask) | (pci_hdr->bar[bar] & ~mask);
memcpy(base + offset, &value, size);
diff --git a/powerpc/spapr_pci.c b/powerpc/spapr_pci.c
index a15f7d8..7be44d9 100644
--- a/powerpc/spapr_pci.c
+++ b/powerpc/spapr_pci.c
@@ -369,7 +369,7 @@
of_pci_b_ddddd(devid) |
of_pci_b_fff(fn) |
of_pci_b_rrrrrrrr(bars[i]));
- reg[n+1].size = cpu_to_be64(hdr->bar_size[i]);
+ reg[n+1].size = cpu_to_be64(pci__bar_size(hdr, i));
reg[n+1].addr = 0;
assigned_addresses[n].phys_hi = cpu_to_be32(
