tree 83bbe318dee35f6b7c9bb98da0c37784c8f69886
parent a2537c98a8a3b57002e54a262d180b9490bc7190
author Mika Westerberg <mika.westerberg@linux.intel.com> 1651054750 +0300
committer Wolfram Sang <wsa@kernel.org> 1653130308 +0200

i2c: ismt: Provide a DMA buffer for Interrupt Cause Logging

Before sending a MSI the hardware writes information pertinent to the
interrupt cause to a memory location pointed by SMTICL register. This
memory holds three double words where the least significant bit tells
whether the interrupt cause of master/target/error is valid. The driver
does not use this but we need to set it up because otherwise it will
perform DMA write to the default address (0) and this will cause an
IOMMU fault such as below:

  DMAR: DRHD: handling fault status reg 2
  DMAR: [DMA Write] Request device [00:12.0] PASID ffffffff fault addr 0
        [fault reason 05] PTE Write access is not set

To prevent this from happening, provide a proper DMA buffer for this
that then gets mapped by the IOMMU accordingly.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>