commit | 04f605906ff00c649751519ca73d3058372cdc78 | [log] [tgz] |
---|---|---|
author | Eddie James <eajames@linux.ibm.com> | Wed Jan 15 15:29:40 2020 -0600 |
committer | Marc Zyngier <maz@kernel.org> | Mon Jan 20 19:10:04 2020 +0000 |
tree | 928670eb521c758578626d12b8186b8e987fda18 | |
parent | 5350a237b4525ad12170f16239c9e9c7797df02f [diff] |
irqchip: Add Aspeed SCU interrupt controller The Aspeed SOCs provide some interrupts through the System Control Unit registers. Add an interrupt controller that provides these interrupts to the system. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/1579123790-6894-3-git-send-email-eajames@linux.ibm.com