| commit | e80f0b6a2cf302b56b7d6d7ad3797aebc97fccb9 | [log] [tgz] |
|---|---|---|
| author | Mason Huo <mason.huo@starfivetech.com> | Tue Apr 04 11:29:08 2023 +0800 |
| committer | Marc Zyngier <maz@kernel.org> | Sat Apr 08 11:19:47 2023 +0100 |
| tree | ec9d8deba1acd1cfce07b45ceed8daed7711ddd0 | |
| parent | 9dfc77917e3b82dc7f93d62cebf1ebb885e9cc6a [diff] |
irqchip/irq-sifive-plic: Add syscore callbacks for hibernation The priority and enable registers of plic will be reset during hibernation power cycle in poweroff mode, add the syscore callbacks to save/restore those registers. Signed-off-by: Mason Huo <mason.huo@starfivetech.com> Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com> Reviewed-by: Sia Jee Heng <jeeheng.sia@starfivetech.com> Reported-by: Dan Carpenter <error27@gmail.com> Link: https://lore.kernel.org/r/202302140709.CdkxgtPi-lkp@intel.com/ Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230404032908.89638-1-mason.huo@starfivetech.com