| // SPDX-License-Identifier: GPL-2.0-or-later |
| // Copyright 2019 IBM Corp. |
| /dts-v1/; |
| |
| #include "aspeed-g6.dtsi" |
| #include <dt-bindings/gpio/aspeed-gpio.h> |
| #include <dt-bindings/i2c/i2c.h> |
| #include <dt-bindings/leds/leds-pca955x.h> |
| |
| / { |
| model = "Rainier 2U"; |
| compatible = "ibm,rainier-bmc", "aspeed,ast2600"; |
| |
| aliases { |
| i2c100 = &cfam0_i2c0; |
| i2c101 = &cfam0_i2c1; |
| i2c110 = &cfam0_i2c10; |
| i2c111 = &cfam0_i2c11; |
| i2c112 = &cfam0_i2c12; |
| i2c113 = &cfam0_i2c13; |
| i2c114 = &cfam0_i2c14; |
| i2c115 = &cfam0_i2c15; |
| i2c202 = &cfam1_i2c2; |
| i2c203 = &cfam1_i2c3; |
| i2c210 = &cfam1_i2c10; |
| i2c211 = &cfam1_i2c11; |
| i2c214 = &cfam1_i2c14; |
| i2c215 = &cfam1_i2c15; |
| i2c216 = &cfam1_i2c16; |
| i2c217 = &cfam1_i2c17; |
| i2c300 = &cfam2_i2c0; |
| i2c301 = &cfam2_i2c1; |
| i2c310 = &cfam2_i2c10; |
| i2c311 = &cfam2_i2c11; |
| i2c312 = &cfam2_i2c12; |
| i2c313 = &cfam2_i2c13; |
| i2c314 = &cfam2_i2c14; |
| i2c315 = &cfam2_i2c15; |
| i2c402 = &cfam3_i2c2; |
| i2c403 = &cfam3_i2c3; |
| i2c410 = &cfam3_i2c10; |
| i2c411 = &cfam3_i2c11; |
| i2c414 = &cfam3_i2c14; |
| i2c415 = &cfam3_i2c15; |
| i2c416 = &cfam3_i2c16; |
| i2c417 = &cfam3_i2c17; |
| |
| serial4 = &uart5; |
| i2c16 = &i2c2mux0; |
| i2c17 = &i2c2mux1; |
| i2c18 = &i2c2mux2; |
| i2c19 = &i2c2mux3; |
| i2c20 = &i2c4mux0chn0; |
| i2c21 = &i2c4mux0chn1; |
| i2c22 = &i2c4mux0chn2; |
| i2c23 = &i2c5mux0chn0; |
| i2c24 = &i2c5mux0chn1; |
| i2c25 = &i2c6mux0chn0; |
| i2c26 = &i2c6mux0chn1; |
| i2c27 = &i2c6mux0chn2; |
| i2c28 = &i2c6mux0chn3; |
| i2c29 = &i2c11mux0chn0; |
| i2c30 = &i2c11mux0chn1; |
| |
| spi10 = &cfam0_spi0; |
| spi11 = &cfam0_spi1; |
| spi12 = &cfam0_spi2; |
| spi13 = &cfam0_spi3; |
| spi20 = &cfam1_spi0; |
| spi21 = &cfam1_spi1; |
| spi22 = &cfam1_spi2; |
| spi23 = &cfam1_spi3; |
| spi30 = &cfam2_spi0; |
| spi31 = &cfam2_spi1; |
| spi32 = &cfam2_spi2; |
| spi33 = &cfam2_spi3; |
| spi40 = &cfam3_spi0; |
| spi41 = &cfam3_spi1; |
| spi42 = &cfam3_spi2; |
| spi43 = &cfam3_spi3; |
| }; |
| |
| chosen { |
| stdout-path = &uart5; |
| bootargs = "console=ttyS4,115200n8"; |
| }; |
| |
| memory@80000000 { |
| device_type = "memory"; |
| reg = <0x80000000 0x40000000>; |
| }; |
| |
| reserved-memory { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| |
| flash_memory: region@b8000000 { |
| no-map; |
| reg = <0xb8000000 0x04000000>; /* 64M */ |
| }; |
| |
| ramoops@bc000000 { |
| compatible = "ramoops"; |
| reg = <0xbc000000 0x180000>; /* 16 * (3 * 0x8000) */ |
| record-size = <0x8000>; |
| console-size = <0x8000>; |
| pmsg-size = <0x8000>; |
| max-reason = <3>; /* KMSG_DUMP_EMERG */ |
| }; |
| |
| vga_memory: region@bf000000 { |
| no-map; |
| compatible = "shared-dma-pool"; |
| reg = <0xbf000000 0x01000000>; /* 16M */ |
| }; |
| }; |
| |
| gpio-keys { |
| compatible = "gpio-keys"; |
| |
| ps0-presence { |
| label = "ps0-presence"; |
| gpios = <&gpio0 ASPEED_GPIO(S, 0) GPIO_ACTIVE_LOW>; |
| linux,code = <ASPEED_GPIO(S, 0)>; |
| }; |
| |
| ps1-presence { |
| label = "ps1-presence"; |
| gpios = <&gpio0 ASPEED_GPIO(S, 1) GPIO_ACTIVE_LOW>; |
| linux,code = <ASPEED_GPIO(S, 1)>; |
| }; |
| |
| ps2-presence { |
| label = "ps2-presence"; |
| gpios = <&gpio0 ASPEED_GPIO(S, 2) GPIO_ACTIVE_LOW>; |
| linux,code = <ASPEED_GPIO(S, 2)>; |
| }; |
| |
| ps3-presence { |
| label = "ps3-presence"; |
| gpios = <&gpio0 ASPEED_GPIO(S, 3) GPIO_ACTIVE_LOW>; |
| linux,code = <ASPEED_GPIO(S, 3)>; |
| }; |
| }; |
| |
| i2c2mux: i2cmux { |
| compatible = "i2c-mux-gpio"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "okay"; |
| |
| i2c-parent = <&i2c2>; |
| mux-gpios = <&gpio0 ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>, |
| <&gpio0 ASPEED_GPIO(G, 5) GPIO_ACTIVE_HIGH>; |
| idle-state = <0>; |
| |
| i2c2mux0: i2c@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0>; |
| }; |
| |
| i2c2mux1: i2c@1 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <1>; |
| }; |
| |
| i2c2mux2: i2c@2 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <2>; |
| }; |
| |
| i2c2mux3: i2c@3 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <3>; |
| }; |
| }; |
| |
| leds { |
| compatible = "gpio-leds"; |
| |
| /* BMC Card fault LED at the back */ |
| bmc-ingraham0 { |
| gpios = <&gpio0 ASPEED_GPIO(H, 1) GPIO_ACTIVE_LOW>; |
| }; |
| |
| /* Enclosure ID LED at the back */ |
| rear-enc-id0 { |
| gpios = <&gpio0 ASPEED_GPIO(H, 2) GPIO_ACTIVE_LOW>; |
| }; |
| |
| /* Enclosure fault LED at the back */ |
| rear-enc-fault0 { |
| gpios = <&gpio0 ASPEED_GPIO(H, 3) GPIO_ACTIVE_LOW>; |
| }; |
| |
| /* PCIE slot power LED */ |
| pcieslot-power { |
| gpios = <&gpio0 ASPEED_GPIO(P, 4) GPIO_ACTIVE_LOW>; |
| }; |
| }; |
| |
| gpio-keys-polled { |
| compatible = "gpio-keys-polled"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| poll-interval = <1000>; |
| |
| fan0-presence { |
| label = "fan0-presence"; |
| gpios = <&pca0 6 GPIO_ACTIVE_LOW>; |
| linux,code = <6>; |
| }; |
| |
| fan1-presence { |
| label = "fan1-presence"; |
| gpios = <&pca0 7 GPIO_ACTIVE_LOW>; |
| linux,code = <7>; |
| }; |
| |
| fan2-presence { |
| label = "fan2-presence"; |
| gpios = <&pca0 8 GPIO_ACTIVE_LOW>; |
| linux,code = <8>; |
| }; |
| |
| fan3-presence { |
| label = "fan3-presence"; |
| gpios = <&pca0 9 GPIO_ACTIVE_LOW>; |
| linux,code = <9>; |
| }; |
| |
| fan4-presence { |
| label = "fan4-presence"; |
| gpios = <&pca0 10 GPIO_ACTIVE_LOW>; |
| linux,code = <10>; |
| }; |
| |
| fan5-presence { |
| label = "fan5-presence"; |
| gpios = <&pca0 11 GPIO_ACTIVE_LOW>; |
| linux,code = <11>; |
| }; |
| }; |
| }; |
| |
| &ehci1 { |
| status = "okay"; |
| }; |
| |
| &gpio0 { |
| gpio-line-names = |
| /*A0-A7*/ "","","","","","","","", |
| /*B0-B7*/ "","","","","","","checkstop","", |
| /*C0-C7*/ "","","","","","","","", |
| /*D0-D7*/ "","","","","","","","", |
| /*E0-E7*/ "","","","","","","","", |
| /*F0-F7*/ "","","","","","","","", |
| /*G0-G7*/ "","","","","","","","", |
| /*H0-H7*/ "","bmc-ingraham0","rear-enc-id0","rear-enc-fault0","","","","", |
| /*I0-I7*/ "","","","","","","","", |
| /*J0-J7*/ "","","","","","","","", |
| /*K0-K7*/ "","","","","","","","", |
| /*L0-L7*/ "","","","","","","","", |
| /*M0-M7*/ "","","","","","","","", |
| /*N0-N7*/ "","","","","","","","", |
| /*O0-O7*/ "","","","usb-power","","","","", |
| /*P0-P7*/ "","","","","pcieslot-power","","","", |
| /*Q0-Q7*/ "cfam-reset","","","","","","","", |
| /*R0-R7*/ "bmc-tpm-reset","power-chassis-control","power-chassis-good","","","","","", |
| /*S0-S7*/ "presence-ps0","presence-ps1","presence-ps2","presence-ps3", |
| "","","","", |
| /*T0-T7*/ "","","","","","","","", |
| /*U0-U7*/ "","","","","","","","", |
| /*V0-V7*/ "","","","","","","","", |
| /*W0-W7*/ "","","","","","","","", |
| /*X0-X7*/ "","","","","","","","", |
| /*Y0-Y7*/ "","","","","","","","", |
| /*Z0-Z7*/ "","","","","","","",""; |
| |
| pin_mclr_vpp { |
| gpio-hog; |
| gpios = <ASPEED_GPIO(P, 7) GPIO_OPEN_DRAIN>; |
| output-high; |
| line-name = "mclr_vpp"; |
| }; |
| |
| i2c3_mux_oe_n { |
| gpio-hog; |
| gpios = <ASPEED_GPIO(G, 6) GPIO_ACTIVE_LOW>; |
| output-high; |
| line-name = "I2C3_MUX_OE_N"; |
| }; |
| }; |
| |
| &emmc_controller { |
| status = "okay"; |
| }; |
| |
| &pinctrl_emmc_default { |
| bias-disable; |
| }; |
| |
| &emmc { |
| status = "okay"; |
| clk-phase-mmc-hs200 = <180>, <180>; |
| }; |
| |
| &fsim0 { |
| status = "okay"; |
| |
| #address-cells = <2>; |
| #size-cells = <0>; |
| |
| /* |
| * CFAM Reset is supposed to be active low but pass1 hardware is wired |
| * active high. |
| */ |
| cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>; |
| |
| cfam@0,0 { |
| reg = <0 0>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| chip-id = <0>; |
| |
| scom@1000 { |
| compatible = "ibm,fsi2pib"; |
| reg = <0x1000 0x400>; |
| }; |
| |
| i2c@1800 { |
| compatible = "ibm,fsi-i2c-master"; |
| reg = <0x1800 0x400>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cfam0_i2c0: i2c-bus@0 { |
| reg = <0>; /* OMI01 */ |
| }; |
| |
| cfam0_i2c1: i2c-bus@1 { |
| reg = <1>; /* OMI23 */ |
| }; |
| |
| cfam0_i2c10: i2c-bus@a { |
| reg = <10>; /* OP3A */ |
| }; |
| |
| cfam0_i2c11: i2c-bus@b { |
| reg = <11>; /* OP3B */ |
| }; |
| |
| cfam0_i2c12: i2c-bus@c { |
| reg = <12>; /* OP4A */ |
| }; |
| |
| cfam0_i2c13: i2c-bus@d { |
| reg = <13>; /* OP4B */ |
| }; |
| |
| cfam0_i2c14: i2c-bus@e { |
| reg = <14>; /* OP5A */ |
| }; |
| |
| cfam0_i2c15: i2c-bus@f { |
| reg = <15>; /* OP5B */ |
| }; |
| }; |
| |
| fsi2spi@1c00 { |
| compatible = "ibm,fsi2spi"; |
| reg = <0x1c00 0x400>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cfam0_spi0: spi@0 { |
| reg = <0x0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| eeprom@0 { |
| at25,byte-len = <0x80000>; |
| at25,addr-mode = <4>; |
| at25,page-size = <256>; |
| |
| compatible = "atmel,at25"; |
| reg = <0>; |
| spi-max-frequency = <1000000>; |
| }; |
| }; |
| |
| cfam0_spi1: spi@20 { |
| reg = <0x20>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| eeprom@0 { |
| at25,byte-len = <0x80000>; |
| at25,addr-mode = <4>; |
| at25,page-size = <256>; |
| |
| compatible = "atmel,at25"; |
| reg = <0>; |
| spi-max-frequency = <1000000>; |
| }; |
| }; |
| |
| cfam0_spi2: spi@40 { |
| reg = <0x40>; |
| compatible = "ibm,fsi2spi-restricted"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| eeprom@0 { |
| at25,byte-len = <0x80000>; |
| at25,addr-mode = <4>; |
| at25,page-size = <256>; |
| |
| compatible = "atmel,at25"; |
| reg = <0>; |
| spi-max-frequency = <1000000>; |
| }; |
| }; |
| |
| cfam0_spi3: spi@60 { |
| reg = <0x60>; |
| compatible = "ibm,fsi2spi-restricted"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| eeprom@0 { |
| at25,byte-len = <0x80000>; |
| at25,addr-mode = <4>; |
| at25,page-size = <256>; |
| |
| compatible = "atmel,at25"; |
| reg = <0>; |
| spi-max-frequency = <1000000>; |
| }; |
| }; |
| }; |
| |
| sbefifo@2400 { |
| compatible = "ibm,p9-sbefifo"; |
| reg = <0x2400 0x400>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| fsi_occ0: occ { |
| compatible = "ibm,p10-occ"; |
| }; |
| }; |
| |
| fsi_hub0: hub@3400 { |
| compatible = "fsi-master-hub"; |
| reg = <0x3400 0x400>; |
| #address-cells = <2>; |
| #size-cells = <0>; |
| }; |
| }; |
| }; |
| |
| &fsi_hub0 { |
| cfam@1,0 { |
| reg = <1 0>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| chip-id = <1>; |
| |
| scom@1000 { |
| compatible = "ibm,fsi2pib"; |
| reg = <0x1000 0x400>; |
| }; |
| |
| i2c@1800 { |
| compatible = "ibm,fsi-i2c-master"; |
| reg = <0x1800 0x400>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cfam1_i2c2: i2c-bus@2 { |
| reg = <2>; /* OMI45 */ |
| }; |
| |
| cfam1_i2c3: i2c-bus@3 { |
| reg = <3>; /* OMI67 */ |
| }; |
| |
| cfam1_i2c10: i2c-bus@a { |
| reg = <10>; /* OP3A */ |
| }; |
| |
| cfam1_i2c11: i2c-bus@b { |
| reg = <11>; /* OP3B */ |
| }; |
| |
| cfam1_i2c14: i2c-bus@e { |
| reg = <14>; /* OP5A */ |
| }; |
| |
| cfam1_i2c15: i2c-bus@f { |
| reg = <15>; /* OP5B */ |
| }; |
| |
| cfam1_i2c16: i2c-bus@10 { |
| reg = <16>; /* OP6A */ |
| }; |
| |
| cfam1_i2c17: i2c-bus@11 { |
| reg = <17>; /* OP6B */ |
| }; |
| }; |
| |
| fsi2spi@1c00 { |
| compatible = "ibm,fsi2spi"; |
| reg = <0x1c00 0x400>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cfam1_spi0: spi@0 { |
| reg = <0x0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| eeprom@0 { |
| at25,byte-len = <0x80000>; |
| at25,addr-mode = <4>; |
| at25,page-size = <256>; |
| |
| compatible = "atmel,at25"; |
| reg = <0>; |
| spi-max-frequency = <1000000>; |
| }; |
| }; |
| |
| cfam1_spi1: spi@20 { |
| reg = <0x20>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| eeprom@0 { |
| at25,byte-len = <0x80000>; |
| at25,addr-mode = <4>; |
| at25,page-size = <256>; |
| |
| compatible = "atmel,at25"; |
| reg = <0>; |
| spi-max-frequency = <1000000>; |
| }; |
| }; |
| |
| cfam1_spi2: spi@40 { |
| reg = <0x40>; |
| compatible = "ibm,fsi2spi-restricted"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| eeprom@0 { |
| at25,byte-len = <0x80000>; |
| at25,addr-mode = <4>; |
| at25,page-size = <256>; |
| |
| compatible = "atmel,at25"; |
| reg = <0>; |
| spi-max-frequency = <1000000>; |
| }; |
| }; |
| |
| cfam1_spi3: spi@60 { |
| reg = <0x60>; |
| compatible = "ibm,fsi2spi-restricted"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| eeprom@0 { |
| at25,byte-len = <0x80000>; |
| at25,addr-mode = <4>; |
| at25,page-size = <256>; |
| |
| compatible = "atmel,at25"; |
| reg = <0>; |
| spi-max-frequency = <1000000>; |
| }; |
| }; |
| }; |
| |
| sbefifo@2400 { |
| compatible = "ibm,p9-sbefifo"; |
| reg = <0x2400 0x400>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| fsi_occ1: occ { |
| compatible = "ibm,p10-occ"; |
| }; |
| }; |
| |
| fsi_hub1: hub@3400 { |
| compatible = "fsi-master-hub"; |
| reg = <0x3400 0x400>; |
| #address-cells = <2>; |
| #size-cells = <0>; |
| |
| no-scan-on-init; |
| }; |
| }; |
| |
| cfam@2,0 { |
| reg = <2 0>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| chip-id = <2>; |
| |
| scom@1000 { |
| compatible = "ibm,fsi2pib"; |
| reg = <0x1000 0x400>; |
| }; |
| |
| i2c@1800 { |
| compatible = "ibm,fsi-i2c-master"; |
| reg = <0x1800 0x400>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cfam2_i2c0: i2c-bus@0 { |
| reg = <0>; /* OM01 */ |
| }; |
| |
| cfam2_i2c1: i2c-bus@1 { |
| reg = <1>; /* OM23 */ |
| }; |
| |
| cfam2_i2c10: i2c-bus@a { |
| reg = <10>; /* OP3A */ |
| }; |
| |
| cfam2_i2c11: i2c-bus@b { |
| reg = <11>; /* OP3B */ |
| }; |
| |
| cfam2_i2c12: i2c-bus@c { |
| reg = <12>; /* OP4A */ |
| }; |
| |
| cfam2_i2c13: i2c-bus@d { |
| reg = <13>; /* OP4B */ |
| }; |
| |
| cfam2_i2c14: i2c-bus@e { |
| reg = <14>; /* OP5A */ |
| }; |
| |
| cfam2_i2c15: i2c-bus@f { |
| reg = <15>; /* OP5B */ |
| }; |
| }; |
| |
| fsi2spi@1c00 { |
| compatible = "ibm,fsi2spi"; |
| reg = <0x1c00 0x400>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cfam2_spi0: spi@0 { |
| reg = <0x0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| eeprom@0 { |
| at25,byte-len = <0x80000>; |
| at25,addr-mode = <4>; |
| at25,page-size = <256>; |
| |
| compatible = "atmel,at25"; |
| reg = <0>; |
| spi-max-frequency = <1000000>; |
| }; |
| }; |
| |
| cfam2_spi1: spi@20 { |
| reg = <0x20>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| eeprom@0 { |
| at25,byte-len = <0x80000>; |
| at25,addr-mode = <4>; |
| at25,page-size = <256>; |
| |
| compatible = "atmel,at25"; |
| reg = <0>; |
| spi-max-frequency = <1000000>; |
| }; |
| }; |
| |
| cfam2_spi2: spi@40 { |
| reg = <0x40>; |
| compatible = "ibm,fsi2spi-restricted"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| eeprom@0 { |
| at25,byte-len = <0x80000>; |
| at25,addr-mode = <4>; |
| at25,page-size = <256>; |
| |
| compatible = "atmel,at25"; |
| reg = <0>; |
| spi-max-frequency = <1000000>; |
| }; |
| }; |
| |
| cfam2_spi3: spi@60 { |
| reg = <0x60>; |
| compatible = "ibm,fsi2spi-restricted"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| eeprom@0 { |
| at25,byte-len = <0x80000>; |
| at25,addr-mode = <4>; |
| at25,page-size = <256>; |
| |
| compatible = "atmel,at25"; |
| reg = <0>; |
| spi-max-frequency = <1000000>; |
| }; |
| }; |
| }; |
| |
| sbefifo@2400 { |
| compatible = "ibm,p9-sbefifo"; |
| reg = <0x2400 0x400>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| fsi_occ2: occ { |
| compatible = "ibm,p10-occ"; |
| }; |
| }; |
| |
| fsi_hub2: hub@3400 { |
| compatible = "fsi-master-hub"; |
| reg = <0x3400 0x400>; |
| #address-cells = <2>; |
| #size-cells = <0>; |
| |
| no-scan-on-init; |
| }; |
| }; |
| |
| cfam@3,0 { |
| reg = <3 0>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| chip-id = <3>; |
| |
| scom@1000 { |
| compatible = "ibm,fsi2pib"; |
| reg = <0x1000 0x400>; |
| }; |
| |
| i2c@1800 { |
| compatible = "ibm,fsi-i2c-master"; |
| reg = <0x1800 0x400>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cfam3_i2c2: i2c-bus@2 { |
| reg = <2>; /* OM45 */ |
| }; |
| |
| cfam3_i2c3: i2c-bus@3 { |
| reg = <3>; /* OM67 */ |
| }; |
| |
| cfam3_i2c10: i2c-bus@a { |
| reg = <10>; /* OP3A */ |
| }; |
| |
| cfam3_i2c11: i2c-bus@b { |
| reg = <11>; /* OP3B */ |
| }; |
| |
| cfam3_i2c14: i2c-bus@e { |
| reg = <14>; /* OP5A */ |
| }; |
| |
| cfam3_i2c15: i2c-bus@f { |
| reg = <15>; /* OP5B */ |
| }; |
| |
| cfam3_i2c16: i2c-bus@10 { |
| reg = <16>; /* OP6A */ |
| }; |
| |
| cfam3_i2c17: i2c-bus@11 { |
| reg = <17>; /* OP6B */ |
| }; |
| }; |
| |
| fsi2spi@1c00 { |
| compatible = "ibm,fsi2spi"; |
| reg = <0x1c00 0x400>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cfam3_spi0: spi@0 { |
| reg = <0x0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| eeprom@0 { |
| at25,byte-len = <0x80000>; |
| at25,addr-mode = <4>; |
| at25,page-size = <256>; |
| |
| compatible = "atmel,at25"; |
| reg = <0>; |
| spi-max-frequency = <1000000>; |
| }; |
| }; |
| |
| cfam3_spi1: spi@20 { |
| reg = <0x20>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| eeprom@0 { |
| at25,byte-len = <0x80000>; |
| at25,addr-mode = <4>; |
| at25,page-size = <256>; |
| |
| compatible = "atmel,at25"; |
| reg = <0>; |
| spi-max-frequency = <1000000>; |
| }; |
| }; |
| |
| cfam3_spi2: spi@40 { |
| reg = <0x40>; |
| compatible = "ibm,fsi2spi-restricted"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| eeprom@0 { |
| at25,byte-len = <0x80000>; |
| at25,addr-mode = <4>; |
| at25,page-size = <256>; |
| |
| compatible = "atmel,at25"; |
| reg = <0>; |
| spi-max-frequency = <1000000>; |
| }; |
| }; |
| |
| cfam3_spi3: spi@60 { |
| reg = <0x60>; |
| compatible = "ibm,fsi2spi-restricted"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| eeprom@0 { |
| at25,byte-len = <0x80000>; |
| at25,addr-mode = <4>; |
| at25,page-size = <256>; |
| |
| compatible = "atmel,at25"; |
| reg = <0>; |
| spi-max-frequency = <1000000>; |
| }; |
| }; |
| }; |
| |
| sbefifo@2400 { |
| compatible = "ibm,p9-sbefifo"; |
| reg = <0x2400 0x400>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| fsi_occ3: occ { |
| compatible = "ibm,p10-occ"; |
| }; |
| }; |
| |
| fsi_hub3: hub@3400 { |
| compatible = "fsi-master-hub"; |
| reg = <0x3400 0x400>; |
| #address-cells = <2>; |
| #size-cells = <0>; |
| |
| no-scan-on-init; |
| }; |
| }; |
| }; |
| |
| /* Legacy OCC numbering (to get rid of when userspace is fixed) */ |
| &fsi_occ0 { |
| reg = <1>; |
| }; |
| |
| &fsi_occ1 { |
| reg = <2>; |
| }; |
| |
| &fsi_occ2 { |
| reg = <3>; |
| }; |
| |
| &fsi_occ3 { |
| reg = <4>; |
| }; |
| |
| &ibt { |
| status = "okay"; |
| }; |
| |
| &i2c0 { |
| status = "okay"; |
| |
| eeprom@51 { |
| compatible = "atmel,24c64"; |
| reg = <0x51>; |
| }; |
| |
| tca_pres1: tca9554@20{ |
| compatible = "ti,tca9554"; |
| reg = <0x20>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| gpio-line-names = "", |
| "RUSSEL_FW_I2C_ENABLE_N", |
| "RUSSEL_OPPANEL_PRESENCE_N", |
| "BLYTH_OPPANEL_PRESENCE_N", |
| "CPU_TPM_CARD_PRESENT_N", |
| "DASD_BP2_PRESENT_N", |
| "DASD_BP1_PRESENT_N", |
| "DASD_BP0_PRESENT_N"; |
| |
| gpio@0 { |
| reg = <0>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@1 { |
| reg = <1>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@2 { |
| reg = <2>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@3 { |
| reg = <3>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@4 { |
| reg = <4>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@5 { |
| reg = <5>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@6 { |
| reg = <6>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@7 { |
| reg = <7>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| }; |
| }; |
| |
| &i2c1 { |
| status = "okay"; |
| }; |
| |
| &i2c2 { |
| status = "okay"; |
| }; |
| |
| &i2c3 { |
| status = "okay"; |
| |
| power-supply@68 { |
| compatible = "ibm,cffps"; |
| reg = <0x68>; |
| }; |
| |
| power-supply@69 { |
| compatible = "ibm,cffps"; |
| reg = <0x69>; |
| }; |
| |
| pca_pres1: pca9552@61 { |
| compatible = "nxp,pca9552"; |
| reg = <0x61>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| gpio-line-names = |
| "SLOT0_PRSNT_EN_RSVD", "SLOT1_PRSNT_EN_RSVD", |
| "SLOT2_PRSNT_EN_RSVD", "SLOT3_PRSNT_EN_RSVD", |
| "SLOT4_PRSNT_EN_RSVD", "SLOT0_EXPANDER_PRSNT_N", |
| "SLOT1_EXPANDER_PRSNT_N", "SLOT2_EXPANDER_PRSNT_N", |
| "SLOT3_EXPANDER_PRSNT_N", "SLOT4_EXPANDER_PRSNT_N", |
| "", "", "", "", "", ""; |
| |
| gpio@0 { |
| reg = <0>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@1 { |
| reg = <1>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@2 { |
| reg = <2>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@3 { |
| reg = <3>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@4 { |
| reg = <4>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@5 { |
| reg = <5>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@6 { |
| reg = <6>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@7 { |
| reg = <7>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@8 { |
| reg = <8>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@9 { |
| reg = <9>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@10 { |
| reg = <10>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@11 { |
| reg = <11>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@12 { |
| reg = <12>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@13 { |
| reg = <13>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@14 { |
| reg = <14>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@15 { |
| reg = <15>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| }; |
| }; |
| |
| &i2c4 { |
| status = "okay"; |
| |
| tmp275@48 { |
| compatible = "ti,tmp275"; |
| reg = <0x48>; |
| }; |
| |
| tmp275@49 { |
| compatible = "ti,tmp275"; |
| reg = <0x49>; |
| }; |
| |
| tmp275@4a { |
| compatible = "ti,tmp275"; |
| reg = <0x4a>; |
| }; |
| |
| pca9546@70 { |
| compatible = "nxp,pca9546"; |
| reg = <0x70>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "okay"; |
| i2c-mux-idle-disconnect; |
| |
| i2c4mux0chn0: i2c@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0>; |
| |
| eeprom@50 { |
| compatible = "atmel,24c64"; |
| reg = <0x50>; |
| }; |
| }; |
| |
| i2c4mux0chn1: i2c@1 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <1>; |
| |
| eeprom@51 { |
| compatible = "atmel,24c64"; |
| reg = <0x51>; |
| }; |
| }; |
| |
| i2c4mux0chn2: i2c@2 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <2>; |
| |
| eeprom@52 { |
| compatible = "atmel,24c64"; |
| reg = <0x52>; |
| }; |
| }; |
| }; |
| }; |
| |
| &i2c5 { |
| status = "okay"; |
| |
| tmp275@48 { |
| compatible = "ti,tmp275"; |
| reg = <0x48>; |
| }; |
| |
| tmp275@49 { |
| compatible = "ti,tmp275"; |
| reg = <0x49>; |
| }; |
| |
| pca9546@70 { |
| compatible = "nxp,pca9546"; |
| reg = <0x70>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "okay"; |
| i2c-mux-idle-disconnect; |
| |
| i2c5mux0chn0: i2c@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0>; |
| |
| eeprom@50 { |
| compatible = "atmel,24c64"; |
| reg = <0x50>; |
| }; |
| }; |
| |
| i2c5mux0chn1: i2c@1 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <1>; |
| |
| eeprom@51 { |
| compatible = "atmel,24c64"; |
| reg = <0x51>; |
| }; |
| }; |
| }; |
| }; |
| |
| &i2c6 { |
| status = "okay"; |
| |
| tmp275@48 { |
| compatible = "ti,tmp275"; |
| reg = <0x48>; |
| }; |
| |
| tmp275@4a { |
| compatible = "ti,tmp275"; |
| reg = <0x4a>; |
| }; |
| |
| tmp275@4b { |
| compatible = "ti,tmp275"; |
| reg = <0x4b>; |
| }; |
| |
| pca9546@70 { |
| compatible = "nxp,pca9546"; |
| reg = <0x70>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "okay"; |
| i2c-mux-idle-disconnect; |
| |
| i2c6mux0chn0: i2c@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0>; |
| |
| eeprom@53 { |
| compatible = "atmel,24c64"; |
| reg = <0x53>; |
| }; |
| }; |
| |
| i2c6mux0chn1: i2c@1 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <1>; |
| |
| eeprom@52 { |
| compatible = "atmel,24c64"; |
| reg = <0x52>; |
| }; |
| }; |
| |
| i2c6mux0chn2: i2c@2 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <2>; |
| |
| eeprom@50 { |
| compatible = "atmel,24c64"; |
| reg = <0x50>; |
| }; |
| }; |
| |
| i2c6mux0chn3: i2c@3 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <3>; |
| |
| eeprom@51 { |
| compatible = "atmel,24c64"; |
| reg = <0x51>; |
| }; |
| }; |
| }; |
| }; |
| |
| &i2c7 { |
| multi-master; |
| status = "okay"; |
| |
| si7021-a20@40 { |
| compatible = "silabs,si7020"; |
| reg = <0x40>; |
| }; |
| |
| tmp275@48 { |
| compatible = "ti,tmp275"; |
| reg = <0x48>; |
| }; |
| |
| max: max31785@52 { |
| compatible = "maxim,max31785a"; |
| reg = <0x52>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| fan0: fan@0 { |
| compatible = "pmbus-fan"; |
| reg = <0>; |
| tach-pulses = <2>; |
| }; |
| |
| fan1: fan@1 { |
| compatible = "pmbus-fan"; |
| reg = <1>; |
| tach-pulses = <2>; |
| }; |
| |
| fan2: fan@2 { |
| compatible = "pmbus-fan"; |
| reg = <2>; |
| tach-pulses = <2>; |
| }; |
| |
| fan3: fan@3 { |
| compatible = "pmbus-fan"; |
| reg = <3>; |
| tach-pulses = <2>; |
| }; |
| |
| fan4: fan@4 { |
| compatible = "pmbus-fan"; |
| reg = <4>; |
| tach-pulses = <2>; |
| }; |
| |
| fan5: fan@5 { |
| compatible = "pmbus-fan"; |
| reg = <5>; |
| tach-pulses = <2>; |
| }; |
| }; |
| |
| pca0: pca9552@61 { |
| compatible = "nxp,pca9552"; |
| reg = <0x61>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| gpio@0 { |
| reg = <0>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@1 { |
| reg = <1>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@2 { |
| reg = <2>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@3 { |
| reg = <3>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@4 { |
| reg = <4>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@5 { |
| reg = <5>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@6 { |
| reg = <6>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@7 { |
| reg = <7>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@8 { |
| reg = <8>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@9 { |
| reg = <9>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@10 { |
| reg = <10>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@11 { |
| reg = <11>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@12 { |
| reg = <12>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@13 { |
| reg = <13>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@14 { |
| reg = <14>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@15 { |
| reg = <15>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| }; |
| |
| ibm-panel@62 { |
| compatible = "ibm,op-panel"; |
| reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>; |
| }; |
| |
| dps: dps310@76 { |
| compatible = "infineon,dps310"; |
| reg = <0x76>; |
| #io-channel-cells = <0>; |
| }; |
| |
| eeprom@50 { |
| compatible = "atmel,24c64"; |
| reg = <0x50>; |
| }; |
| |
| eeprom@51 { |
| compatible = "atmel,24c64"; |
| reg = <0x51>; |
| }; |
| }; |
| |
| &i2c8 { |
| status = "okay"; |
| |
| ucd90320@11 { |
| compatible = "ti,ucd90320"; |
| reg = <0x11>; |
| }; |
| |
| rtc@32 { |
| compatible = "epson,rx8900"; |
| reg = <0x32>; |
| }; |
| |
| tmp275@48 { |
| compatible = "ti,tmp275"; |
| reg = <0x48>; |
| }; |
| |
| tmp275@4a { |
| compatible = "ti,tmp275"; |
| reg = <0x4a>; |
| }; |
| |
| eeprom@50 { |
| compatible = "atmel,24c64"; |
| reg = <0x50>; |
| }; |
| |
| eeprom@51 { |
| compatible = "atmel,24c64"; |
| reg = <0x51>; |
| }; |
| |
| pca_pres2: pca9552@61 { |
| compatible = "nxp,pca9552"; |
| reg = <0x61>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| gpio-line-names = |
| "SLOT6_PRSNT_EN_RSVD", "SLOT7_PRSNT_EN_RSVD", |
| "SLOT8_PRSNT_EN_RSVD", "SLOT9_PRSNT_EN_RSVD", |
| "SLOT10_PRSNT_EN_RSVD", "SLOT11_PRSNT_EN_RSVD", |
| "SLOT6_EXPANDER_PRSNT_N", "SLOT7_EXPANDER_PRSNT_N", |
| "SLOT8_EXPANDER_PRSNT_N", "SLOT9_EXPANDER_PRSNT_N", |
| "SLOT10_EXPANDER_PRSNT_N", "SLOT11_EXPANDER_PRSNT_N", |
| "", "", "", ""; |
| |
| gpio@0 { |
| reg = <0>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@1 { |
| reg = <1>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@2 { |
| reg = <2>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@3 { |
| reg = <3>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@4 { |
| reg = <4>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@5 { |
| reg = <5>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@6 { |
| reg = <6>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@7 { |
| reg = <7>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@8 { |
| reg = <8>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@9 { |
| reg = <9>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@10 { |
| reg = <10>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@11 { |
| reg = <11>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@12 { |
| reg = <12>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@13 { |
| reg = <13>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@14 { |
| reg = <14>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| |
| gpio@15 { |
| reg = <15>; |
| type = <PCA955X_TYPE_GPIO>; |
| }; |
| }; |
| |
| }; |
| |
| &i2c9 { |
| status = "okay"; |
| |
| tmp423a@4c { |
| compatible = "ti,tmp423"; |
| reg = <0x4c>; |
| }; |
| |
| tmp423b@4d { |
| compatible = "ti,tmp423"; |
| reg = <0x4d>; |
| }; |
| |
| eeprom@50 { |
| compatible = "atmel,24c128"; |
| reg = <0x50>; |
| }; |
| }; |
| |
| &i2c10 { |
| status = "okay"; |
| |
| tmp423a@4c { |
| compatible = "ti,tmp423"; |
| reg = <0x4c>; |
| }; |
| |
| tmp423b@4d { |
| compatible = "ti,tmp423"; |
| reg = <0x4d>; |
| }; |
| |
| eeprom@50 { |
| compatible = "atmel,24c128"; |
| reg = <0x50>; |
| }; |
| }; |
| |
| &i2c11 { |
| status = "okay"; |
| |
| tmp275@48 { |
| compatible = "ti,tmp275"; |
| reg = <0x48>; |
| }; |
| |
| tmp275@49 { |
| compatible = "ti,tmp275"; |
| reg = <0x49>; |
| }; |
| |
| pca9546@70 { |
| compatible = "nxp,pca9546"; |
| reg = <0x70>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "okay"; |
| i2c-mux-idle-disconnect; |
| |
| i2c11mux0chn0: i2c@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0>; |
| |
| eeprom@50 { |
| compatible = "atmel,24c64"; |
| reg = <0x50>; |
| }; |
| }; |
| |
| i2c11mux0chn1: i2c@1 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <1>; |
| |
| eeprom@51 { |
| compatible = "atmel,24c64"; |
| reg = <0x51>; |
| }; |
| }; |
| }; |
| }; |
| |
| &i2c12 { |
| status = "okay"; |
| }; |
| |
| &i2c13 { |
| status = "okay"; |
| |
| eeprom@50 { |
| compatible = "atmel,24c64"; |
| reg = <0x50>; |
| }; |
| }; |
| |
| &i2c14 { |
| status = "okay"; |
| |
| eeprom@50 { |
| compatible = "atmel,24c64"; |
| reg = <0x50>; |
| }; |
| }; |
| |
| &i2c15 { |
| status = "okay"; |
| |
| eeprom@50 { |
| compatible = "atmel,24c64"; |
| reg = <0x50>; |
| }; |
| }; |
| |
| &vuart1 { |
| status = "okay"; |
| }; |
| |
| &vuart2 { |
| status = "okay"; |
| }; |
| |
| &lpc_ctrl { |
| status = "okay"; |
| memory-region = <&flash_memory>; |
| }; |
| |
| &mac2 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_rmii3_default>; |
| clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>, |
| <&syscon ASPEED_CLK_MAC3RCLK>; |
| clock-names = "MACCLK", "RCLK"; |
| use-ncsi; |
| }; |
| |
| &mac3 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_rmii4_default>; |
| clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>, |
| <&syscon ASPEED_CLK_MAC4RCLK>; |
| clock-names = "MACCLK", "RCLK"; |
| use-ncsi; |
| }; |
| |
| &fmc { |
| status = "okay"; |
| flash@0 { |
| status = "okay"; |
| m25p,fast-read; |
| label = "bmc"; |
| spi-max-frequency = <50000000>; |
| #include "openbmc-flash-layout-128.dtsi" |
| }; |
| }; |
| |
| &spi1 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_spi1_default>; |
| |
| flash@0 { |
| status = "okay"; |
| m25p,fast-read; |
| label = "pnor"; |
| spi-max-frequency = <100000000>; |
| }; |
| }; |
| |
| &wdt1 { |
| aspeed,reset-type = "none"; |
| aspeed,external-signal; |
| aspeed,ext-push-pull; |
| aspeed,ext-active-high; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_wdtrst1_default>; |
| }; |
| |
| &wdt2 { |
| status = "okay"; |
| }; |
| |
| &xdma { |
| status = "okay"; |
| memory-region = <&vga_memory>; |
| }; |
