| // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) |
| /* |
| * Copyright (C) STMicroelectronics 2023 - All Rights Reserved |
| * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics. |
| */ |
| #include "stm32mp251.dtsi" |
| |
| / { |
| cpus { |
| cpu1: cpu@1 { |
| compatible = "arm,cortex-a35"; |
| device_type = "cpu"; |
| reg = <1>; |
| enable-method = "psci"; |
| }; |
| }; |
| |
| arm-pmu { |
| interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-affinity = <&cpu0>, <&cpu1>; |
| }; |
| |
| timer { |
| interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, |
| <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, |
| <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, |
| <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; |
| }; |
| }; |
