[netdrvr b44] trim trailing whitespace
diff --git a/drivers/net/b44.c b/drivers/net/b44.c
index aa1ef74..3d30668 100644
--- a/drivers/net/b44.c
+++ b/drivers/net/b44.c
@@ -137,7 +137,7 @@
return readl(bp->regs + reg);
}
-static inline void bw32(const struct b44 *bp,
+static inline void bw32(const struct b44 *bp,
unsigned long reg, unsigned long val)
{
writel(val, bp->regs + reg);
@@ -287,13 +287,13 @@
val |= ((u32) data[4]) << 8;
val |= ((u32) data[5]) << 0;
bw32(bp, B44_CAM_DATA_LO, val);
- val = (CAM_DATA_HI_VALID |
+ val = (CAM_DATA_HI_VALID |
(((u32) data[0]) << 8) |
(((u32) data[1]) << 0));
bw32(bp, B44_CAM_DATA_HI, val);
bw32(bp, B44_CAM_CTRL, (CAM_CTRL_WRITE |
(index << CAM_CTRL_INDEX_SHIFT)));
- b44_wait_bit(bp, B44_CAM_CTRL, CAM_CTRL_BUSY, 100, 1);
+ b44_wait_bit(bp, B44_CAM_CTRL, CAM_CTRL_BUSY, 100, 1);
}
static inline void __b44_disable_ints(struct b44 *bp)
@@ -411,15 +411,15 @@
static void b44_set_flow_ctrl(struct b44 *bp, u32 local, u32 remote)
{
- u32 pause_enab = 0;
+ u32 pause_enab = 0;
/* The driver supports only rx pause by default because
- the b44 mac tx pause mechanism generates excessive
- pause frames.
+ the b44 mac tx pause mechanism generates excessive
+ pause frames.
Use ethtool to turn on b44 tx pause if necessary.
*/
if ((local & ADVERTISE_PAUSE_CAP) &&
- (local & ADVERTISE_PAUSE_ASYM)){
+ (local & ADVERTISE_PAUSE_ASYM)){
if ((remote & LPA_PAUSE_ASYM) &&
!(remote & LPA_PAUSE_CAP))
pause_enab |= B44_FLAG_RX_PAUSE;
@@ -1057,7 +1057,7 @@
spin_unlock_irq(&bp->lock);
b44_enable_ints(bp);
-
+
return 0;
}
@@ -1375,7 +1375,7 @@
bw32(bp, B44_DMARX_ADDR, bp->rx_ring_dma + bp->dma_offset);
bw32(bp, B44_DMARX_PTR, bp->rx_pending);
- bp->rx_prod = bp->rx_pending;
+ bp->rx_prod = bp->rx_pending;
bw32(bp, B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ);
@@ -1547,9 +1547,9 @@
val |= RXCONFIG_ALLMULTI;
else
i = __b44_load_mcast(bp, dev);
-
+
for (; i < 64; i++) {
- __b44_cam_write(bp, zero, i);
+ __b44_cam_write(bp, zero, i);
}
bw32(bp, B44_RXCONFIG, val);
val = br32(bp, B44_CAM_CTRL);
@@ -1731,7 +1731,7 @@
spin_unlock_irq(&bp->lock);
b44_enable_ints(bp);
-
+
return 0;
}
@@ -1776,7 +1776,7 @@
spin_unlock_irq(&bp->lock);
b44_enable_ints(bp);
-
+
return 0;
}
@@ -1892,7 +1892,7 @@
bp->core_unit = ssb_core_unit(bp);
bp->dma_offset = SB_PCI_DMA;
- /* XXX - really required?
+ /* XXX - really required?
bp->flags |= B44_FLAG_BUGGY_TXPTR;
*/
out:
@@ -1940,7 +1940,7 @@
"aborting.\n");
goto err_out_free_res;
}
-
+
err = pci_set_consistent_dma_mask(pdev, (u64) B44_DMA_MASK);
if (err) {
printk(KERN_ERR PFX "No usable DMA configuration, "
@@ -2035,9 +2035,9 @@
pci_save_state(bp->pdev);
- /* Chip reset provides power to the b44 MAC & PCI cores, which
+ /* Chip reset provides power to the b44 MAC & PCI cores, which
* is necessary for MAC register access.
- */
+ */
b44_chip_reset(bp);
printk(KERN_INFO "%s: Broadcom 4400 10/100BaseT Ethernet ", dev->name);
@@ -2085,10 +2085,10 @@
del_timer_sync(&bp->timer);
- spin_lock_irq(&bp->lock);
+ spin_lock_irq(&bp->lock);
b44_halt(bp);
- netif_carrier_off(bp->dev);
+ netif_carrier_off(bp->dev);
netif_device_detach(bp->dev);
b44_free_rings(bp);
