ACPICA: IORT: Add PMCG node supprt
PMCG nodes were added by IORT revision C, with the unfortunate oversight
that it only defined a single base address, and thus was incapable of
properly describing PMCG implementations with PMCG_CFGR.RELOC_CTRS = 1,
where the counters are in a separate page from the control registers.
Revision D corrects this by clarifying the existing field as the page 0
base address and adding a second field to describe the page 1 address
when implemented. With the spec now fit for purpose, let's support it.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Erik Schmauss <erik.schmauss@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
1 file changed
