Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
diff --git a/MAINTAINERS b/MAINTAINERS
index 246153d..e564e4e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1800,12 +1800,12 @@
W: http://megaraid.lsilogic.com
S: Maintained
-MEMORY TECHNOLOGY DEVICES
+MEMORY TECHNOLOGY DEVICES (MTD)
P: David Woodhouse
M: dwmw2@infradead.org
W: http://www.linux-mtd.infradead.org/
L: linux-mtd@lists.infradead.org
-T: git kernel.org:/pub/scm/linux/kernel/git/tglx/mtd-2.6.git
+T: git git://git.infradead.org/mtd-2.6.git
S: Maintained
MICROTEK X6 SCANNER
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index f6b775e..5ac265d 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -78,7 +78,7 @@
option.
The option specifies which Flash sectors holds the RedBoot
- partition table. A zero or positive value gives an absolete
+ partition table. A zero or positive value gives an absolute
erase block number. A negative value specifies a number of
sectors before the end of the device.
@@ -103,7 +103,7 @@
bool "Command line partition table parsing"
depends on MTD_PARTITIONS = "y"
---help---
- Allow generic configuration of the MTD paritition tables via the kernel
+ Allow generic configuration of the MTD partition tables via the kernel
command line. Multiple flash resources are supported for hardware where
different kinds of flash memory are available.
diff --git a/drivers/mtd/chips/Kconfig b/drivers/mtd/chips/Kconfig
index a7ec595..6d8f30d 100644
--- a/drivers/mtd/chips/Kconfig
+++ b/drivers/mtd/chips/Kconfig
@@ -30,7 +30,6 @@
config MTD_GEN_PROBE
tristate
- select OBSOLETE_INTERMODULE
config MTD_CFI_ADV_OPTIONS
bool "Flash chip driver advanced configuration options"
diff --git a/drivers/mtd/chips/Makefile b/drivers/mtd/chips/Makefile
index 8afe309..75bc1c2 100644
--- a/drivers/mtd/chips/Makefile
+++ b/drivers/mtd/chips/Makefile
@@ -3,13 +3,6 @@
#
# $Id: Makefile.common,v 1.5 2005/11/07 11:14:22 gleixner Exp $
-# *** BIG UGLY NOTE ***
-#
-# The removal of get_module_symbol() and replacement with
-# inter_module_register() et al has introduced a link order dependency
-# here where previously there was none. We now have to ensure that
-# the CFI command set drivers are linked before gen_probe.o
-
obj-$(CONFIG_MTD) += chipreg.o
obj-$(CONFIG_MTD_AMDSTD) += amd_flash.o
obj-$(CONFIG_MTD_CFI) += cfi_probe.o
diff --git a/drivers/mtd/chips/amd_flash.c b/drivers/mtd/chips/amd_flash.c
index 5711561..9e46650 100644
--- a/drivers/mtd/chips/amd_flash.c
+++ b/drivers/mtd/chips/amd_flash.c
@@ -97,7 +97,6 @@
int interleave;
int numchips;
unsigned long chipshift;
-// const char *im_name;
struct flchip chips[0];
};
@@ -131,12 +130,6 @@
.module = THIS_MODULE
};
-
-
-static const char im_name[] = "amd_flash";
-
-
-
static inline __u32 wide_read(struct map_info *map, __u32 addr)
{
if (map->buswidth == 1) {
diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c
index 1c074d6..898c321 100644
--- a/drivers/mtd/chips/cfi_cmdset_0001.c
+++ b/drivers/mtd/chips/cfi_cmdset_0001.c
@@ -331,13 +331,6 @@
return extp;
}
-/* This routine is made available to other mtd code via
- * inter_module_register. It must only be accessed through
- * inter_module_get which will bump the use count of this module. The
- * addresses passed back in cfi are valid as long as the use count of
- * this module is non-zero, i.e. between inter_module_get and
- * inter_module_put. Keith Owens <kaos@ocs.com.au> 29 Oct 2000.
- */
struct mtd_info *cfi_cmdset_0001(struct map_info *map, int primary)
{
struct cfi_private *cfi = map->fldrv_priv;
@@ -415,6 +408,11 @@
return cfi_intelext_setup(mtd);
}
+struct mtd_info *cfi_cmdset_0003(struct map_info *map, int primary) __attribute__((alias("cfi_cmdset_0001")));
+struct mtd_info *cfi_cmdset_0200(struct map_info *map, int primary) __attribute__((alias("cfi_cmdset_0001")));
+EXPORT_SYMBOL_GPL(cfi_cmdset_0001);
+EXPORT_SYMBOL_GPL(cfi_cmdset_0003);
+EXPORT_SYMBOL_GPL(cfi_cmdset_0200);
static struct mtd_info *cfi_intelext_setup(struct mtd_info *mtd)
{
@@ -1477,7 +1475,7 @@
ENABLE_VPP(map);
xip_disable(map, chip, cmd_adr);
- /* §4.8 of the 28FxxxJ3A datasheet says "Any time SR.4 and/or SR.5 is set
+ /* §4.8 of the 28FxxxJ3A datasheet says "Any time SR.4 and/or SR.5 is set
[...], the device will not accept any more Write to Buffer commands".
So we must check here and reset those bits if they're set. Otherwise
we're just pissing in the wind */
@@ -2445,28 +2443,8 @@
kfree(mtd->eraseregions);
}
-static char im_name_0001[] = "cfi_cmdset_0001";
-static char im_name_0003[] = "cfi_cmdset_0003";
-static char im_name_0200[] = "cfi_cmdset_0200";
-
-static int __init cfi_intelext_init(void)
-{
- inter_module_register(im_name_0001, THIS_MODULE, &cfi_cmdset_0001);
- inter_module_register(im_name_0003, THIS_MODULE, &cfi_cmdset_0001);
- inter_module_register(im_name_0200, THIS_MODULE, &cfi_cmdset_0001);
- return 0;
-}
-
-static void __exit cfi_intelext_exit(void)
-{
- inter_module_unregister(im_name_0001);
- inter_module_unregister(im_name_0003);
- inter_module_unregister(im_name_0200);
-}
-
-module_init(cfi_intelext_init);
-module_exit(cfi_intelext_exit);
-
MODULE_LICENSE("GPL");
MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
MODULE_DESCRIPTION("MTD chip driver for Intel/Sharp flash chips");
+MODULE_ALIAS("cfi_cmdset_0003");
+MODULE_ALIAS("cfi_cmdset_0200");
diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
index aed10bd..3aeb0c7 100644
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -326,7 +326,7 @@
return cfi_amdstd_setup(mtd);
}
-
+EXPORT_SYMBOL_GPL(cfi_cmdset_0002);
static struct mtd_info *cfi_amdstd_setup(struct mtd_info *mtd)
{
@@ -1758,25 +1758,6 @@
kfree(mtd->eraseregions);
}
-static char im_name[]="cfi_cmdset_0002";
-
-
-static int __init cfi_amdstd_init(void)
-{
- inter_module_register(im_name, THIS_MODULE, &cfi_cmdset_0002);
- return 0;
-}
-
-
-static void __exit cfi_amdstd_exit(void)
-{
- inter_module_unregister(im_name);
-}
-
-
-module_init(cfi_amdstd_init);
-module_exit(cfi_amdstd_exit);
-
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Crossnet Co. <info@crossnet.co.jp> et al.");
MODULE_DESCRIPTION("MTD chip driver for AMD/Fujitsu flash chips");
diff --git a/drivers/mtd/chips/cfi_cmdset_0020.c b/drivers/mtd/chips/cfi_cmdset_0020.c
index 0807c1c..3911c98 100644
--- a/drivers/mtd/chips/cfi_cmdset_0020.c
+++ b/drivers/mtd/chips/cfi_cmdset_0020.c
@@ -162,6 +162,7 @@
return cfi_staa_setup(map);
}
+EXPORT_SYMBOL_GPL(cfi_cmdset_0020);
static struct mtd_info *cfi_staa_setup(struct map_info *map)
{
@@ -1410,20 +1411,4 @@
kfree(cfi);
}
-static char im_name[]="cfi_cmdset_0020";
-
-static int __init cfi_staa_init(void)
-{
- inter_module_register(im_name, THIS_MODULE, &cfi_cmdset_0020);
- return 0;
-}
-
-static void __exit cfi_staa_exit(void)
-{
- inter_module_unregister(im_name);
-}
-
-module_init(cfi_staa_init);
-module_exit(cfi_staa_exit);
-
MODULE_LICENSE("GPL");
diff --git a/drivers/mtd/chips/cfi_probe.c b/drivers/mtd/chips/cfi_probe.c
index e636aa8..4bf9f8c 100644
--- a/drivers/mtd/chips/cfi_probe.c
+++ b/drivers/mtd/chips/cfi_probe.c
@@ -349,12 +349,12 @@
else
printk("No Vpp line\n");
- printk("Typical byte/word write timeout: %d µs\n", 1<<cfip->WordWriteTimeoutTyp);
- printk("Maximum byte/word write timeout: %d µs\n", (1<<cfip->WordWriteTimeoutMax) * (1<<cfip->WordWriteTimeoutTyp));
+ printk("Typical byte/word write timeout: %d µs\n", 1<<cfip->WordWriteTimeoutTyp);
+ printk("Maximum byte/word write timeout: %d µs\n", (1<<cfip->WordWriteTimeoutMax) * (1<<cfip->WordWriteTimeoutTyp));
if (cfip->BufWriteTimeoutTyp || cfip->BufWriteTimeoutMax) {
- printk("Typical full buffer write timeout: %d µs\n", 1<<cfip->BufWriteTimeoutTyp);
- printk("Maximum full buffer write timeout: %d µs\n", (1<<cfip->BufWriteTimeoutMax) * (1<<cfip->BufWriteTimeoutTyp));
+ printk("Typical full buffer write timeout: %d µs\n", 1<<cfip->BufWriteTimeoutTyp);
+ printk("Maximum full buffer write timeout: %d µs\n", (1<<cfip->BufWriteTimeoutMax) * (1<<cfip->BufWriteTimeoutTyp));
}
else
printk("Full buffer write not supported\n");
diff --git a/drivers/mtd/chips/gen_probe.c b/drivers/mtd/chips/gen_probe.c
index 41bd59d..b2d3052 100644
--- a/drivers/mtd/chips/gen_probe.c
+++ b/drivers/mtd/chips/gen_probe.c
@@ -37,8 +37,15 @@
if (!mtd)
mtd = check_cmd_set(map, 0); /* Then the secondary */
- if (mtd)
+ if (mtd) {
+ if (mtd->size > map->size) {
+ printk(KERN_WARNING "Reducing visibility of %lKiB chip to %lKiB\n",
+ (unsigned long)mtd->size >> 10,
+ (unsigned long)map->size >> 10);
+ mtd->size = map->size;
+ }
return mtd;
+ }
printk(KERN_WARNING"gen_probe: No supported Vendor Command Set found\n");
@@ -100,7 +107,12 @@
* Align bitmap storage size to full byte.
*/
max_chips = map->size >> cfi.chipshift;
- mapsize = (max_chips / 8) + ((max_chips % 8) ? 1 : 0);
+ if (!max_chips) {
+ printk(KERN_WARNING "NOR chip too large to fit in mapping. Attempting to cope...\n");
+ max_chips = 1;
+ }
+
+ mapsize = (max_chips + BITS_PER_LONG-1) / BITS_PER_LONG;
chip_map = kmalloc(mapsize, GFP_KERNEL);
if (!chip_map) {
printk(KERN_WARNING "%s: kmalloc failed for CFI chip map\n", map->name);
@@ -194,25 +206,28 @@
{
struct cfi_private *cfi = map->fldrv_priv;
__u16 type = primary?cfi->cfiq->P_ID:cfi->cfiq->A_ID;
-#if defined(CONFIG_MODULES) && defined(HAVE_INTER_MODULE)
+#ifdef CONFIG_MODULES
char probename[32];
cfi_cmdset_fn_t *probe_function;
sprintf(probename, "cfi_cmdset_%4.4X", type);
- probe_function = inter_module_get_request(probename, probename);
+ probe_function = (void *)symbol_get(probename);
+ if (!probe_function) {
+ request_module(probename);
+ probe_function = (void *)symbol_get(probename);
+ }
if (probe_function) {
struct mtd_info *mtd;
mtd = (*probe_function)(map, primary);
/* If it was happy, it'll have increased its own use count */
- inter_module_put(probename);
+ symbol_put_addr(probe_function);
return mtd;
}
#endif
- printk(KERN_NOTICE "Support for command set %04X not present\n",
- type);
+ printk(KERN_NOTICE "Support for command set %04X not present\n", type);
return NULL;
}
@@ -226,12 +241,8 @@
return NULL;
switch(type){
- /* Urgh. Ifdefs. The version with weak symbols was
- * _much_ nicer. Shame it didn't seem to work on
- * anything but x86, really.
- * But we can't rely in inter_module_get() because
- * that'd mean we depend on link order.
- */
+ /* We need these for the !CONFIG_MODULES case,
+ because symbol_get() doesn't work there */
#ifdef CONFIG_MTD_CFI_INTELEXT
case 0x0001:
case 0x0003:
@@ -246,9 +257,9 @@
case 0x0020:
return cfi_cmdset_0020(map, primary);
#endif
+ default:
+ return cfi_cmdset_unknown(map, primary);
}
-
- return cfi_cmdset_unknown(map, primary);
}
MODULE_LICENSE("GPL");
diff --git a/drivers/mtd/chips/map_ram.c b/drivers/mtd/chips/map_ram.c
index bd2e876..7639257 100644
--- a/drivers/mtd/chips/map_ram.c
+++ b/drivers/mtd/chips/map_ram.c
@@ -70,7 +70,7 @@
mtd->read = mapram_read;
mtd->write = mapram_write;
mtd->sync = mapram_nop;
- mtd->flags = MTD_CAP_RAM | MTD_VOLATILE;
+ mtd->flags = MTD_CAP_RAM;
mtd->erasesize = PAGE_SIZE;
while(mtd->size & (mtd->erasesize - 1))
diff --git a/drivers/mtd/devices/Kconfig b/drivers/mtd/devices/Kconfig
index 7fac438..6e9f880 100644
--- a/drivers/mtd/devices/Kconfig
+++ b/drivers/mtd/devices/Kconfig
@@ -209,7 +209,6 @@
config MTD_DOCPROBE
tristate
select MTD_DOCECC
- select OBSOLETE_INTERMODULE
config MTD_DOCECC
tristate
diff --git a/drivers/mtd/devices/Makefile b/drivers/mtd/devices/Makefile
index b657367..0f788d5 100644
--- a/drivers/mtd/devices/Makefile
+++ b/drivers/mtd/devices/Makefile
@@ -3,13 +3,6 @@
#
# $Id: Makefile.common,v 1.7 2004/12/22 17:51:15 joern Exp $
-# *** BIG UGLY NOTE ***
-#
-# The removal of get_module_symbol() and replacement with
-# inter_module_register() et al has introduced a link order dependency
-# here where previously there was none. We now have to ensure that
-# doc200[01].o are linked before docprobe.o
-
obj-$(CONFIG_MTD_DOC2000) += doc2000.o
obj-$(CONFIG_MTD_DOC2001) += doc2001.o
obj-$(CONFIG_MTD_DOC2001PLUS) += doc2001plus.o
diff --git a/drivers/mtd/devices/block2mtd.c b/drivers/mtd/devices/block2mtd.c
index 4160b83..8ca04f4 100644
--- a/drivers/mtd/devices/block2mtd.c
+++ b/drivers/mtd/devices/block2mtd.c
@@ -4,7 +4,7 @@
* block2mtd.c - create an mtd from a block device
*
* Copyright (C) 2001,2002 Simon Evans <spse@secret.org.uk>
- * Copyright (C) 2004,2005 Jörn Engel <joern@wh.fh-wedel.de>
+ * Copyright (C) 2004-2006 Jörn Engel <joern@wh.fh-wedel.de>
*
* Licence: GPL
*/
@@ -351,6 +351,12 @@
}
+/* This function works similar to reguler strtoul. In addition, it
+ * allows some suffixes for a more human-readable number format:
+ * ki, Ki, kiB, KiB - multiply result with 1024
+ * Mi, MiB - multiply result with 1024^2
+ * Gi, GiB - multiply result with 1024^3
+ */
static int ustrtoul(const char *cp, char **endp, unsigned int base)
{
unsigned long result = simple_strtoul(cp, endp, base);
@@ -359,11 +365,16 @@
result *= 1024;
case 'M':
result *= 1024;
+ case 'K':
case 'k':
result *= 1024;
/* By dwmw2 editorial decree, "ki", "Mi" or "Gi" are to be used. */
- if ((*endp)[1] == 'i')
- (*endp) += 2;
+ if ((*endp)[1] == 'i') {
+ if ((*endp)[2] == 'B')
+ (*endp) += 3;
+ else
+ (*endp) += 2;
+ }
}
return result;
}
@@ -418,7 +429,8 @@
static int block2mtd_setup(const char *val, struct kernel_param *kp)
{
- char buf[80+12], *str=buf; /* 80 for device, 12 for erase size */
+ char buf[80+12]; /* 80 for device, 12 for erase size */
+ char *str = buf;
char *token[2];
char *name;
size_t erase_size = PAGE_SIZE;
@@ -430,7 +442,7 @@
strcpy(str, val);
kill_final_newline(str);
- for (i=0; i<2; i++)
+ for (i = 0; i < 2; i++)
token[i] = strsep(&str, ",");
if (str)
@@ -449,8 +461,10 @@
if (token[1]) {
ret = parse_num(&erase_size, token[1]);
- if (ret)
+ if (ret) {
+ kfree(name);
parse_err("illegal erase size");
+ }
}
add_device(name, erase_size);
diff --git a/drivers/mtd/devices/doc2000.c b/drivers/mtd/devices/doc2000.c
index 23e7a5c..40cc20f 100644
--- a/drivers/mtd/devices/doc2000.c
+++ b/drivers/mtd/devices/doc2000.c
@@ -517,16 +517,9 @@
return retval;
}
-static const char im_name[] = "DoC2k_init";
-
-/* This routine is made available to other mtd code via
- * inter_module_register. It must only be accessed through
- * inter_module_get which will bump the use count of this module. The
- * addresses passed back in mtd are valid as long as the use count of
- * this module is non-zero, i.e. between inter_module_get and
- * inter_module_put. Keith Owens <kaos@ocs.com.au> 29 Oct 2000.
- */
-static void DoC2k_init(struct mtd_info *mtd)
+/* This routine is found from the docprobe code by symbol_get(),
+ * which will bump the use count of this module. */
+void DoC2k_init(struct mtd_info *mtd)
{
struct DiskOnChip *this = mtd->priv;
struct DiskOnChip *old = NULL;
@@ -623,6 +616,7 @@
return;
}
}
+EXPORT_SYMBOL_GPL(DoC2k_init);
static int doc_read(struct mtd_info *mtd, loff_t from, size_t len,
size_t * retlen, u_char * buf)
@@ -1277,12 +1271,6 @@
*
****************************************************************************/
-static int __init init_doc2000(void)
-{
- inter_module_register(im_name, THIS_MODULE, &DoC2k_init);
- return 0;
-}
-
static void __exit cleanup_doc2000(void)
{
struct mtd_info *mtd;
@@ -1298,11 +1286,9 @@
kfree(this->chips);
kfree(mtd);
}
- inter_module_unregister(im_name);
}
module_exit(cleanup_doc2000);
-module_init(init_doc2000);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
diff --git a/drivers/mtd/devices/doc2001.c b/drivers/mtd/devices/doc2001.c
index 681a9c7..1670eb8 100644
--- a/drivers/mtd/devices/doc2001.c
+++ b/drivers/mtd/devices/doc2001.c
@@ -324,16 +324,9 @@
return retval;
}
-static const char im_name[] = "DoCMil_init";
-
-/* This routine is made available to other mtd code via
- * inter_module_register. It must only be accessed through
- * inter_module_get which will bump the use count of this module. The
- * addresses passed back in mtd are valid as long as the use count of
- * this module is non-zero, i.e. between inter_module_get and
- * inter_module_put. Keith Owens <kaos@ocs.com.au> 29 Oct 2000.
- */
-static void DoCMil_init(struct mtd_info *mtd)
+/* This routine is found from the docprobe code by symbol_get(),
+ * which will bump the use count of this module. */
+void DoCMil_init(struct mtd_info *mtd)
{
struct DiskOnChip *this = mtd->priv;
struct DiskOnChip *old = NULL;
@@ -401,6 +394,7 @@
return;
}
}
+EXPORT_SYMBOL_GPL(DoCMil_init);
static int doc_read (struct mtd_info *mtd, loff_t from, size_t len,
size_t *retlen, u_char *buf)
@@ -856,12 +850,6 @@
*
****************************************************************************/
-static int __init init_doc2001(void)
-{
- inter_module_register(im_name, THIS_MODULE, &DoCMil_init);
- return 0;
-}
-
static void __exit cleanup_doc2001(void)
{
struct mtd_info *mtd;
@@ -877,11 +865,9 @@
kfree(this->chips);
kfree(mtd);
}
- inter_module_unregister(im_name);
}
module_exit(cleanup_doc2001);
-module_init(init_doc2001);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
diff --git a/drivers/mtd/devices/doc2001plus.c b/drivers/mtd/devices/doc2001plus.c
index 5f57f29..0dc5d10 100644
--- a/drivers/mtd/devices/doc2001plus.c
+++ b/drivers/mtd/devices/doc2001plus.c
@@ -447,16 +447,9 @@
return retval;
}
-static const char im_name[] = "DoCMilPlus_init";
-
-/* This routine is made available to other mtd code via
- * inter_module_register. It must only be accessed through
- * inter_module_get which will bump the use count of this module. The
- * addresses passed back in mtd are valid as long as the use count of
- * this module is non-zero, i.e. between inter_module_get and
- * inter_module_put. Keith Owens <kaos@ocs.com.au> 29 Oct 2000.
- */
-static void DoCMilPlus_init(struct mtd_info *mtd)
+/* This routine is found from the docprobe code by symbol_get(),
+ * which will bump the use count of this module. */
+void DoCMilPlus_init(struct mtd_info *mtd)
{
struct DiskOnChip *this = mtd->priv;
struct DiskOnChip *old = NULL;
@@ -524,6 +517,7 @@
return;
}
}
+EXPORT_SYMBOL_GPL(DoCMilPlus_init);
#if 0
static int doc_dumpblk(struct mtd_info *mtd, loff_t from)
@@ -1122,12 +1116,6 @@
*
****************************************************************************/
-static int __init init_doc2001plus(void)
-{
- inter_module_register(im_name, THIS_MODULE, &DoCMilPlus_init);
- return 0;
-}
-
static void __exit cleanup_doc2001plus(void)
{
struct mtd_info *mtd;
@@ -1143,11 +1131,9 @@
kfree(this->chips);
kfree(mtd);
}
- inter_module_unregister(im_name);
}
module_exit(cleanup_doc2001plus);
-module_init(init_doc2001plus);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Greg Ungerer <gerg@snapgear.com> et al.");
diff --git a/drivers/mtd/devices/docprobe.c b/drivers/mtd/devices/docprobe.c
index 13178b9..32f1d33 100644
--- a/drivers/mtd/devices/docprobe.c
+++ b/drivers/mtd/devices/docprobe.c
@@ -231,6 +231,27 @@
static int docfound;
+#ifdef CONFIG_DOC2000
+extern void DoC2k_init(struct mtd_info *);
+#define doc2k_initfunc (&DoC2k_init)
+#else
+#define doc2k_initfunc NULL
+#endif
+
+#ifdef CONFIG_DOC2001
+extern void DoCMil_init(struct mtd_info *);
+#define docmil_initfunc (&DoCMil_init)
+#else
+#define docmil_initfunc NULL
+#endif
+
+#ifdef CONFIG_DOC2001PLUS
+extern void DoCMilPlus_init(struct mtd_info *);
+#define docmplus_initfunc (&DoCMilPlus_init)
+#else
+#define docmplus_initfunc NULL
+#endif
+
static void __init DoC_Probe(unsigned long physadr)
{
void __iomem *docptr;
@@ -280,12 +301,14 @@
name="2000 TSOP";
im_funcname = "DoC2k_init";
im_modname = "doc2000";
+ initroutine = doc2k_initfunc;
break;
case DOC_ChipID_Doc2k:
name="2000";
im_funcname = "DoC2k_init";
im_modname = "doc2000";
+ initroutine = doc2k_initfunc;
break;
case DOC_ChipID_DocMil:
@@ -293,9 +316,11 @@
#ifdef DOC_SINGLE_DRIVER
im_funcname = "DoC2k_init";
im_modname = "doc2000";
+ initroutine = doc2k_initfunc;
#else
im_funcname = "DoCMil_init";
im_modname = "doc2001";
+ initroutine = docmil_initfunc;
#endif /* DOC_SINGLE_DRIVER */
break;
@@ -304,15 +329,21 @@
name="MillenniumPlus";
im_funcname = "DoCMilPlus_init";
im_modname = "doc2001plus";
+ initroutine = docmplus_initfunc;
break;
}
- if (im_funcname)
- initroutine = inter_module_get_request(im_funcname, im_modname);
-
+#ifdef CONFIG_MODULES
+ if (im_funcname && !initroutine)
+ initroutine = symbol_get(im_funcname);
+ if (im_funcname && !initroutine) {
+ request_module(im_modname);
+ initroutine = symbol_get(im_funcname);
+ }
+#endif
if (initroutine) {
(*initroutine)(mtd);
- inter_module_put(im_funcname);
+ symbol_put_addr(initroutine);
return;
}
printk(KERN_NOTICE "Cannot find driver for DiskOnChip %s at 0x%lX\n", name, physadr);
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index 04e65d5..d5f2408 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -186,7 +186,7 @@
struct m25p *flash = mtd_to_m25p(mtd);
u32 addr,len;
- DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %d\n",
+ DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n",
flash->spi->dev.bus_id, __FUNCTION__, "at",
(u32)instr->addr, instr->len);
diff --git a/drivers/mtd/devices/phram.c b/drivers/mtd/devices/phram.c
index e8685ee..e09e416 100644
--- a/drivers/mtd/devices/phram.c
+++ b/drivers/mtd/devices/phram.c
@@ -1,8 +1,8 @@
/**
* $Id: phram.c,v 1.16 2005/11/07 11:14:25 gleixner Exp $
*
- * Copyright (c) ???? Jochen Schäuble <psionic@psionic.de>
- * Copyright (c) 2003-2004 Jörn Engel <joern@wh.fh-wedel.de>
+ * Copyright (c) ???? Jochen Schäuble <psionic@psionic.de>
+ * Copyright (c) 2003-2004 Jörn Engel <joern@wh.fh-wedel.de>
*
* Usage:
*
@@ -142,7 +142,7 @@
new->mtd.name = name;
new->mtd.size = len;
- new->mtd.flags = MTD_CAP_RAM | MTD_ERASEABLE | MTD_VOLATILE;
+ new->mtd.flags = MTD_CAP_RAM;
new->mtd.erase = phram_erase;
new->mtd.point = phram_point;
new->mtd.unpoint = phram_unpoint;
@@ -266,12 +266,16 @@
return 0;
ret = parse_num32(&start, token[1]);
- if (ret)
+ if (ret) {
+ kfree(name);
parse_err("illegal start address\n");
+ }
ret = parse_num32(&len, token[2]);
- if (ret)
+ if (ret) {
+ kfree(name);
parse_err("illegal device length\n");
+ }
register_device(name, start, len);
@@ -296,5 +300,5 @@
module_exit(cleanup_phram);
MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Jörn Engel <joern@wh.fh-wedel.de>");
+MODULE_AUTHOR("Jörn Engel <joern@wh.fh-wedel.de>");
MODULE_DESCRIPTION("MTD driver for physical RAM");
diff --git a/drivers/mtd/devices/slram.c b/drivers/mtd/devices/slram.c
index 6faee6c..b3f665e 100644
--- a/drivers/mtd/devices/slram.c
+++ b/drivers/mtd/devices/slram.c
@@ -200,8 +200,7 @@
(*curmtd)->mtdinfo->name = name;
(*curmtd)->mtdinfo->size = length;
- (*curmtd)->mtdinfo->flags = MTD_CLEAR_BITS | MTD_SET_BITS |
- MTD_WRITEB_WRITEABLE | MTD_VOLATILE | MTD_CAP_RAM;
+ (*curmtd)->mtdinfo->flags = MTD_CAP_RAM;
(*curmtd)->mtdinfo->erase = slram_erase;
(*curmtd)->mtdinfo->point = slram_point;
(*curmtd)->mtdinfo->unpoint = slram_unpoint;
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index 7abd7fe..4e2bd37 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -37,7 +37,7 @@
config MTD_PHYSMAP_LEN
hex "Physical length of flash mapping"
depends on MTD_PHYSMAP
- default "0x4000000"
+ default "0"
help
This is the total length of the mapping of the flash chips on
your particular board. If there is space, or aliases, in the
@@ -78,7 +78,7 @@
config MTD_SC520CDP
tristate "CFI Flash device mapped on AMD SC520 CDP"
- depends on X86 && MTD_CFI
+ depends on X86 && MTD_CFI && MTD_CONCAT
help
The SC520 CDP board has two banks of CFI-compliant chips and one
Dual-in-line JEDEC chip. This 'mapping' driver supports that
@@ -109,7 +109,7 @@
mtd1 allows you to reprogram your BIOS. BE VERY CAREFUL.
Note that jumper 3 ("Write Enable Drive A") must be set
- otherwise detection won't succeeed.
+ otherwise detection won't succeed.
config MTD_SBC_GXX
tristate "CFI Flash device mapped on Arcom SBC-GXx boards"
@@ -561,7 +561,6 @@
config MTD_PCMCIA_ANONYMOUS
bool "Use PCMCIA MTD drivers for anonymous PCMCIA cards"
depends on MTD_PCMCIA
- default N
help
If this option is enabled, PCMCIA cards which do not report
anything about themselves are assumed to be MTD cards.
diff --git a/drivers/mtd/maps/cfi_flagadm.c b/drivers/mtd/maps/cfi_flagadm.c
index fd0f0d3..92b5d88 100644
--- a/drivers/mtd/maps/cfi_flagadm.c
+++ b/drivers/mtd/maps/cfi_flagadm.c
@@ -1,5 +1,5 @@
/*
- * Copyright © 2001 Flaga hf. Medical Devices, Kári Davíðsson <kd@flaga.is>
+ * Copyright © 2001 Flaga hf. Medical Devices, Kári Davíðsson <kd@flaga.is>
*
* $Id: cfi_flagadm.c,v 1.15 2005/11/07 11:14:26 gleixner Exp $
*
@@ -135,5 +135,5 @@
MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Kári Davíðsson <kd@flaga.is>");
+MODULE_AUTHOR("Kári Davíðsson <kd@flaga.is>");
MODULE_DESCRIPTION("MTD map driver for Flaga digital module");
diff --git a/drivers/mtd/maps/dbox2-flash.c b/drivers/mtd/maps/dbox2-flash.c
index 652813c..85c2a9e 100644
--- a/drivers/mtd/maps/dbox2-flash.c
+++ b/drivers/mtd/maps/dbox2-flash.c
@@ -122,5 +122,5 @@
MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Kári Davíðsson <kd@flaga.is>, Bastian Blank <waldi@tuxbox.org>, Alexander Wild <wild@te-elektronik.com>");
+MODULE_AUTHOR("Kári Davíðsson <kd@flaga.is>, Bastian Blank <waldi@tuxbox.org>, Alexander Wild <wild@te-elektronik.com>");
MODULE_DESCRIPTION("MTD map driver for D-Box 2 board");
diff --git a/drivers/mtd/maps/mtx-1_flash.c b/drivers/mtd/maps/mtx-1_flash.c
index d1e66e1..5c25d4e 100644
--- a/drivers/mtd/maps/mtx-1_flash.c
+++ b/drivers/mtd/maps/mtx-1_flash.c
@@ -4,7 +4,7 @@
* $Id: mtx-1_flash.c,v 1.2 2005/11/07 11:14:27 gleixner Exp $
*
* (C) 2005 Bruno Randolf <bruno.randolf@4g-systems.biz>
- * (C) 2005 Jörn Engel <joern@wohnheim.fh-wedel.de>
+ * (C) 2005 Jörn Engel <joern@wohnheim.fh-wedel.de>
*
*/
diff --git a/drivers/mtd/maps/nettel.c b/drivers/mtd/maps/nettel.c
index 54a3102..20771b2 100644
--- a/drivers/mtd/maps/nettel.c
+++ b/drivers/mtd/maps/nettel.c
@@ -20,6 +20,8 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/cfi.h>
#include <linux/reboot.h>
+#include <linux/kdev_t.h>
+#include <linux/root_dev.h>
#include <asm/io.h>
/****************************************************************************/
diff --git a/drivers/mtd/maps/physmap.c b/drivers/mtd/maps/physmap.c
index f49ebc3..bc82f70 100644
--- a/drivers/mtd/maps/physmap.c
+++ b/drivers/mtd/maps/physmap.c
@@ -14,113 +14,230 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/slab.h>
-#include <asm/io.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/config.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
+#include <asm/io.h>
-static struct mtd_info *mymtd;
-
-struct map_info physmap_map = {
- .name = "phys_mapped_flash",
- .phys = CONFIG_MTD_PHYSMAP_START,
- .size = CONFIG_MTD_PHYSMAP_LEN,
- .bankwidth = CONFIG_MTD_PHYSMAP_BANKWIDTH,
+struct physmap_flash_info {
+ struct mtd_info *mtd;
+ struct map_info map;
+ struct resource *res;
+#ifdef CONFIG_MTD_PARTITIONS
+ int nr_parts;
+ struct mtd_partition *parts;
+#endif
};
-#ifdef CONFIG_MTD_PARTITIONS
-static struct mtd_partition *mtd_parts;
-static int mtd_parts_nb;
-static int num_physmap_partitions;
-static struct mtd_partition *physmap_partitions;
-
-static const char *part_probes[] __initdata = {"cmdlinepart", "RedBoot", NULL};
-
-void physmap_set_partitions(struct mtd_partition *parts, int num_parts)
+static int physmap_flash_remove(struct platform_device *dev)
{
- physmap_partitions=parts;
- num_physmap_partitions=num_parts;
-}
-#endif /* CONFIG_MTD_PARTITIONS */
+ struct physmap_flash_info *info;
+ struct physmap_flash_data *physmap_data;
-static int __init init_physmap(void)
-{
- static const char *rom_probe_types[] = { "cfi_probe", "jedec_probe", "map_rom", NULL };
- const char **type;
+ info = platform_get_drvdata(dev);
+ if (info == NULL)
+ return 0;
+ platform_set_drvdata(dev, NULL);
- printk(KERN_NOTICE "physmap flash device: %lx at %lx\n", physmap_map.size, physmap_map.phys);
- physmap_map.virt = ioremap(physmap_map.phys, physmap_map.size);
+ physmap_data = dev->dev.platform_data;
- if (!physmap_map.virt) {
- printk("Failed to ioremap\n");
- return -EIO;
- }
-
- simple_map_init(&physmap_map);
-
- mymtd = NULL;
- type = rom_probe_types;
- for(; !mymtd && *type; type++) {
- mymtd = do_map_probe(*type, &physmap_map);
- }
- if (mymtd) {
- mymtd->owner = THIS_MODULE;
-
+ if (info->mtd != NULL) {
#ifdef CONFIG_MTD_PARTITIONS
- mtd_parts_nb = parse_mtd_partitions(mymtd, part_probes,
- &mtd_parts, 0);
-
- if (mtd_parts_nb > 0)
- {
- add_mtd_partitions (mymtd, mtd_parts, mtd_parts_nb);
- return 0;
+ if (info->nr_parts) {
+ del_mtd_partitions(info->mtd);
+ kfree(info->parts);
+ } else if (physmap_data->nr_parts) {
+ del_mtd_partitions(info->mtd);
+ } else {
+ del_mtd_device(info->mtd);
}
-
- if (num_physmap_partitions != 0)
- {
- printk(KERN_NOTICE
- "Using physmap partition definition\n");
- add_mtd_partitions (mymtd, physmap_partitions, num_physmap_partitions);
- return 0;
- }
-
+#else
+ del_mtd_device(info->mtd);
#endif
- add_mtd_device(mymtd);
+ map_destroy(info->mtd);
+ }
+ if (info->map.virt != NULL)
+ iounmap((void *)info->map.virt);
+
+ if (info->res != NULL) {
+ release_resource(info->res);
+ kfree(info->res);
+ }
+
+ return 0;
+}
+
+static const char *rom_probe_types[] = { "cfi_probe", "jedec_probe", "map_rom", NULL };
+#ifdef CONFIG_MTD_PARTITIONS
+static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL };
+#endif
+
+static int physmap_flash_probe(struct platform_device *dev)
+{
+ struct physmap_flash_data *physmap_data;
+ struct physmap_flash_info *info;
+ const char **probe_type;
+ int err;
+
+ physmap_data = dev->dev.platform_data;
+ if (physmap_data == NULL)
+ return -ENODEV;
+
+ printk(KERN_NOTICE "physmap platform flash device: %.8lx at %.8lx\n",
+ dev->resource->end - dev->resource->start + 1,
+ dev->resource->start);
+
+ info = kmalloc(sizeof(struct physmap_flash_info), GFP_KERNEL);
+ if (info == NULL) {
+ err = -ENOMEM;
+ goto err_out;
+ }
+ memset(info, 0, sizeof(*info));
+
+ platform_set_drvdata(dev, info);
+
+ info->res = request_mem_region(dev->resource->start,
+ dev->resource->end - dev->resource->start + 1,
+ dev->dev.bus_id);
+ if (info->res == NULL) {
+ dev_err(&dev->dev, "Could not reserve memory region\n");
+ err = -ENOMEM;
+ goto err_out;
+ }
+
+ info->map.name = dev->dev.bus_id;
+ info->map.phys = dev->resource->start;
+ info->map.size = dev->resource->end - dev->resource->start + 1;
+ info->map.bankwidth = physmap_data->width;
+ info->map.set_vpp = physmap_data->set_vpp;
+
+ info->map.virt = ioremap(info->map.phys, info->map.size);
+ if (info->map.virt == NULL) {
+ dev_err(&dev->dev, "Failed to ioremap flash region\n");
+ err = EIO;
+ goto err_out;
+ }
+
+ simple_map_init(&info->map);
+
+ probe_type = rom_probe_types;
+ for (; info->mtd == NULL && *probe_type != NULL; probe_type++)
+ info->mtd = do_map_probe(*probe_type, &info->map);
+ if (info->mtd == NULL) {
+ dev_err(&dev->dev, "map_probe failed\n");
+ err = -ENXIO;
+ goto err_out;
+ }
+ info->mtd->owner = THIS_MODULE;
+
+#ifdef CONFIG_MTD_PARTITIONS
+ err = parse_mtd_partitions(info->mtd, part_probe_types, &info->parts, 0);
+ if (err > 0) {
+ add_mtd_partitions(info->mtd, info->parts, err);
return 0;
}
- iounmap(physmap_map.virt);
- return -ENXIO;
-}
-
-static void __exit cleanup_physmap(void)
-{
-#ifdef CONFIG_MTD_PARTITIONS
- if (mtd_parts_nb) {
- del_mtd_partitions(mymtd);
- kfree(mtd_parts);
- } else if (num_physmap_partitions) {
- del_mtd_partitions(mymtd);
- } else {
- del_mtd_device(mymtd);
+ if (physmap_data->nr_parts) {
+ printk(KERN_NOTICE "Using physmap partition information\n");
+ add_mtd_partitions(info->mtd, physmap_data->parts,
+ physmap_data->nr_parts);
+ return 0;
}
-#else
- del_mtd_device(mymtd);
#endif
- map_destroy(mymtd);
- iounmap(physmap_map.virt);
- physmap_map.virt = NULL;
+ add_mtd_device(info->mtd);
+ return 0;
+
+err_out:
+ physmap_flash_remove(dev);
+ return err;
}
-module_init(init_physmap);
-module_exit(cleanup_physmap);
+static struct platform_driver physmap_flash_driver = {
+ .probe = physmap_flash_probe,
+ .remove = physmap_flash_remove,
+ .driver = {
+ .name = "physmap-flash",
+ },
+};
+#ifdef CONFIG_MTD_PHYSMAP_LEN
+#if CONFIG_MTD_PHYSMAP_LEN != 0
+#warning using PHYSMAP compat code
+#define PHYSMAP_COMPAT
+#endif
+#endif
+
+#ifdef PHYSMAP_COMPAT
+static struct physmap_flash_data physmap_flash_data = {
+ .width = CONFIG_MTD_PHYSMAP_BANKWIDTH,
+};
+
+static struct resource physmap_flash_resource = {
+ .start = CONFIG_MTD_PHYSMAP_START,
+ .end = CONFIG_MTD_PHYSMAP_START + CONFIG_MTD_PHYSMAP_LEN,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device physmap_flash = {
+ .name = "physmap-flash",
+ .id = 0,
+ .dev = {
+ .platform_data = &physmap_flash_data,
+ },
+ .num_resources = 1,
+ .resource = &physmap_flash_resource,
+};
+
+void physmap_configure(unsigned long addr, unsigned long size,
+ int bankwidth, void (*set_vpp)(struct map_info *, int))
+{
+ physmap_flash_resource.start = addr;
+ physmap_flash_resource.end = addr + size - 1;
+ physmap_flash_data.width = bankwidth;
+ physmap_flash_data.set_vpp = set_vpp;
+}
+
+#ifdef CONFIG_MTD_PARTITIONS
+void physmap_set_partitions(struct mtd_partition *parts, int num_parts)
+{
+ physmap_flash_data.nr_parts = num_parts;
+ physmap_flash_data.parts = parts;
+}
+#endif
+#endif
+
+static int __init physmap_init(void)
+{
+ int err;
+
+ err = platform_driver_register(&physmap_flash_driver);
+#ifdef PHYSMAP_COMPAT
+ if (err == 0)
+ platform_device_register(&physmap_flash);
+#endif
+
+ return err;
+}
+
+static void __exit physmap_exit(void)
+{
+#ifdef PHYSMAP_COMPAT
+ platform_device_unregister(&physmap_flash);
+#endif
+ platform_driver_unregister(&physmap_flash_driver);
+}
+
+module_init(physmap_init);
+module_exit(physmap_exit);
+
MODULE_LICENSE("GPL");
MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
MODULE_DESCRIPTION("Generic configurable MTD map driver");
diff --git a/drivers/mtd/mtdblock.c b/drivers/mtd/mtdblock.c
index 2cef280..8e50170 100644
--- a/drivers/mtd/mtdblock.c
+++ b/drivers/mtd/mtdblock.c
@@ -288,8 +288,7 @@
mutex_init(&mtdblk->cache_mutex);
mtdblk->cache_state = STATE_EMPTY;
- if ((mtdblk->mtd->flags & MTD_CAP_RAM) != MTD_CAP_RAM &&
- mtdblk->mtd->erasesize) {
+ if (mtdblk->mtd->type != MTD_RAM && mtdblk->mtd->erasesize) {
mtdblk->cache_size = mtdblk->mtd->erasesize;
mtdblk->cache_data = NULL;
}
diff --git a/drivers/mtd/mtdblock_ro.c b/drivers/mtd/mtdblock_ro.c
index 0c830ba..29563ed 100644
--- a/drivers/mtd/mtdblock_ro.c
+++ b/drivers/mtd/mtdblock_ro.c
@@ -45,9 +45,7 @@
dev->blksize = 512;
dev->size = mtd->size >> 9;
dev->tr = tr;
- if ((mtd->flags & (MTD_CLEAR_BITS|MTD_SET_BITS|MTD_WRITEABLE)) !=
- (MTD_CLEAR_BITS|MTD_SET_BITS|MTD_WRITEABLE))
- dev->readonly = 1;
+ dev->readonly = 1;
add_mtd_blktrans_dev(dev);
}
diff --git a/drivers/mtd/mtdchar.c b/drivers/mtd/mtdchar.c
index 6f04458..7a7df85 100644
--- a/drivers/mtd/mtdchar.c
+++ b/drivers/mtd/mtdchar.c
@@ -170,16 +170,22 @@
/* FIXME: Use kiovec in 2.5 to lock down the user's buffers
and pass them directly to the MTD functions */
+
+ if (count > MAX_KMALLOC_SIZE)
+ kbuf=kmalloc(MAX_KMALLOC_SIZE, GFP_KERNEL);
+ else
+ kbuf=kmalloc(count, GFP_KERNEL);
+
+ if (!kbuf)
+ return -ENOMEM;
+
while (count) {
+
if (count > MAX_KMALLOC_SIZE)
len = MAX_KMALLOC_SIZE;
else
len = count;
- kbuf=kmalloc(len,GFP_KERNEL);
- if (!kbuf)
- return -ENOMEM;
-
switch (MTD_MODE(file)) {
case MTD_MODE_OTP_FACT:
ret = mtd->read_fact_prot_reg(mtd, *ppos, len, &retlen, kbuf);
@@ -215,9 +221,9 @@
return ret;
}
- kfree(kbuf);
}
+ kfree(kbuf);
return total_retlen;
} /* mtd_read */
@@ -241,18 +247,21 @@
if (!count)
return 0;
+ if (count > MAX_KMALLOC_SIZE)
+ kbuf=kmalloc(MAX_KMALLOC_SIZE, GFP_KERNEL);
+ else
+ kbuf=kmalloc(count, GFP_KERNEL);
+
+ if (!kbuf)
+ return -ENOMEM;
+
while (count) {
+
if (count > MAX_KMALLOC_SIZE)
len = MAX_KMALLOC_SIZE;
else
len = count;
- kbuf=kmalloc(len,GFP_KERNEL);
- if (!kbuf) {
- printk("kmalloc is null\n");
- return -ENOMEM;
- }
-
if (copy_from_user(kbuf, buf, len)) {
kfree(kbuf);
return -EFAULT;
@@ -282,10 +291,9 @@
kfree(kbuf);
return ret;
}
-
- kfree(kbuf);
}
+ kfree(kbuf);
return total_retlen;
} /* mtd_write */
@@ -544,7 +552,7 @@
break;
}
-#ifdef CONFIG_MTD_OTP
+#if defined(CONFIG_MTD_OTP) || defined(CONFIG_MTD_ONENAND_OTP)
case OTPSELECT:
{
int mode;
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index cfe288a..b4a7086 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -55,6 +55,12 @@
help
Support for NAND flash on Texas Instruments Toto platform.
+config MTD_NAND_TS7250
+ tristate "NAND Flash device on TS-7250 board"
+ depends on MACH_TS72XX && MTD_NAND
+ help
+ Support for NAND flash on Technologic Systems TS-7250 platform.
+
config MTD_NAND_IDS
tristate
@@ -87,7 +93,7 @@
This enables the NAND flash controller on the S3C2410 and S3C2440
SoCs
- No board specfic support is done by this driver, each board
+ No board specific support is done by this driver, each board
must advertise a platform_device for the driver to attach.
config MTD_NAND_S3C2410_DEBUG
@@ -183,6 +189,10 @@
tristate "Support for NAND Flash on Sharp SL Series (C7xx + others)"
depends on MTD_NAND && ARCH_PXA
+config MTD_NAND_CS553X
+ tristate "NAND support for CS5535/CS5536 (AMD Geode companion chip)"
+ depends on MTD_NAND && X86_PC && PCI
+
config MTD_NAND_NANDSIM
tristate "Support for NAND Flash Simulator"
depends on MTD_NAND && MTD_PARTITIONS
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 41742026..0741d73 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -17,6 +17,8 @@
obj-$(CONFIG_MTD_NAND_H1900) += h1910.o
obj-$(CONFIG_MTD_NAND_RTC_FROM4) += rtc_from4.o
obj-$(CONFIG_MTD_NAND_SHARPSL) += sharpsl.o
+obj-$(CONFIG_MTD_NAND_TS7250) += ts7250.o
obj-$(CONFIG_MTD_NAND_NANDSIM) += nandsim.o
+obj-$(CONFIG_MTD_NAND_CS553X) += cs553x_nand.o
nand-objs = nand_base.o nand_bbt.o
diff --git a/drivers/mtd/nand/au1550nd.c b/drivers/mtd/nand/au1550nd.c
index bde3550..87d3435 100644
--- a/drivers/mtd/nand/au1550nd.c
+++ b/drivers/mtd/nand/au1550nd.c
@@ -38,22 +38,20 @@
*/
static struct mtd_info *au1550_mtd = NULL;
static void __iomem *p_nand;
-static int nand_width = 1; /* default x8*/
+static int nand_width = 1; /* default x8 */
/*
* Define partitions for flash device
*/
static const struct mtd_partition partition_info[] = {
{
- .name = "NAND FS 0",
- .offset = 0,
- .size = 8*1024*1024
- },
+ .name = "NAND FS 0",
+ .offset = 0,
+ .size = 8 * 1024 * 1024},
{
- .name = "NAND FS 1",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL
- }
+ .name = "NAND FS 1",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL}
};
/**
@@ -157,7 +155,7 @@
int i;
struct nand_chip *this = mtd->priv;
- for (i=0; i<len; i++) {
+ for (i = 0; i < len; i++) {
writeb(buf[i], this->IO_ADDR_W);
au_sync();
}
@@ -176,7 +174,7 @@
int i;
struct nand_chip *this = mtd->priv;
- for (i=0; i<len; i++) {
+ for (i = 0; i < len; i++) {
buf[i] = readb(this->IO_ADDR_R);
au_sync();
}
@@ -195,7 +193,7 @@
int i;
struct nand_chip *this = mtd->priv;
- for (i=0; i<len; i++) {
+ for (i = 0; i < len; i++) {
if (buf[i] != readb(this->IO_ADDR_R))
return -EFAULT;
au_sync();
@@ -219,7 +217,7 @@
u16 *p = (u16 *) buf;
len >>= 1;
- for (i=0; i<len; i++) {
+ for (i = 0; i < len; i++) {
writew(p[i], this->IO_ADDR_W);
au_sync();
}
@@ -241,7 +239,7 @@
u16 *p = (u16 *) buf;
len >>= 1;
- for (i=0; i<len; i++) {
+ for (i = 0; i < len; i++) {
p[i] = readw(this->IO_ADDR_R);
au_sync();
}
@@ -262,7 +260,7 @@
u16 *p = (u16 *) buf;
len >>= 1;
- for (i=0; i<len; i++) {
+ for (i = 0; i < len; i++) {
if (p[i] != readw(this->IO_ADDR_R))
return -EFAULT;
au_sync();
@@ -275,27 +273,35 @@
{
register struct nand_chip *this = mtd->priv;
- switch(cmd){
+ switch (cmd) {
- case NAND_CTL_SETCLE: this->IO_ADDR_W = p_nand + MEM_STNAND_CMD; break;
- case NAND_CTL_CLRCLE: this->IO_ADDR_W = p_nand + MEM_STNAND_DATA; break;
+ case NAND_CTL_SETCLE:
+ this->IO_ADDR_W = p_nand + MEM_STNAND_CMD;
+ break;
- case NAND_CTL_SETALE: this->IO_ADDR_W = p_nand + MEM_STNAND_ADDR; break;
+ case NAND_CTL_CLRCLE:
+ this->IO_ADDR_W = p_nand + MEM_STNAND_DATA;
+ break;
+
+ case NAND_CTL_SETALE:
+ this->IO_ADDR_W = p_nand + MEM_STNAND_ADDR;
+ break;
+
case NAND_CTL_CLRALE:
this->IO_ADDR_W = p_nand + MEM_STNAND_DATA;
- /* FIXME: Nobody knows why this is neccecary,
+ /* FIXME: Nobody knows why this is necessary,
* but it works only that way */
udelay(1);
break;
case NAND_CTL_SETNCE:
/* assert (force assert) chip enable */
- au_writel((1<<(4+NAND_CS)) , MEM_STNDCTL); break;
+ au_writel((1 << (4 + NAND_CS)), MEM_STNDCTL);
break;
case NAND_CTL_CLRNCE:
- /* deassert chip enable */
- au_writel(0, MEM_STNDCTL); break;
+ /* deassert chip enable */
+ au_writel(0, MEM_STNDCTL);
break;
}
@@ -315,66 +321,64 @@
/*
* Main initialization routine
*/
-int __init au1xxx_nand_init (void)
+int __init au1xxx_nand_init(void)
{
struct nand_chip *this;
- u16 boot_swapboot = 0; /* default value */
+ u16 boot_swapboot = 0; /* default value */
int retval;
u32 mem_staddr;
u32 nand_phys;
/* Allocate memory for MTD device structure and private data */
- au1550_mtd = kmalloc (sizeof(struct mtd_info) +
- sizeof (struct nand_chip), GFP_KERNEL);
+ au1550_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
if (!au1550_mtd) {
- printk ("Unable to allocate NAND MTD dev structure.\n");
+ printk("Unable to allocate NAND MTD dev structure.\n");
return -ENOMEM;
}
/* Get pointer to private data */
- this = (struct nand_chip *) (&au1550_mtd[1]);
+ this = (struct nand_chip *)(&au1550_mtd[1]);
/* Initialize structures */
- memset((char *) au1550_mtd, 0, sizeof(struct mtd_info));
- memset((char *) this, 0, sizeof(struct nand_chip));
+ memset(au1550_mtd, 0, sizeof(struct mtd_info));
+ memset(this, 0, sizeof(struct nand_chip));
/* Link the private data with the MTD structure */
au1550_mtd->priv = this;
-
+ au1550_mtd->owner = THIS_MODULE;
/* disable interrupts */
- au_writel(au_readl(MEM_STNDCTL) & ~(1<<8), MEM_STNDCTL);
+ au_writel(au_readl(MEM_STNDCTL) & ~(1 << 8), MEM_STNDCTL);
/* disable NAND boot */
- au_writel(au_readl(MEM_STNDCTL) & ~(1<<0), MEM_STNDCTL);
+ au_writel(au_readl(MEM_STNDCTL) & ~(1 << 0), MEM_STNDCTL);
#ifdef CONFIG_MIPS_PB1550
/* set gpio206 high */
- au_writel(au_readl(GPIO2_DIR) & ~(1<<6), GPIO2_DIR);
+ au_writel(au_readl(GPIO2_DIR) & ~(1 << 6), GPIO2_DIR);
- boot_swapboot = (au_readl(MEM_STSTAT) & (0x7<<1)) |
- ((bcsr->status >> 6) & 0x1);
+ boot_swapboot = (au_readl(MEM_STSTAT) & (0x7 << 1)) | ((bcsr->status >> 6) & 0x1);
switch (boot_swapboot) {
- case 0:
- case 2:
- case 8:
- case 0xC:
- case 0xD:
- /* x16 NAND Flash */
- nand_width = 0;
- break;
- case 1:
- case 9:
- case 3:
- case 0xE:
- case 0xF:
- /* x8 NAND Flash */
- nand_width = 1;
- break;
- default:
- printk("Pb1550 NAND: bad boot:swap\n");
- retval = -EINVAL;
- goto outmem;
+ case 0:
+ case 2:
+ case 8:
+ case 0xC:
+ case 0xD:
+ /* x16 NAND Flash */
+ nand_width = 0;
+ break;
+ case 1:
+ case 9:
+ case 3:
+ case 0xE:
+ case 0xF:
+ /* x8 NAND Flash */
+ nand_width = 1;
+ break;
+ default:
+ printk("Pb1550 NAND: bad boot:swap\n");
+ retval = -EINVAL;
+ goto outmem;
}
#endif
@@ -424,14 +428,13 @@
/* make controller and MTD agree */
if (NAND_CS == 0)
- nand_width = au_readl(MEM_STCFG0) & (1<<22);
+ nand_width = au_readl(MEM_STCFG0) & (1 << 22);
if (NAND_CS == 1)
- nand_width = au_readl(MEM_STCFG1) & (1<<22);
+ nand_width = au_readl(MEM_STCFG1) & (1 << 22);
if (NAND_CS == 2)
- nand_width = au_readl(MEM_STCFG2) & (1<<22);
+ nand_width = au_readl(MEM_STCFG2) & (1 << 22);
if (NAND_CS == 3)
- nand_width = au_readl(MEM_STCFG3) & (1<<22);
-
+ nand_width = au_readl(MEM_STCFG3) & (1 << 22);
/* Set address of hardware control function */
this->hwcontrol = au1550_hwcontrol;
@@ -454,7 +457,7 @@
this->verify_buf = (!nand_width) ? au_verify_buf16 : au_verify_buf;
/* Scan to find existence of the device */
- if (nand_scan (au1550_mtd, 1)) {
+ if (nand_scan(au1550_mtd, 1)) {
retval = -ENXIO;
goto outio;
}
@@ -465,10 +468,10 @@
return 0;
outio:
- iounmap ((void *)p_nand);
+ iounmap((void *)p_nand);
outmem:
- kfree (au1550_mtd);
+ kfree(au1550_mtd);
return retval;
}
@@ -478,19 +481,20 @@
* Clean up routine
*/
#ifdef MODULE
-static void __exit au1550_cleanup (void)
+static void __exit au1550_cleanup(void)
{
- struct nand_chip *this = (struct nand_chip *) &au1550_mtd[1];
+ struct nand_chip *this = (struct nand_chip *)&au1550_mtd[1];
/* Release resources, unregister device */
- nand_release (au1550_mtd);
+ nand_release(au1550_mtd);
/* Free the MTD device structure */
- kfree (au1550_mtd);
+ kfree(au1550_mtd);
/* Unmap */
- iounmap ((void *)p_nand);
+ iounmap((void *)p_nand);
}
+
module_exit(au1550_cleanup);
#endif
diff --git a/drivers/mtd/nand/autcpu12.c b/drivers/mtd/nand/autcpu12.c
index a3c7fea..330deb0 100644
--- a/drivers/mtd/nand/autcpu12.c
+++ b/drivers/mtd/nand/autcpu12.c
@@ -47,7 +47,7 @@
static int autcpu12_fio_pbase = AUTCPU12_PHYS_SMC;
static int autcpu12_fio_ctrl = AUTCPU12_SMC_SELECT_OFFSET;
static int autcpu12_pedr = AUTCPU12_SMC_PORT_OFFSET;
-static void __iomem * autcpu12_fio_base;
+static void __iomem *autcpu12_fio_base;
/*
* Define partitions for flash devices
@@ -95,10 +95,10 @@
/*
* hardware specific access to control-lines
*/
+
static void autcpu12_hwcontrol(struct mtd_info *mtd, int cmd)
{
-
- switch(cmd){
+ switch (cmd) {
case NAND_CTL_SETCLE: (*(volatile unsigned char *) (autcpu12_io_base + autcpu12_pedr)) |= AUTCPU12_SMC_CLE; break;
case NAND_CTL_CLRCLE: (*(volatile unsigned char *) (autcpu12_io_base + autcpu12_pedr)) &= ~AUTCPU12_SMC_CLE; break;
@@ -117,44 +117,44 @@
int autcpu12_device_ready(struct mtd_info *mtd)
{
- return ( (*(volatile unsigned char *) (autcpu12_io_base + autcpu12_pedr)) & AUTCPU12_SMC_RDY) ? 1 : 0;
+ return ((*(volatile unsigned char *)(autcpu12_io_base + autcpu12_pedr)) & AUTCPU12_SMC_RDY) ? 1 : 0;
}
/*
* Main initialization routine
*/
-int __init autcpu12_init (void)
+int __init autcpu12_init(void)
{
struct nand_chip *this;
int err = 0;
/* Allocate memory for MTD device structure and private data */
- autcpu12_mtd = kmalloc (sizeof(struct mtd_info) + sizeof (struct nand_chip),
- GFP_KERNEL);
+ autcpu12_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
if (!autcpu12_mtd) {
- printk ("Unable to allocate AUTCPU12 NAND MTD device structure.\n");
+ printk("Unable to allocate AUTCPU12 NAND MTD device structure.\n");
err = -ENOMEM;
goto out;
}
/* map physical adress */
- autcpu12_fio_base = ioremap(autcpu12_fio_pbase,SZ_1K);
- if(!autcpu12_fio_base){
+ autcpu12_fio_base = ioremap(autcpu12_fio_pbase, SZ_1K);
+ if (!autcpu12_fio_base) {
printk("Ioremap autcpu12 SmartMedia Card failed\n");
err = -EIO;
goto out_mtd;
}
/* Get pointer to private data */
- this = (struct nand_chip *) (&autcpu12_mtd[1]);
+ this = (struct nand_chip *)(&autcpu12_mtd[1]);
/* Initialize structures */
- memset((char *) autcpu12_mtd, 0, sizeof(struct mtd_info));
- memset((char *) this, 0, sizeof(struct nand_chip));
+ memset(autcpu12_mtd, 0, sizeof(struct mtd_info));
+ memset(this, 0, sizeof(struct nand_chip));
/* Link the private data with the MTD structure */
autcpu12_mtd->priv = this;
+ autcpu12_mtd->owner = THIS_MODULE;
/* Set address of NAND IO lines */
this->IO_ADDR_R = autcpu12_fio_base;
@@ -167,35 +167,34 @@
/* Enable the following for a flash based bad block table */
/*
- this->options = NAND_USE_FLASH_BBT;
- */
+ this->options = NAND_USE_FLASH_BBT;
+ */
this->options = NAND_USE_FLASH_BBT;
/* Scan to find existance of the device */
- if (nand_scan (autcpu12_mtd, 1)) {
+ if (nand_scan(autcpu12_mtd, 1)) {
err = -ENXIO;
goto out_ior;
}
/* Register the partitions */
- switch(autcpu12_mtd->size){
+ switch (autcpu12_mtd->size) {
case SZ_16M: add_mtd_partitions(autcpu12_mtd, partition_info16k, NUM_PARTITIONS16K); break;
case SZ_32M: add_mtd_partitions(autcpu12_mtd, partition_info32k, NUM_PARTITIONS32K); break;
case SZ_64M: add_mtd_partitions(autcpu12_mtd, partition_info64k, NUM_PARTITIONS64K); break;
case SZ_128M: add_mtd_partitions(autcpu12_mtd, partition_info128k, NUM_PARTITIONS128K); break;
- default: {
- printk ("Unsupported SmartMedia device\n");
+ default:
+ printk("Unsupported SmartMedia device\n");
err = -ENXIO;
goto out_ior;
- }
}
goto out;
-out_ior:
+ out_ior:
iounmap((void *)autcpu12_fio_base);
-out_mtd:
- kfree (autcpu12_mtd);
-out:
+ out_mtd:
+ kfree(autcpu12_mtd);
+ out:
return err;
}
@@ -205,17 +204,18 @@
* Clean up routine
*/
#ifdef MODULE
-static void __exit autcpu12_cleanup (void)
+static void __exit autcpu12_cleanup(void)
{
/* Release resources, unregister device */
- nand_release (autcpu12_mtd);
+ nand_release(autcpu12_mtd);
/* unmap physical adress */
iounmap((void *)autcpu12_fio_base);
/* Free the MTD device structure */
- kfree (autcpu12_mtd);
+ kfree(autcpu12_mtd);
}
+
module_exit(autcpu12_cleanup);
#endif
diff --git a/drivers/mtd/nand/cs553x_nand.c b/drivers/mtd/nand/cs553x_nand.c
new file mode 100644
index 0000000..d5b0551
--- /dev/null
+++ b/drivers/mtd/nand/cs553x_nand.c
@@ -0,0 +1,341 @@
+/*
+ * drivers/mtd/nand/cs553x_nand.c
+ *
+ * (C) 2005, 2006 Red Hat Inc.
+ *
+ * Author: David Woodhouse <dwmw2@infradead.org>
+ * Tom Sylla <tom.sylla@amd.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Overview:
+ * This is a device driver for the NAND flash controller found on
+ * the AMD CS5535/CS5536 companion chipsets for the Geode processor.
+ *
+ */
+
+#include <linux/slab.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/pci.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/nand_ecc.h>
+#include <linux/mtd/partitions.h>
+
+#include <asm/msr.h>
+#include <asm/io.h>
+
+#define NR_CS553X_CONTROLLERS 4
+
+/* NAND Timing MSRs */
+#define MSR_NANDF_DATA 0x5140001b /* NAND Flash Data Timing MSR */
+#define MSR_NANDF_CTL 0x5140001c /* NAND Flash Control Timing */
+#define MSR_NANDF_RSVD 0x5140001d /* Reserved */
+
+/* NAND BAR MSRs */
+#define MSR_DIVIL_LBAR_FLSH0 0x51400010 /* Flash Chip Select 0 */
+#define MSR_DIVIL_LBAR_FLSH1 0x51400011 /* Flash Chip Select 1 */
+#define MSR_DIVIL_LBAR_FLSH2 0x51400012 /* Flash Chip Select 2 */
+#define MSR_DIVIL_LBAR_FLSH3 0x51400013 /* Flash Chip Select 3 */
+ /* Each made up of... */
+#define FLSH_LBAR_EN (1ULL<<32)
+#define FLSH_NOR_NAND (1ULL<<33) /* 1 for NAND */
+#define FLSH_MEM_IO (1ULL<<34) /* 1 for MMIO */
+ /* I/O BARs have BASE_ADDR in bits 15:4, IO_MASK in 47:36 */
+ /* MMIO BARs have BASE_ADDR in bits 31:12, MEM_MASK in 63:44 */
+
+/* Pin function selection MSR (IDE vs. flash on the IDE pins) */
+#define MSR_DIVIL_BALL_OPTS 0x51400015
+#define PIN_OPT_IDE (1<<0) /* 0 for flash, 1 for IDE */
+
+/* Registers within the NAND flash controller BAR -- memory mapped */
+#define MM_NAND_DATA 0x00 /* 0 to 0x7ff, in fact */
+#define MM_NAND_CTL 0x800 /* Any even address 0x800-0x80e */
+#define MM_NAND_IO 0x801 /* Any odd address 0x801-0x80f */
+#define MM_NAND_STS 0x810
+#define MM_NAND_ECC_LSB 0x811
+#define MM_NAND_ECC_MSB 0x812
+#define MM_NAND_ECC_COL 0x813
+#define MM_NAND_LAC 0x814
+#define MM_NAND_ECC_CTL 0x815
+
+/* Registers within the NAND flash controller BAR -- I/O mapped */
+#define IO_NAND_DATA 0x00 /* 0 to 3, in fact */
+#define IO_NAND_CTL 0x04
+#define IO_NAND_IO 0x05
+#define IO_NAND_STS 0x06
+#define IO_NAND_ECC_CTL 0x08
+#define IO_NAND_ECC_LSB 0x09
+#define IO_NAND_ECC_MSB 0x0a
+#define IO_NAND_ECC_COL 0x0b
+#define IO_NAND_LAC 0x0c
+
+#define CS_NAND_CTL_DIST_EN (1<<4) /* Enable NAND Distract interrupt */
+#define CS_NAND_CTL_RDY_INT_MASK (1<<3) /* Enable RDY/BUSY# interrupt */
+#define CS_NAND_CTL_ALE (1<<2)
+#define CS_NAND_CTL_CLE (1<<1)
+#define CS_NAND_CTL_CE (1<<0) /* Keep low; 1 to reset */
+
+#define CS_NAND_STS_FLASH_RDY (1<<3)
+#define CS_NAND_CTLR_BUSY (1<<2)
+#define CS_NAND_CMD_COMP (1<<1)
+#define CS_NAND_DIST_ST (1<<0)
+
+#define CS_NAND_ECC_PARITY (1<<2)
+#define CS_NAND_ECC_CLRECC (1<<1)
+#define CS_NAND_ECC_ENECC (1<<0)
+
+static void cs553x_read_buf(struct mtd_info *mtd, u_char *buf, int len)
+{
+ struct nand_chip *this = mtd->priv;
+
+ while (unlikely(len > 0x800)) {
+ memcpy_fromio(buf, this->IO_ADDR_R, 0x800);
+ buf += 0x800;
+ len -= 0x800;
+ }
+ memcpy_fromio(buf, this->IO_ADDR_R, len);
+}
+
+static void cs553x_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
+{
+ struct nand_chip *this = mtd->priv;
+
+ while (unlikely(len > 0x800)) {
+ memcpy_toio(this->IO_ADDR_R, buf, 0x800);
+ buf += 0x800;
+ len -= 0x800;
+ }
+ memcpy_toio(this->IO_ADDR_R, buf, len);
+}
+
+static unsigned char cs553x_read_byte(struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd->priv;
+ return readb(this->IO_ADDR_R);
+}
+
+static void cs553x_write_byte(struct mtd_info *mtd, u_char byte)
+{
+ struct nand_chip *this = mtd->priv;
+ int i = 100000;
+
+ while (i && readb(this->IO_ADDR_R + MM_NAND_STS) & CS_NAND_CTLR_BUSY) {
+ udelay(1);
+ i--;
+ }
+ writeb(byte, this->IO_ADDR_W + 0x801);
+}
+
+static void cs553x_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+ struct nand_chip *this = mtd->priv;
+ void __iomem *mmio_base = this->IO_ADDR_R;
+ unsigned char ctl;
+
+ switch (cmd) {
+ case NAND_CTL_SETCLE:
+ ctl = CS_NAND_CTL_CLE;
+ break;
+
+ case NAND_CTL_CLRCLE:
+ case NAND_CTL_CLRALE:
+ case NAND_CTL_SETNCE:
+ ctl = 0;
+ break;
+
+ case NAND_CTL_SETALE:
+ ctl = CS_NAND_CTL_ALE;
+ break;
+
+ default:
+ case NAND_CTL_CLRNCE:
+ ctl = CS_NAND_CTL_CE;
+ break;
+ }
+ writeb(ctl, mmio_base + MM_NAND_CTL);
+}
+
+static int cs553x_device_ready(struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd->priv;
+ void __iomem *mmio_base = this->IO_ADDR_R;
+ unsigned char foo = readb(mmio_base + MM_NAND_STS);
+
+ return (foo & CS_NAND_STS_FLASH_RDY) && !(foo & CS_NAND_CTLR_BUSY);
+}
+
+static void cs_enable_hwecc(struct mtd_info *mtd, int mode)
+{
+ struct nand_chip *this = mtd->priv;
+ void __iomem *mmio_base = this->IO_ADDR_R;
+
+ writeb(0x07, mmio_base + MM_NAND_ECC_CTL);
+}
+
+static int cs_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
+{
+ uint32_t ecc;
+ struct nand_chip *this = mtd->priv;
+ void __iomem *mmio_base = this->IO_ADDR_R;
+
+ ecc = readl(mmio_base + MM_NAND_STS);
+
+ ecc_code[1] = ecc >> 8;
+ ecc_code[0] = ecc >> 16;
+ ecc_code[2] = ecc >> 24;
+ return 0;
+}
+
+static struct mtd_info *cs553x_mtd[4];
+
+static int __init cs553x_init_one(int cs, int mmio, unsigned long adr)
+{
+ int err = 0;
+ struct nand_chip *this;
+ struct mtd_info *new_mtd;
+
+ printk(KERN_NOTICE "Probing CS553x NAND controller CS#%d at %sIO 0x%08lx\n", cs, mmio?"MM":"P", adr);
+
+ if (!mmio) {
+ printk(KERN_NOTICE "PIO mode not yet implemented for CS553X NAND controller\n");
+ return -ENXIO;
+ }
+
+ /* Allocate memory for MTD device structure and private data */
+ new_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
+ if (!new_mtd) {
+ printk(KERN_WARNING "Unable to allocate CS553X NAND MTD device structure.\n");
+ err = -ENOMEM;
+ goto out;
+ }
+
+ /* Get pointer to private data */
+ this = (struct nand_chip *)(&new_mtd[1]);
+
+ /* Initialize structures */
+ memset(new_mtd, 0, sizeof(struct mtd_info));
+ memset(this, 0, sizeof(struct nand_chip));
+
+ /* Link the private data with the MTD structure */
+ new_mtd->priv = this;
+ new_mtd->owner = THIS_MODULE;
+
+ /* map physical address */
+ this->IO_ADDR_R = this->IO_ADDR_W = ioremap(adr, 4096);
+ if (!this->IO_ADDR_R) {
+ printk(KERN_WARNING "ioremap cs553x NAND @0x%08lx failed\n", adr);
+ err = -EIO;
+ goto out_mtd;
+ }
+
+ this->hwcontrol = cs553x_hwcontrol;
+ this->dev_ready = cs553x_device_ready;
+ this->read_byte = cs553x_read_byte;
+ this->write_byte = cs553x_write_byte;
+ this->read_buf = cs553x_read_buf;
+ this->write_buf = cs553x_write_buf;
+
+ this->chip_delay = 0;
+
+ this->eccmode = NAND_ECC_HW3_256;
+ this->enable_hwecc = cs_enable_hwecc;
+ this->calculate_ecc = cs_calculate_ecc;
+ this->correct_data = nand_correct_data;
+
+ /* Enable the following for a flash based bad block table */
+ this->options = NAND_USE_FLASH_BBT | NAND_NO_AUTOINCR;
+
+ /* Scan to find existance of the device */
+ if (nand_scan(new_mtd, 1)) {
+ err = -ENXIO;
+ goto out_ior;
+ }
+
+ cs553x_mtd[cs] = new_mtd;
+ goto out;
+
+out_ior:
+ iounmap((void *)this->IO_ADDR_R);
+out_mtd:
+ kfree(new_mtd);
+out:
+ return err;
+}
+
+int __init cs553x_init(void)
+{
+ int err = -ENXIO;
+ int i;
+ uint64_t val;
+
+ /* Check whether we actually have a CS5535 or CS5536 */
+ if (!pci_find_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, NULL) &&
+ !pci_find_device(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA, NULL))
+ return -ENXIO;
+
+ rdmsrl(MSR_DIVIL_BALL_OPTS, val);
+ if (val & 1) {
+ printk(KERN_INFO "CS553x NAND controller: Flash I/O not enabled in MSR_DIVIL_BALL_OPTS.\n");
+ return -ENXIO;
+ }
+
+ for (i = 0; i < NR_CS553X_CONTROLLERS; i++) {
+ rdmsrl(MSR_DIVIL_LBAR_FLSH0 + i, val);
+
+ if ((val & (FLSH_LBAR_EN|FLSH_NOR_NAND)) == (FLSH_LBAR_EN|FLSH_NOR_NAND))
+ err = cs553x_init_one(i, !!(val & FLSH_MEM_IO), val & 0xFFFFFFFF);
+ }
+
+ /* Register all devices together here. This means we can easily hack it to
+ do mtdconcat etc. if we want to. */
+ for (i = 0; i < NR_CS553X_CONTROLLERS; i++) {
+ if (cs553x_mtd[i]) {
+ add_mtd_device(cs553x_mtd[i]);
+
+ /* If any devices registered, return success. Else the last error. */
+ err = 0;
+ }
+ }
+
+ return err;
+}
+
+module_init(cs553x_init);
+
+static void __exit cs553x_cleanup(void)
+{
+ int i;
+
+ for (i = 0; i < NR_CS553X_CONTROLLERS; i++) {
+ struct mtd_info *mtd = cs553x_mtd[i];
+ struct nand_chip *this;
+ void __iomem *mmio_base;
+
+ if (!mtd)
+ break;
+
+ this = cs553x_mtd[i]->priv;
+ mmio_base = this->IO_ADDR_R;
+
+ /* Release resources, unregister device */
+ nand_release(cs553x_mtd[i]);
+ cs553x_mtd[i] = NULL;
+
+ /* unmap physical adress */
+ iounmap(mmio_base);
+
+ /* Free the MTD device structure */
+ kfree(mtd);
+ }
+}
+
+module_exit(cs553x_cleanup);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
+MODULE_DESCRIPTION("NAND controller driver for AMD CS5535/CS5536 companion chip");
diff --git a/drivers/mtd/nand/diskonchip.c b/drivers/mtd/nand/diskonchip.c
index ec5e45e..a2391c6 100644
--- a/drivers/mtd/nand/diskonchip.c
+++ b/drivers/mtd/nand/diskonchip.c
@@ -58,10 +58,10 @@
0xe4000000,
#elif defined(CONFIG_MOMENCO_OCELOT)
0x2f000000,
- 0xff000000,
+ 0xff000000,
#elif defined(CONFIG_MOMENCO_OCELOT_G) || defined (CONFIG_MOMENCO_OCELOT_C)
- 0xff000000,
-##else
+ 0xff000000,
+#else
#warning Unknown architecture for DiskOnChip. No default probe locations defined
#endif
0xffffffff };
@@ -73,7 +73,7 @@
unsigned long physadr;
u_char ChipID;
u_char CDSNControl;
- int chips_per_floor; /* The number of chips detected on each floor */
+ int chips_per_floor; /* The number of chips detected on each floor */
int curfloor;
int curchip;
int mh0_page;
@@ -84,6 +84,7 @@
/* This is the syndrome computed by the HW ecc generator upon reading an empty
page, one with all 0xff for data and stored ecc code. */
static u_char empty_read_syndrome[6] = { 0x26, 0xff, 0x6d, 0x47, 0x73, 0x7a };
+
/* This is the ecc value computed by the HW ecc generator upon writing an empty
page, one with all 0xff for data. */
static u_char empty_write_ecc[6] = { 0x4b, 0x00, 0xe2, 0x0e, 0x93, 0xf7 };
@@ -97,25 +98,25 @@
static void doc200x_hwcontrol(struct mtd_info *mtd, int cmd);
static void doc200x_select_chip(struct mtd_info *mtd, int chip);
-static int debug=0;
+static int debug = 0;
module_param(debug, int, 0);
-static int try_dword=1;
+static int try_dword = 1;
module_param(try_dword, int, 0);
-static int no_ecc_failures=0;
+static int no_ecc_failures = 0;
module_param(no_ecc_failures, int, 0);
-static int no_autopart=0;
+static int no_autopart = 0;
module_param(no_autopart, int, 0);
-static int show_firmware_partition=0;
+static int show_firmware_partition = 0;
module_param(show_firmware_partition, int, 0);
#ifdef MTD_NAND_DISKONCHIP_BBTWRITE
-static int inftl_bbt_write=1;
+static int inftl_bbt_write = 1;
#else
-static int inftl_bbt_write=0;
+static int inftl_bbt_write = 0;
#endif
module_param(inftl_bbt_write, int, 0);
@@ -123,7 +124,6 @@
module_param(doc_config_location, ulong, 0);
MODULE_PARM_DESC(doc_config_location, "Physical memory address at which to probe for DiskOnChip");
-
/* Sector size for HW ECC */
#define SECTOR_SIZE 512
/* The sector bytes are packed into NB_DATA 10 bit words */
@@ -147,7 +147,7 @@
* some comments, improved a minor bit and converted it to make use
* of the generic Reed-Solomon libary. tglx
*/
-static int doc_ecc_decode (struct rs_control *rs, uint8_t *data, uint8_t *ecc)
+static int doc_ecc_decode(struct rs_control *rs, uint8_t *data, uint8_t *ecc)
{
int i, j, nerr, errpos[8];
uint8_t parity;
@@ -168,18 +168,18 @@
* s[i] = ds[3]x^3 + ds[2]x^2 + ds[1]x^1 + ds[0]
* where x = alpha^(FCR + i)
*/
- for(j = 1; j < NROOTS; j++) {
- if(ds[j] == 0)
+ for (j = 1; j < NROOTS; j++) {
+ if (ds[j] == 0)
continue;
tmp = rs->index_of[ds[j]];
- for(i = 0; i < NROOTS; i++)
+ for (i = 0; i < NROOTS; i++)
s[i] ^= rs->alpha_to[rs_modnn(rs, tmp + (FCR + i) * j)];
}
/* Calc s[i] = s[i] / alpha^(v + i) */
for (i = 0; i < NROOTS; i++) {
if (syn[i])
- syn[i] = rs_modnn(rs, rs->index_of[s[i]] + (NN - FCR - i));
+ syn[i] = rs_modnn(rs, rs->index_of[s[i]] + (NN - FCR - i));
}
/* Call the decoder library */
nerr = decode_rs16(rs, NULL, NULL, 1019, syn, 0, errpos, 0, errval);
@@ -193,7 +193,7 @@
* but they are given by the design of the de/encoder circuit
* in the DoC ASIC's.
*/
- for(i = 0;i < nerr; i++) {
+ for (i = 0; i < nerr; i++) {
int index, bitpos, pos = 1015 - errpos[i];
uint8_t val;
if (pos >= NB_DATA && pos < 1019)
@@ -205,8 +205,7 @@
can be modified since pos is even */
index = (pos >> 3) ^ 1;
bitpos = pos & 7;
- if ((index >= 0 && index < SECTOR_SIZE) ||
- index == (SECTOR_SIZE + 1)) {
+ if ((index >= 0 && index < SECTOR_SIZE) || index == (SECTOR_SIZE + 1)) {
val = (uint8_t) (errval[i] >> (2 + bitpos));
parity ^= val;
if (index < SECTOR_SIZE)
@@ -216,9 +215,8 @@
bitpos = (bitpos + 10) & 7;
if (bitpos == 0)
bitpos = 8;
- if ((index >= 0 && index < SECTOR_SIZE) ||
- index == (SECTOR_SIZE + 1)) {
- val = (uint8_t)(errval[i] << (8 - bitpos));
+ if ((index >= 0 && index < SECTOR_SIZE) || index == (SECTOR_SIZE + 1)) {
+ val = (uint8_t) (errval[i] << (8 - bitpos));
parity ^= val;
if (index < SECTOR_SIZE)
data[index] ^= val;
@@ -250,10 +248,11 @@
/* DOC_WaitReady: Wait for RDY line to be asserted by the flash chip */
static int _DoC_WaitReady(struct doc_priv *doc)
{
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
unsigned long timeo = jiffies + (HZ * 10);
- if(debug) printk("_DoC_WaitReady...\n");
+ if (debug)
+ printk("_DoC_WaitReady...\n");
/* Out-of-line routine to wait for chip response */
if (DoC_is_MillenniumPlus(doc)) {
while ((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK) {
@@ -280,7 +279,7 @@
static inline int DoC_WaitReady(struct doc_priv *doc)
{
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
int ret = 0;
if (DoC_is_MillenniumPlus(doc)) {
@@ -298,7 +297,8 @@
DoC_Delay(doc, 2);
}
- if(debug) printk("DoC_WaitReady OK\n");
+ if (debug)
+ printk("DoC_WaitReady OK\n");
return ret;
}
@@ -306,9 +306,10 @@
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
- if(debug)printk("write_byte %02x\n", datum);
+ if (debug)
+ printk("write_byte %02x\n", datum);
WriteDOC(datum, docptr, CDSNSlowIO);
WriteDOC(datum, docptr, 2k_CDSN_IO);
}
@@ -317,77 +318,78 @@
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
u_char ret;
ReadDOC(docptr, CDSNSlowIO);
DoC_Delay(doc, 2);
ret = ReadDOC(docptr, 2k_CDSN_IO);
- if (debug) printk("read_byte returns %02x\n", ret);
+ if (debug)
+ printk("read_byte returns %02x\n", ret);
return ret;
}
-static void doc2000_writebuf(struct mtd_info *mtd,
- const u_char *buf, int len)
+static void doc2000_writebuf(struct mtd_info *mtd, const u_char *buf, int len)
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
int i;
- if (debug)printk("writebuf of %d bytes: ", len);
- for (i=0; i < len; i++) {
+ if (debug)
+ printk("writebuf of %d bytes: ", len);
+ for (i = 0; i < len; i++) {
WriteDOC_(buf[i], docptr, DoC_2k_CDSN_IO + i);
if (debug && i < 16)
printk("%02x ", buf[i]);
}
- if (debug) printk("\n");
+ if (debug)
+ printk("\n");
}
-static void doc2000_readbuf(struct mtd_info *mtd,
- u_char *buf, int len)
+static void doc2000_readbuf(struct mtd_info *mtd, u_char *buf, int len)
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
- int i;
+ void __iomem *docptr = doc->virtadr;
+ int i;
- if (debug)printk("readbuf of %d bytes: ", len);
+ if (debug)
+ printk("readbuf of %d bytes: ", len);
- for (i=0; i < len; i++) {
+ for (i = 0; i < len; i++) {
buf[i] = ReadDOC(docptr, 2k_CDSN_IO + i);
}
}
-static void doc2000_readbuf_dword(struct mtd_info *mtd,
- u_char *buf, int len)
+static void doc2000_readbuf_dword(struct mtd_info *mtd, u_char *buf, int len)
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
- int i;
+ void __iomem *docptr = doc->virtadr;
+ int i;
- if (debug) printk("readbuf_dword of %d bytes: ", len);
+ if (debug)
+ printk("readbuf_dword of %d bytes: ", len);
- if (unlikely((((unsigned long)buf)|len) & 3)) {
- for (i=0; i < len; i++) {
- *(uint8_t *)(&buf[i]) = ReadDOC(docptr, 2k_CDSN_IO + i);
+ if (unlikely((((unsigned long)buf) | len) & 3)) {
+ for (i = 0; i < len; i++) {
+ *(uint8_t *) (&buf[i]) = ReadDOC(docptr, 2k_CDSN_IO + i);
}
} else {
- for (i=0; i < len; i+=4) {
- *(uint32_t*)(&buf[i]) = readl(docptr + DoC_2k_CDSN_IO + i);
+ for (i = 0; i < len; i += 4) {
+ *(uint32_t *) (&buf[i]) = readl(docptr + DoC_2k_CDSN_IO + i);
}
}
}
-static int doc2000_verifybuf(struct mtd_info *mtd,
- const u_char *buf, int len)
+static int doc2000_verifybuf(struct mtd_info *mtd, const u_char *buf, int len)
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
int i;
- for (i=0; i < len; i++)
+ for (i = 0; i < len; i++)
if (buf[i] != ReadDOC(docptr, 2k_CDSN_IO))
return -EFAULT;
return 0;
@@ -482,7 +484,7 @@
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
WriteDOC(datum, docptr, CDSNSlowIO);
WriteDOC(datum, docptr, Mil_CDSN_IO);
@@ -493,7 +495,7 @@
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
//ReadDOC(docptr, CDSNSlowIO);
/* 11.4.5 -- delay twice to allow extended length cycle */
@@ -503,50 +505,47 @@
return ReadDOC(docptr, LastDataRead);
}
-static void doc2001_writebuf(struct mtd_info *mtd,
- const u_char *buf, int len)
+static void doc2001_writebuf(struct mtd_info *mtd, const u_char *buf, int len)
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
int i;
- for (i=0; i < len; i++)
+ for (i = 0; i < len; i++)
WriteDOC_(buf[i], docptr, DoC_Mil_CDSN_IO + i);
/* Terminate write pipeline */
WriteDOC(0x00, docptr, WritePipeTerm);
}
-static void doc2001_readbuf(struct mtd_info *mtd,
- u_char *buf, int len)
+static void doc2001_readbuf(struct mtd_info *mtd, u_char *buf, int len)
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
int i;
/* Start read pipeline */
ReadDOC(docptr, ReadPipeInit);
- for (i=0; i < len-1; i++)
+ for (i = 0; i < len - 1; i++)
buf[i] = ReadDOC(docptr, Mil_CDSN_IO + (i & 0xff));
/* Terminate read pipeline */
buf[i] = ReadDOC(docptr, LastDataRead);
}
-static int doc2001_verifybuf(struct mtd_info *mtd,
- const u_char *buf, int len)
+static int doc2001_verifybuf(struct mtd_info *mtd, const u_char *buf, int len)
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
int i;
/* Start read pipeline */
ReadDOC(docptr, ReadPipeInit);
- for (i=0; i < len-1; i++)
+ for (i = 0; i < len - 1; i++)
if (buf[i] != ReadDOC(docptr, Mil_CDSN_IO)) {
ReadDOC(docptr, LastDataRead);
return i;
@@ -560,87 +559,90 @@
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
u_char ret;
- ReadDOC(docptr, Mplus_ReadPipeInit);
- ReadDOC(docptr, Mplus_ReadPipeInit);
- ret = ReadDOC(docptr, Mplus_LastDataRead);
- if (debug) printk("read_byte returns %02x\n", ret);
+ ReadDOC(docptr, Mplus_ReadPipeInit);
+ ReadDOC(docptr, Mplus_ReadPipeInit);
+ ret = ReadDOC(docptr, Mplus_LastDataRead);
+ if (debug)
+ printk("read_byte returns %02x\n", ret);
return ret;
}
-static void doc2001plus_writebuf(struct mtd_info *mtd,
- const u_char *buf, int len)
+static void doc2001plus_writebuf(struct mtd_info *mtd, const u_char *buf, int len)
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
int i;
- if (debug)printk("writebuf of %d bytes: ", len);
- for (i=0; i < len; i++) {
+ if (debug)
+ printk("writebuf of %d bytes: ", len);
+ for (i = 0; i < len; i++) {
WriteDOC_(buf[i], docptr, DoC_Mil_CDSN_IO + i);
if (debug && i < 16)
printk("%02x ", buf[i]);
}
- if (debug) printk("\n");
+ if (debug)
+ printk("\n");
}
-static void doc2001plus_readbuf(struct mtd_info *mtd,
- u_char *buf, int len)
+static void doc2001plus_readbuf(struct mtd_info *mtd, u_char *buf, int len)
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
int i;
- if (debug)printk("readbuf of %d bytes: ", len);
+ if (debug)
+ printk("readbuf of %d bytes: ", len);
/* Start read pipeline */
ReadDOC(docptr, Mplus_ReadPipeInit);
ReadDOC(docptr, Mplus_ReadPipeInit);
- for (i=0; i < len-2; i++) {
+ for (i = 0; i < len - 2; i++) {
buf[i] = ReadDOC(docptr, Mil_CDSN_IO);
if (debug && i < 16)
printk("%02x ", buf[i]);
}
/* Terminate read pipeline */
- buf[len-2] = ReadDOC(docptr, Mplus_LastDataRead);
+ buf[len - 2] = ReadDOC(docptr, Mplus_LastDataRead);
if (debug && i < 16)
- printk("%02x ", buf[len-2]);
- buf[len-1] = ReadDOC(docptr, Mplus_LastDataRead);
+ printk("%02x ", buf[len - 2]);
+ buf[len - 1] = ReadDOC(docptr, Mplus_LastDataRead);
if (debug && i < 16)
- printk("%02x ", buf[len-1]);
- if (debug) printk("\n");
+ printk("%02x ", buf[len - 1]);
+ if (debug)
+ printk("\n");
}
-static int doc2001plus_verifybuf(struct mtd_info *mtd,
- const u_char *buf, int len)
+static int doc2001plus_verifybuf(struct mtd_info *mtd, const u_char *buf, int len)
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
int i;
- if (debug)printk("verifybuf of %d bytes: ", len);
+ if (debug)
+ printk("verifybuf of %d bytes: ", len);
/* Start read pipeline */
ReadDOC(docptr, Mplus_ReadPipeInit);
ReadDOC(docptr, Mplus_ReadPipeInit);
- for (i=0; i < len-2; i++)
+ for (i = 0; i < len - 2; i++)
if (buf[i] != ReadDOC(docptr, Mil_CDSN_IO)) {
ReadDOC(docptr, Mplus_LastDataRead);
ReadDOC(docptr, Mplus_LastDataRead);
return i;
}
- if (buf[len-2] != ReadDOC(docptr, Mplus_LastDataRead))
- return len-2;
- if (buf[len-1] != ReadDOC(docptr, Mplus_LastDataRead))
- return len-1;
+ if (buf[len - 2] != ReadDOC(docptr, Mplus_LastDataRead))
+ return len - 2;
+ if (buf[len - 1] != ReadDOC(docptr, Mplus_LastDataRead))
+ return len - 1;
return 0;
}
@@ -648,10 +650,11 @@
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
int floor = 0;
- if(debug)printk("select chip (%d)\n", chip);
+ if (debug)
+ printk("select chip (%d)\n", chip);
if (chip == -1) {
/* Disable flash internally */
@@ -660,7 +663,7 @@
}
floor = chip / doc->chips_per_floor;
- chip -= (floor * doc->chips_per_floor);
+ chip -= (floor * doc->chips_per_floor);
/* Assert ChipEnable and deassert WriteProtect */
WriteDOC((DOC_FLASH_CE), docptr, Mplus_FlashSelect);
@@ -674,16 +677,17 @@
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
int floor = 0;
- if(debug)printk("select chip (%d)\n", chip);
+ if (debug)
+ printk("select chip (%d)\n", chip);
if (chip == -1)
return;
floor = chip / doc->chips_per_floor;
- chip -= (floor * doc->chips_per_floor);
+ chip -= (floor * doc->chips_per_floor);
/* 11.4.4 -- deassert CE before changing chip */
doc200x_hwcontrol(mtd, NAND_CTL_CLRNCE);
@@ -701,9 +705,9 @@
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
- switch(cmd) {
+ switch (cmd) {
case NAND_CTL_SETNCE:
doc->CDSNControl |= CDSN_CTRL_CE;
break;
@@ -729,17 +733,18 @@
doc->CDSNControl &= ~CDSN_CTRL_WP;
break;
}
- if (debug)printk("hwcontrol(%d): %02x\n", cmd, doc->CDSNControl);
+ if (debug)
+ printk("hwcontrol(%d): %02x\n", cmd, doc->CDSNControl);
WriteDOC(doc->CDSNControl, docptr, CDSNControl);
/* 11.4.3 -- 4 NOPs after CSDNControl write */
DoC_Delay(doc, 4);
}
-static void doc2001plus_command (struct mtd_info *mtd, unsigned command, int column, int page_addr)
+static void doc2001plus_command(struct mtd_info *mtd, unsigned command, int column, int page_addr)
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
/*
* Must terminate write pipeline before sending any commands
@@ -782,25 +787,26 @@
WriteDOC(column, docptr, Mplus_FlashAddress);
}
if (page_addr != -1) {
- WriteDOC((unsigned char) (page_addr & 0xff), docptr, Mplus_FlashAddress);
- WriteDOC((unsigned char) ((page_addr >> 8) & 0xff), docptr, Mplus_FlashAddress);
+ WriteDOC((unsigned char)(page_addr & 0xff), docptr, Mplus_FlashAddress);
+ WriteDOC((unsigned char)((page_addr >> 8) & 0xff), docptr, Mplus_FlashAddress);
/* One more address cycle for higher density devices */
if (this->chipsize & 0x0c000000) {
- WriteDOC((unsigned char) ((page_addr >> 16) & 0x0f), docptr, Mplus_FlashAddress);
+ WriteDOC((unsigned char)((page_addr >> 16) & 0x0f), docptr, Mplus_FlashAddress);
printk("high density\n");
}
}
WriteDOC(0, docptr, Mplus_WritePipeTerm);
WriteDOC(0, docptr, Mplus_WritePipeTerm);
/* deassert ALE */
- if (command == NAND_CMD_READ0 || command == NAND_CMD_READ1 || command == NAND_CMD_READOOB || command == NAND_CMD_READID)
+ if (command == NAND_CMD_READ0 || command == NAND_CMD_READ1 ||
+ command == NAND_CMD_READOOB || command == NAND_CMD_READID)
WriteDOC(0, docptr, Mplus_FlashControl);
}
/*
* program and erase have their own busy handlers
* status and sequential in needs no delay
- */
+ */
switch (command) {
case NAND_CMD_PAGEPROG:
@@ -817,55 +823,57 @@
WriteDOC(NAND_CMD_STATUS, docptr, Mplus_FlashCmd);
WriteDOC(0, docptr, Mplus_WritePipeTerm);
WriteDOC(0, docptr, Mplus_WritePipeTerm);
- while ( !(this->read_byte(mtd) & 0x40));
+ while (!(this->read_byte(mtd) & 0x40)) ;
return;
- /* This applies to read commands */
+ /* This applies to read commands */
default:
/*
* If we don't have access to the busy pin, we apply the given
* command delay
- */
+ */
if (!this->dev_ready) {
- udelay (this->chip_delay);
+ udelay(this->chip_delay);
return;
}
}
/* Apply this short delay always to ensure that we do wait tWB in
* any case on any machine. */
- ndelay (100);
+ ndelay(100);
/* wait until command is processed */
- while (!this->dev_ready(mtd));
+ while (!this->dev_ready(mtd)) ;
}
static int doc200x_dev_ready(struct mtd_info *mtd)
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
if (DoC_is_MillenniumPlus(doc)) {
/* 11.4.2 -- must NOP four times before checking FR/B# */
DoC_Delay(doc, 4);
if ((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK) {
- if(debug)
+ if (debug)
printk("not ready\n");
return 0;
}
- if (debug)printk("was ready\n");
+ if (debug)
+ printk("was ready\n");
return 1;
} else {
/* 11.4.2 -- must NOP four times before checking FR/B# */
DoC_Delay(doc, 4);
if (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B)) {
- if(debug)
+ if (debug)
printk("not ready\n");
return 0;
}
/* 11.4.2 -- Must NOP twice if it's ready */
DoC_Delay(doc, 2);
- if (debug)printk("was ready\n");
+ if (debug)
+ printk("was ready\n");
return 1;
}
}
@@ -881,10 +889,10 @@
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
/* Prime the ECC engine */
- switch(mode) {
+ switch (mode) {
case NAND_ECC_READ:
WriteDOC(DOC_ECC_RESET, docptr, ECCConf);
WriteDOC(DOC_ECC_EN, docptr, ECCConf);
@@ -900,10 +908,10 @@
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
/* Prime the ECC engine */
- switch(mode) {
+ switch (mode) {
case NAND_ECC_READ:
WriteDOC(DOC_ECC_RESET, docptr, Mplus_ECCConf);
WriteDOC(DOC_ECC_EN, docptr, Mplus_ECCConf);
@@ -916,12 +924,11 @@
}
/* This code is only called on write */
-static int doc200x_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
- unsigned char *ecc_code)
+static int doc200x_calculate_ecc(struct mtd_info *mtd, const u_char *dat, unsigned char *ecc_code)
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
int i;
int emptymatch = 1;
@@ -961,7 +968,8 @@
often. It could be optimized away by examining the data in
the writebuf routine, and remembering the result. */
for (i = 0; i < 512; i++) {
- if (dat[i] == 0xff) continue;
+ if (dat[i] == 0xff)
+ continue;
emptymatch = 0;
break;
}
@@ -969,7 +977,8 @@
/* If emptymatch still =1, we do have an all-0xff data buffer.
Return all-0xff ecc value instead of the computed one, so
it'll look just like a freshly-erased page. */
- if (emptymatch) memset(ecc_code, 0xff, 6);
+ if (emptymatch)
+ memset(ecc_code, 0xff, 6);
#endif
return 0;
}
@@ -979,7 +988,7 @@
int i, ret = 0;
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
- void __iomem *docptr = doc->virtadr;
+ void __iomem *docptr = doc->virtadr;
volatile u_char dummy;
int emptymatch = 1;
@@ -1012,18 +1021,20 @@
all-0xff data and stored ecc block. Check the stored ecc. */
if (emptymatch) {
for (i = 0; i < 6; i++) {
- if (read_ecc[i] == 0xff) continue;
+ if (read_ecc[i] == 0xff)
+ continue;
emptymatch = 0;
break;
}
}
/* If emptymatch still =1, check the data block. */
if (emptymatch) {
- /* Note: this somewhat expensive test should not be triggered
- often. It could be optimized away by examining the data in
- the readbuf routine, and remembering the result. */
+ /* Note: this somewhat expensive test should not be triggered
+ often. It could be optimized away by examining the data in
+ the readbuf routine, and remembering the result. */
for (i = 0; i < 512; i++) {
- if (dat[i] == 0xff) continue;
+ if (dat[i] == 0xff)
+ continue;
emptymatch = 0;
break;
}
@@ -1032,7 +1043,8 @@
erased block, in which case the ECC will not come out right.
We'll suppress the error and tell the caller everything's
OK. Because it is. */
- if (!emptymatch) ret = doc_ecc_decode (rs_decoder, dat, calc_ecc);
+ if (!emptymatch)
+ ret = doc_ecc_decode(rs_decoder, dat, calc_ecc);
if (ret > 0)
printk(KERN_ERR "doc200x_correct_data corrected %d errors\n", ret);
}
@@ -1060,10 +1072,10 @@
* be able to handle out-of-order segments.
*/
static struct nand_oobinfo doc200x_oobinfo = {
- .useecc = MTD_NANDECC_AUTOPLACE,
- .eccbytes = 6,
- .eccpos = {0, 1, 2, 3, 4, 5},
- .oobfree = { {8, 8}, {6, 2} }
+ .useecc = MTD_NANDECC_AUTOPLACE,
+ .eccbytes = 6,
+ .eccpos = {0, 1, 2, 3, 4, 5},
+ .oobfree = {{8, 8}, {6, 2}}
};
/* Find the (I)NFTL Media Header, and optionally also the mirror media header.
@@ -1072,8 +1084,7 @@
either "ANAND" or "BNAND". If findmirror=1, also look for the mirror media
header. The page #s of the found media headers are placed in mh0_page and
mh1_page in the DOC private structure. */
-static int __init find_media_headers(struct mtd_info *mtd, u_char *buf,
- const char *id, int findmirror)
+static int __init find_media_headers(struct mtd_info *mtd, u_char *buf, const char *id, int findmirror)
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
@@ -1083,16 +1094,18 @@
for (offs = 0; offs < mtd->size; offs += mtd->erasesize) {
ret = mtd->read(mtd, offs, mtd->oobblock, &retlen, buf);
- if (retlen != mtd->oobblock) continue;
+ if (retlen != mtd->oobblock)
+ continue;
if (ret) {
- printk(KERN_WARNING "ECC error scanning DOC at 0x%x\n",
- offs);
+ printk(KERN_WARNING "ECC error scanning DOC at 0x%x\n", offs);
}
- if (memcmp(buf, id, 6)) continue;
+ if (memcmp(buf, id, 6))
+ continue;
printk(KERN_INFO "Found DiskOnChip %s Media Header at 0x%x\n", id, offs);
if (doc->mh0_page == -1) {
doc->mh0_page = offs >> this->page_shift;
- if (!findmirror) return 1;
+ if (!findmirror)
+ return 1;
continue;
}
doc->mh1_page = offs >> this->page_shift;
@@ -1114,8 +1127,7 @@
return 1;
}
-static inline int __init nftl_partscan(struct mtd_info *mtd,
- struct mtd_partition *parts)
+static inline int __init nftl_partscan(struct mtd_info *mtd, struct mtd_partition *parts)
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
@@ -1132,8 +1144,9 @@
printk(KERN_ERR "DiskOnChip mediaheader kmalloc failed!\n");
return 0;
}
- if (!(numheaders=find_media_headers(mtd, buf, "ANAND", 1))) goto out;
- mh = (struct NFTLMediaHeader *) buf;
+ if (!(numheaders = find_media_headers(mtd, buf, "ANAND", 1)))
+ goto out;
+ mh = (struct NFTLMediaHeader *)buf;
mh->NumEraseUnits = le16_to_cpu(mh->NumEraseUnits);
mh->FirstPhysicalEUN = le16_to_cpu(mh->FirstPhysicalEUN);
@@ -1155,8 +1168,8 @@
/* Auto-determine UnitSizeFactor. The constraints are:
- There can be at most 32768 virtual blocks.
- There can be at most (virtual block size - page size)
- virtual blocks (because MediaHeader+BBT must fit in 1).
- */
+ virtual blocks (because MediaHeader+BBT must fit in 1).
+ */
mh->UnitSizeFactor = 0xff;
while (blocks > maxblocks) {
blocks >>= 1;
@@ -1211,14 +1224,13 @@
}
ret = numparts;
-out:
+ out:
kfree(buf);
return ret;
}
/* This is a stripped-down copy of the code in inftlmount.c */
-static inline int __init inftl_partscan(struct mtd_info *mtd,
- struct mtd_partition *parts)
+static inline int __init inftl_partscan(struct mtd_info *mtd, struct mtd_partition *parts)
{
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
@@ -1241,9 +1253,10 @@
return 0;
}
- if (!find_media_headers(mtd, buf, "BNAND", 0)) goto out;
+ if (!find_media_headers(mtd, buf, "BNAND", 0))
+ goto out;
doc->mh1_page = doc->mh0_page + (4096 >> this->page_shift);
- mh = (struct INFTLMediaHeader *) buf;
+ mh = (struct INFTLMediaHeader *)buf;
mh->NoOfBootImageBlocks = le32_to_cpu(mh->NoOfBootImageBlocks);
mh->NoOfBinaryPartitions = le32_to_cpu(mh->NoOfBinaryPartitions);
@@ -1319,8 +1332,10 @@
parts[numparts].offset = ip->firstUnit << vshift;
parts[numparts].size = (1 + ip->lastUnit - ip->firstUnit) << vshift;
numparts++;
- if (ip->lastUnit > lastvunit) lastvunit = ip->lastUnit;
- if (ip->flags & INFTL_LAST) break;
+ if (ip->lastUnit > lastvunit)
+ lastvunit = ip->lastUnit;
+ if (ip->flags & INFTL_LAST)
+ break;
}
lastvunit++;
if ((lastvunit << vshift) < end) {
@@ -1330,7 +1345,7 @@
numparts++;
}
ret = numparts;
-out:
+ out:
kfree(buf);
return ret;
}
@@ -1342,11 +1357,12 @@
struct doc_priv *doc = this->priv;
struct mtd_partition parts[2];
- memset((char *) parts, 0, sizeof(parts));
+ memset((char *)parts, 0, sizeof(parts));
/* On NFTL, we have to find the media headers before we can read the
BBTs, since they're stored in the media header eraseblocks. */
numparts = nftl_partscan(mtd, parts);
- if (!numparts) return -EIO;
+ if (!numparts)
+ return -EIO;
this->bbt_td->options = NAND_BBT_ABSPAGE | NAND_BBT_8BIT |
NAND_BBT_SAVECONTENT | NAND_BBT_WRITE |
NAND_BBT_VERSION;
@@ -1393,8 +1409,7 @@
this->bbt_td->pages[0] = 2;
this->bbt_md = NULL;
} else {
- this->bbt_td->options = NAND_BBT_LASTBLOCK | NAND_BBT_8BIT |
- NAND_BBT_VERSION;
+ this->bbt_td->options = NAND_BBT_LASTBLOCK | NAND_BBT_8BIT | NAND_BBT_VERSION;
if (inftl_bbt_write)
this->bbt_td->options |= NAND_BBT_WRITE;
this->bbt_td->offs = 8;
@@ -1404,8 +1419,7 @@
this->bbt_td->reserved_block_code = 0x01;
this->bbt_td->pattern = "MSYS_BBT";
- this->bbt_md->options = NAND_BBT_LASTBLOCK | NAND_BBT_8BIT |
- NAND_BBT_VERSION;
+ this->bbt_md->options = NAND_BBT_LASTBLOCK | NAND_BBT_8BIT | NAND_BBT_VERSION;
if (inftl_bbt_write)
this->bbt_md->options |= NAND_BBT_WRITE;
this->bbt_md->offs = 8;
@@ -1420,12 +1434,13 @@
At least as nand_bbt.c is currently written. */
if ((ret = nand_scan_bbt(mtd, NULL)))
return ret;
- memset((char *) parts, 0, sizeof(parts));
+ memset((char *)parts, 0, sizeof(parts));
numparts = inftl_partscan(mtd, parts);
/* At least for now, require the INFTL Media Header. We could probably
do without it for non-INFTL use, since all it gives us is
autopartitioning, but I want to give it more thought. */
- if (!numparts) return -EIO;
+ if (!numparts)
+ return -EIO;
add_mtd_device(mtd);
#ifdef CONFIG_MTD_PARTITIONS
if (!no_autopart)
@@ -1535,20 +1550,16 @@
save_control = ReadDOC(virtadr, DOCControl);
/* Reset the DiskOnChip ASIC */
- WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET,
- virtadr, DOCControl);
- WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET,
- virtadr, DOCControl);
+ WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET, virtadr, DOCControl);
+ WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET, virtadr, DOCControl);
/* Enable the DiskOnChip ASIC */
- WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL,
- virtadr, DOCControl);
- WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL,
- virtadr, DOCControl);
+ WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL, virtadr, DOCControl);
+ WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL, virtadr, DOCControl);
ChipID = ReadDOC(virtadr, ChipID);
- switch(ChipID) {
+ switch (ChipID) {
case DOC_ChipID_Doc2k:
reg = DoC_2k_ECCStatus;
break;
@@ -1564,15 +1575,13 @@
ReadDOC(virtadr, Mplus_Power);
/* Reset the Millennium Plus ASIC */
- tmp = DOC_MODE_RESET | DOC_MODE_MDWREN | DOC_MODE_RST_LAT |
- DOC_MODE_BDECT;
+ tmp = DOC_MODE_RESET | DOC_MODE_MDWREN | DOC_MODE_RST_LAT | DOC_MODE_BDECT;
WriteDOC(tmp, virtadr, Mplus_DOCControl);
WriteDOC(~tmp, virtadr, Mplus_CtrlConfirm);
mdelay(1);
/* Enable the Millennium Plus ASIC */
- tmp = DOC_MODE_NORMAL | DOC_MODE_MDWREN | DOC_MODE_RST_LAT |
- DOC_MODE_BDECT;
+ tmp = DOC_MODE_NORMAL | DOC_MODE_MDWREN | DOC_MODE_RST_LAT | DOC_MODE_BDECT;
WriteDOC(tmp, virtadr, Mplus_DOCControl);
WriteDOC(~tmp, virtadr, Mplus_CtrlConfirm);
mdelay(1);
@@ -1596,7 +1605,7 @@
goto notfound;
}
/* Check the TOGGLE bit in the ECC register */
- tmp = ReadDOC_(virtadr, reg) & DOC_TOGGLE_BIT;
+ tmp = ReadDOC_(virtadr, reg) & DOC_TOGGLE_BIT;
tmpb = ReadDOC_(virtadr, reg) & DOC_TOGGLE_BIT;
tmpc = ReadDOC_(virtadr, reg) & DOC_TOGGLE_BIT;
if ((tmp == tmpb) || (tmp != tmpc)) {
@@ -1626,11 +1635,11 @@
if (ChipID == DOC_ChipID_DocMilPlus16) {
WriteDOC(~newval, virtadr, Mplus_AliasResolution);
oldval = ReadDOC(doc->virtadr, Mplus_AliasResolution);
- WriteDOC(newval, virtadr, Mplus_AliasResolution); // restore it
+ WriteDOC(newval, virtadr, Mplus_AliasResolution); // restore it
} else {
WriteDOC(~newval, virtadr, AliasResolution);
oldval = ReadDOC(doc->virtadr, AliasResolution);
- WriteDOC(newval, virtadr, AliasResolution); // restore it
+ WriteDOC(newval, virtadr, AliasResolution); // restore it
}
newval = ~newval;
if (oldval == newval) {
@@ -1642,10 +1651,8 @@
printk(KERN_NOTICE "DiskOnChip found at 0x%lx\n", physadr);
len = sizeof(struct mtd_info) +
- sizeof(struct nand_chip) +
- sizeof(struct doc_priv) +
- (2 * sizeof(struct nand_bbt_descr));
- mtd = kmalloc(len, GFP_KERNEL);
+ sizeof(struct nand_chip) + sizeof(struct doc_priv) + (2 * sizeof(struct nand_bbt_descr));
+ mtd = kmalloc(len, GFP_KERNEL);
if (!mtd) {
printk(KERN_ERR "DiskOnChip kmalloc (%d bytes) failed!\n", len);
ret = -ENOMEM;
@@ -1707,18 +1714,18 @@
doclist = mtd;
return 0;
-notfound:
+ notfound:
/* Put back the contents of the DOCControl register, in case it's not
actually a DiskOnChip. */
WriteDOC(save_control, virtadr, DOCControl);
-fail:
+ fail:
iounmap(virtadr);
return ret;
}
static void release_nanddoc(void)
{
- struct mtd_info *mtd, *nextmtd;
+ struct mtd_info *mtd, *nextmtd;
struct nand_chip *nand;
struct doc_priv *doc;
@@ -1747,8 +1754,8 @@
* generator polinomial degree = 4
*/
rs_decoder = init_rs(10, 0x409, FCR, 1, NROOTS);
- if (!rs_decoder) {
- printk (KERN_ERR "DiskOnChip: Could not create a RS decoder\n");
+ if (!rs_decoder) {
+ printk(KERN_ERR "DiskOnChip: Could not create a RS decoder\n");
return -ENOMEM;
}
@@ -1758,7 +1765,7 @@
if (ret < 0)
goto outerr;
} else {
- for (i=0; (doc_locations[i] != 0xffffffff); i++) {
+ for (i = 0; (doc_locations[i] != 0xffffffff); i++) {
doc_probe(doc_locations[i]);
}
}
@@ -1770,7 +1777,7 @@
goto outerr;
}
return 0;
-outerr:
+ outerr:
free_rs(rs_decoder);
return ret;
}
diff --git a/drivers/mtd/nand/edb7312.c b/drivers/mtd/nand/edb7312.c
index 9b1fd2f..8e56570 100644
--- a/drivers/mtd/nand/edb7312.c
+++ b/drivers/mtd/nand/edb7312.c
@@ -1,7 +1,7 @@
/*
* drivers/mtd/nand/edb7312.c
*
- * Copyright (C) 2002 Marius Gröger (mag@sysgo.de)
+ * Copyright (C) 2002 Marius Gröger (mag@sysgo.de)
*
* Derived from drivers/mtd/nand/autcpu12.c
* Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de)
@@ -25,7 +25,7 @@
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <asm/io.h>
-#include <asm/arch/hardware.h> /* for CLPS7111_VIRT_BASE */
+#include <asm/arch/hardware.h> /* for CLPS7111_VIRT_BASE */
#include <asm/sizes.h>
#include <asm/hardware/clps7111.h>
@@ -54,29 +54,29 @@
*/
static unsigned long ep7312_fio_pbase = EP7312_FIO_PBASE;
-static void __iomem * ep7312_pxdr = (void __iomem *) EP7312_PXDR;
-static void __iomem * ep7312_pxddr = (void __iomem *) EP7312_PXDDR;
+static void __iomem *ep7312_pxdr = (void __iomem *)EP7312_PXDR;
+static void __iomem *ep7312_pxddr = (void __iomem *)EP7312_PXDDR;
#ifdef CONFIG_MTD_PARTITIONS
/*
* Define static partitions for flash device
*/
static struct mtd_partition partition_info[] = {
- { .name = "EP7312 Nand Flash",
- .offset = 0,
- .size = 8*1024*1024 }
+ {.name = "EP7312 Nand Flash",
+ .offset = 0,
+ .size = 8 * 1024 * 1024}
};
+
#define NUM_PARTITIONS 1
#endif
-
/*
* hardware specific access to control-lines
*/
static void ep7312_hwcontrol(struct mtd_info *mtd, int cmd)
{
- switch(cmd) {
+ switch (cmd) {
case NAND_CTL_SETCLE:
clps_writeb(clps_readb(ep7312_pxdr) | 0x10, ep7312_pxdr);
@@ -108,6 +108,7 @@
{
return 1;
}
+
#ifdef CONFIG_MTD_PARTITIONS
const char *part_probes[] = { "cmdlinepart", NULL };
#endif
@@ -115,18 +116,16 @@
/*
* Main initialization routine
*/
-static int __init ep7312_init (void)
+static int __init ep7312_init(void)
{
struct nand_chip *this;
const char *part_type = 0;
int mtd_parts_nb = 0;
struct mtd_partition *mtd_parts = 0;
- void __iomem * ep7312_fio_base;
+ void __iomem *ep7312_fio_base;
/* Allocate memory for MTD device structure and private data */
- ep7312_mtd = kmalloc(sizeof(struct mtd_info) +
- sizeof(struct nand_chip),
- GFP_KERNEL);
+ ep7312_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
if (!ep7312_mtd) {
printk("Unable to allocate EDB7312 NAND MTD device structure.\n");
return -ENOMEM;
@@ -134,21 +133,22 @@
/* map physical adress */
ep7312_fio_base = ioremap(ep7312_fio_pbase, SZ_1K);
- if(!ep7312_fio_base) {
+ if (!ep7312_fio_base) {
printk("ioremap EDB7312 NAND flash failed\n");
kfree(ep7312_mtd);
return -EIO;
}
/* Get pointer to private data */
- this = (struct nand_chip *) (&ep7312_mtd[1]);
+ this = (struct nand_chip *)(&ep7312_mtd[1]);
/* Initialize structures */
- memset((char *) ep7312_mtd, 0, sizeof(struct mtd_info));
- memset((char *) this, 0, sizeof(struct nand_chip));
+ memset(ep7312_mtd, 0, sizeof(struct mtd_info));
+ memset(this, 0, sizeof(struct nand_chip));
/* Link the private data with the MTD structure */
ep7312_mtd->priv = this;
+ ep7312_mtd->owner = THIS_MODULE;
/*
* Set GPIO Port B control register so that the pins are configured
@@ -165,16 +165,14 @@
this->chip_delay = 15;
/* Scan to find existence of the device */
- if (nand_scan (ep7312_mtd, 1)) {
+ if (nand_scan(ep7312_mtd, 1)) {
iounmap((void *)ep7312_fio_base);
- kfree (ep7312_mtd);
+ kfree(ep7312_mtd);
return -ENXIO;
}
-
#ifdef CONFIG_MTD_PARTITIONS
ep7312_mtd->name = "edb7312-nand";
- mtd_parts_nb = parse_mtd_partitions(ep7312_mtd, part_probes,
- &mtd_parts, 0);
+ mtd_parts_nb = parse_mtd_partitions(ep7312_mtd, part_probes, &mtd_parts, 0);
if (mtd_parts_nb > 0)
part_type = "command line";
else
@@ -193,24 +191,26 @@
/* Return happy */
return 0;
}
+
module_init(ep7312_init);
/*
* Clean up routine
*/
-static void __exit ep7312_cleanup (void)
+static void __exit ep7312_cleanup(void)
{
- struct nand_chip *this = (struct nand_chip *) &ep7312_mtd[1];
+ struct nand_chip *this = (struct nand_chip *)&ep7312_mtd[1];
/* Release resources, unregister device */
- nand_release (ap7312_mtd);
+ nand_release(ap7312_mtd);
/* Free internal data buffer */
- kfree (this->data_buf);
+ kfree(this->data_buf);
/* Free the MTD device structure */
- kfree (ep7312_mtd);
+ kfree(ep7312_mtd);
}
+
module_exit(ep7312_cleanup);
MODULE_LICENSE("GPL");
diff --git a/drivers/mtd/nand/h1910.c b/drivers/mtd/nand/h1910.c
index f68f7a9..9848eb0 100644
--- a/drivers/mtd/nand/h1910.c
+++ b/drivers/mtd/nand/h1910.c
@@ -4,7 +4,7 @@
* Copyright (C) 2003 Joshua Wise (joshua@joshuawise.com)
*
* Derived from drivers/mtd/nand/edb7312.c
- * Copyright (C) 2002 Marius Gröger (mag@sysgo.de)
+ * Copyright (C) 2002 Marius Gröger (mag@sysgo.de)
* Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de)
*
* $Id: h1910.c,v 1.6 2005/11/07 11:14:30 gleixner Exp $
@@ -26,7 +26,7 @@
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <asm/io.h>
-#include <asm/arch/hardware.h> /* for CLPS7111_VIRT_BASE */
+#include <asm/arch/hardware.h> /* for CLPS7111_VIRT_BASE */
#include <asm/sizes.h>
#include <asm/arch/h1900-gpio.h>
#include <asm/arch/ipaq.h>
@@ -45,23 +45,23 @@
* Define static partitions for flash device
*/
static struct mtd_partition partition_info[] = {
- { name: "h1910 NAND Flash",
- offset: 0,
- size: 16*1024*1024 }
+ {name:"h1910 NAND Flash",
+ offset:0,
+ size:16 * 1024 * 1024}
};
+
#define NUM_PARTITIONS 1
#endif
-
/*
* hardware specific access to control-lines
*/
static void h1910_hwcontrol(struct mtd_info *mtd, int cmd)
{
- struct nand_chip* this = (struct nand_chip *) (mtd->priv);
+ struct nand_chip *this = (struct nand_chip *)(mtd->priv);
- switch(cmd) {
+ switch (cmd) {
case NAND_CTL_SETCLE:
this->IO_ADDR_R |= (1 << 2);
@@ -101,7 +101,7 @@
/*
* Main initialization routine
*/
-static int __init h1910_init (void)
+static int __init h1910_init(void)
{
struct nand_chip *this;
const char *part_type = 0;
@@ -119,24 +119,23 @@
}
/* Allocate memory for MTD device structure and private data */
- h1910_nand_mtd = kmalloc(sizeof(struct mtd_info) +
- sizeof(struct nand_chip),
- GFP_KERNEL);
+ h1910_nand_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
if (!h1910_nand_mtd) {
printk("Unable to allocate h1910 NAND MTD device structure.\n");
- iounmap ((void *) nandaddr);
+ iounmap((void *)nandaddr);
return -ENOMEM;
}
/* Get pointer to private data */
- this = (struct nand_chip *) (&h1910_nand_mtd[1]);
+ this = (struct nand_chip *)(&h1910_nand_mtd[1]);
/* Initialize structures */
- memset((char *) h1910_nand_mtd, 0, sizeof(struct mtd_info));
- memset((char *) this, 0, sizeof(struct nand_chip));
+ memset(h1910_nand_mtd, 0, sizeof(struct mtd_info));
+ memset(this, 0, sizeof(struct nand_chip));
/* Link the private data with the MTD structure */
h1910_nand_mtd->priv = this;
+ h1910_nand_mtd->owner = THIS_MODULE;
/*
* Enable VPEN
@@ -154,23 +153,20 @@
this->options = NAND_NO_AUTOINCR;
/* Scan to find existence of the device */
- if (nand_scan (h1910_nand_mtd, 1)) {
+ if (nand_scan(h1910_nand_mtd, 1)) {
printk(KERN_NOTICE "No NAND device - returning -ENXIO\n");
- kfree (h1910_nand_mtd);
- iounmap ((void *) nandaddr);
+ kfree(h1910_nand_mtd);
+ iounmap((void *)nandaddr);
return -ENXIO;
}
-
#ifdef CONFIG_MTD_CMDLINE_PARTS
- mtd_parts_nb = parse_cmdline_partitions(h1910_nand_mtd, &mtd_parts,
- "h1910-nand");
+ mtd_parts_nb = parse_cmdline_partitions(h1910_nand_mtd, &mtd_parts, "h1910-nand");
if (mtd_parts_nb > 0)
- part_type = "command line";
+ part_type = "command line";
else
- mtd_parts_nb = 0;
+ mtd_parts_nb = 0;
#endif
- if (mtd_parts_nb == 0)
- {
+ if (mtd_parts_nb == 0) {
mtd_parts = partition_info;
mtd_parts_nb = NUM_PARTITIONS;
part_type = "static";
@@ -183,24 +179,26 @@
/* Return happy */
return 0;
}
+
module_init(h1910_init);
/*
* Clean up routine
*/
-static void __exit h1910_cleanup (void)
+static void __exit h1910_cleanup(void)
{
- struct nand_chip *this = (struct nand_chip *) &h1910_nand_mtd[1];
+ struct nand_chip *this = (struct nand_chip *)&h1910_nand_mtd[1];
/* Release resources, unregister device */
- nand_release (h1910_nand_mtd);
+ nand_release(h1910_nand_mtd);
/* Release io resource */
- iounmap ((void *) this->IO_ADDR_W);
+ iounmap((void *)this->IO_ADDR_W);
/* Free the MTD device structure */
- kfree (h1910_nand_mtd);
+ kfree(h1910_nand_mtd);
}
+
module_exit(h1910_cleanup);
MODULE_LICENSE("GPL");
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 95e96fa..08dffb7 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -69,6 +69,7 @@
*
*/
+#include <linux/module.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/sched.h>
@@ -92,24 +93,24 @@
.useecc = MTD_NANDECC_AUTOPLACE,
.eccbytes = 3,
.eccpos = {0, 1, 2},
- .oobfree = { {3, 2}, {6, 2} }
+ .oobfree = {{3, 2}, {6, 2}}
};
static struct nand_oobinfo nand_oob_16 = {
.useecc = MTD_NANDECC_AUTOPLACE,
.eccbytes = 6,
.eccpos = {0, 1, 2, 3, 6, 7},
- .oobfree = { {8, 8} }
+ .oobfree = {{8, 8}}
};
static struct nand_oobinfo nand_oob_64 = {
.useecc = MTD_NANDECC_AUTOPLACE,
.eccbytes = 24,
.eccpos = {
- 40, 41, 42, 43, 44, 45, 46, 47,
- 48, 49, 50, 51, 52, 53, 54, 55,
- 56, 57, 58, 59, 60, 61, 62, 63},
- .oobfree = { {2, 38} }
+ 40, 41, 42, 43, 44, 45, 46, 47,
+ 48, 49, 50, 51, 52, 53, 54, 55,
+ 56, 57, 58, 59, 60, 61, 62, 63},
+ .oobfree = {{2, 38}}
};
/* This is used for padding purposes in nand_write_oob */
@@ -131,32 +132,32 @@
static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len);
static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len);
-static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf);
-static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
- size_t * retlen, u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel);
-static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf);
-static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf);
-static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
- size_t * retlen, const u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel);
-static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char *buf);
-static int nand_writev (struct mtd_info *mtd, const struct kvec *vecs,
- unsigned long count, loff_t to, size_t * retlen);
-static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs,
- unsigned long count, loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel);
-static int nand_erase (struct mtd_info *mtd, struct erase_info *instr);
-static void nand_sync (struct mtd_info *mtd);
+static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
+static int nand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
+ size_t *retlen, u_char *buf, u_char *eccbuf, struct nand_oobinfo *oobsel);
+static int nand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
+static int nand_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf);
+static int nand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
+ size_t *retlen, const u_char *buf, u_char *eccbuf, struct nand_oobinfo *oobsel);
+static int nand_write_oob(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf);
+static int nand_writev(struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, loff_t to, size_t *retlen);
+static int nand_writev_ecc(struct mtd_info *mtd, const struct kvec *vecs,
+ unsigned long count, loff_t to, size_t *retlen, u_char *eccbuf,
+ struct nand_oobinfo *oobsel);
+static int nand_erase(struct mtd_info *mtd, struct erase_info *instr);
+static void nand_sync(struct mtd_info *mtd);
/* Some internal functions */
-static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page, u_char *oob_buf,
- struct nand_oobinfo *oobsel, int mode);
+static int nand_write_page(struct mtd_info *mtd, struct nand_chip *this, int page, u_char * oob_buf,
+ struct nand_oobinfo *oobsel, int mode);
#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
-static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
- u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode);
+static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
+ u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode);
#else
#define nand_verify_pages(...) (0)
#endif
-static int nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state);
+static int nand_get_device(struct nand_chip *this, struct mtd_info *mtd, int new_state);
/**
* nand_release_device - [GENERIC] release chip
@@ -164,7 +165,7 @@
*
* Deselect, release chip lock and wake up anyone waiting on the device
*/
-static void nand_release_device (struct mtd_info *mtd)
+static void nand_release_device(struct mtd_info *mtd)
{
struct nand_chip *this = mtd->priv;
@@ -276,7 +277,7 @@
static void nand_select_chip(struct mtd_info *mtd, int chip)
{
struct nand_chip *this = mtd->priv;
- switch(chip) {
+ switch (chip) {
case -1:
this->hwcontrol(mtd, NAND_CTL_CLRNCE);
break;
@@ -302,7 +303,7 @@
int i;
struct nand_chip *this = mtd->priv;
- for (i=0; i<len; i++)
+ for (i = 0; i < len; i++)
writeb(buf[i], this->IO_ADDR_W);
}
@@ -319,7 +320,7 @@
int i;
struct nand_chip *this = mtd->priv;
- for (i=0; i<len; i++)
+ for (i = 0; i < len; i++)
buf[i] = readb(this->IO_ADDR_R);
}
@@ -336,7 +337,7 @@
int i;
struct nand_chip *this = mtd->priv;
- for (i=0; i<len; i++)
+ for (i = 0; i < len; i++)
if (buf[i] != readb(this->IO_ADDR_R))
return -EFAULT;
@@ -358,7 +359,7 @@
u16 *p = (u16 *) buf;
len >>= 1;
- for (i=0; i<len; i++)
+ for (i = 0; i < len; i++)
writew(p[i], this->IO_ADDR_W);
}
@@ -378,7 +379,7 @@
u16 *p = (u16 *) buf;
len >>= 1;
- for (i=0; i<len; i++)
+ for (i = 0; i < len; i++)
p[i] = readw(this->IO_ADDR_R);
}
@@ -397,7 +398,7 @@
u16 *p = (u16 *) buf;
len >>= 1;
- for (i=0; i<len; i++)
+ for (i = 0; i < len; i++)
if (p[i] != readw(this->IO_ADDR_R))
return -EFAULT;
@@ -423,22 +424,22 @@
chipnr = (int)(ofs >> this->chip_shift);
/* Grab the lock and see if the device is available */
- nand_get_device (this, mtd, FL_READING);
+ nand_get_device(this, mtd, FL_READING);
/* Select the NAND device */
this->select_chip(mtd, chipnr);
} else
- page = (int) ofs;
+ page = (int)ofs;
if (this->options & NAND_BUSWIDTH_16) {
- this->cmdfunc (mtd, NAND_CMD_READOOB, this->badblockpos & 0xFE, page & this->pagemask);
+ this->cmdfunc(mtd, NAND_CMD_READOOB, this->badblockpos & 0xFE, page & this->pagemask);
bad = cpu_to_le16(this->read_word(mtd));
if (this->badblockpos & 0x1)
bad >>= 8;
if ((bad & 0xFF) != 0xff)
res = 1;
} else {
- this->cmdfunc (mtd, NAND_CMD_READOOB, this->badblockpos, page & this->pagemask);
+ this->cmdfunc(mtd, NAND_CMD_READOOB, this->badblockpos, page & this->pagemask);
if (this->read_byte(mtd) != 0xff)
res = 1;
}
@@ -462,22 +463,22 @@
static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
{
struct nand_chip *this = mtd->priv;
- u_char buf[2] = {0, 0};
- size_t retlen;
+ u_char buf[2] = { 0, 0 };
+ size_t retlen;
int block;
/* Get block number */
- block = ((int) ofs) >> this->bbt_erase_shift;
+ block = ((int)ofs) >> this->bbt_erase_shift;
if (this->bbt)
this->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
/* Do we have a flash based bad block table ? */
if (this->options & NAND_USE_FLASH_BBT)
- return nand_update_bbt (mtd, ofs);
+ return nand_update_bbt(mtd, ofs);
/* We write two bytes, so we dont have to mess with 16 bit access */
ofs += mtd->oobsize + (this->badblockpos & ~0x01);
- return nand_write_oob (mtd, ofs , 2, &retlen, buf);
+ return nand_write_oob(mtd, ofs, 2, &retlen, buf);
}
/**
@@ -487,11 +488,11 @@
*
* The function expects, that the device is already selected
*/
-static int nand_check_wp (struct mtd_info *mtd)
+static int nand_check_wp(struct mtd_info *mtd)
{
struct nand_chip *this = mtd->priv;
/* Check the WP bit */
- this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
+ this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
return (this->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
}
@@ -505,7 +506,7 @@
* Check, if the block is bad. Either by reading the bad block table or
* calling of the scan function.
*/
-static int nand_block_checkbad (struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
+static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
{
struct nand_chip *this = mtd->priv;
@@ -513,7 +514,7 @@
return this->block_bad(mtd, ofs, getchip);
/* Return info from the table */
- return nand_isbad_bbt (mtd, ofs, allowbbt);
+ return nand_isbad_bbt(mtd, ofs, allowbbt);
}
DEFINE_LED_TRIGGER(nand_led_trigger);
@@ -525,7 +526,7 @@
static void nand_wait_ready(struct mtd_info *mtd)
{
struct nand_chip *this = mtd->priv;
- unsigned long timeo = jiffies + 2;
+ unsigned long timeo = jiffies + 2;
led_trigger_event(nand_led_trigger, LED_FULL);
/* wait until command is processed or timeout occures */
@@ -547,7 +548,7 @@
* Send command to NAND device. This function is used for small page
* devices (256/512 Bytes per page)
*/
-static void nand_command (struct mtd_info *mtd, unsigned command, int column, int page_addr)
+static void nand_command(struct mtd_info *mtd, unsigned command, int column, int page_addr)
{
register struct nand_chip *this = mtd->priv;
@@ -588,11 +589,11 @@
this->write_byte(mtd, column);
}
if (page_addr != -1) {
- this->write_byte(mtd, (unsigned char) (page_addr & 0xff));
- this->write_byte(mtd, (unsigned char) ((page_addr >> 8) & 0xff));
+ this->write_byte(mtd, (unsigned char)(page_addr & 0xff));
+ this->write_byte(mtd, (unsigned char)((page_addr >> 8) & 0xff));
/* One more address cycle for devices > 32MiB */
if (this->chipsize > (32 << 20))
- this->write_byte(mtd, (unsigned char) ((page_addr >> 16) & 0x0f));
+ this->write_byte(mtd, (unsigned char)((page_addr >> 16) & 0x0f));
}
/* Latch in address */
this->hwcontrol(mtd, NAND_CTL_CLRALE);
@@ -601,7 +602,7 @@
/*
* program and erase have their own busy handlers
* status and sequential in needs no delay
- */
+ */
switch (command) {
case NAND_CMD_PAGEPROG:
@@ -618,23 +619,23 @@
this->hwcontrol(mtd, NAND_CTL_SETCLE);
this->write_byte(mtd, NAND_CMD_STATUS);
this->hwcontrol(mtd, NAND_CTL_CLRCLE);
- while ( !(this->read_byte(mtd) & NAND_STATUS_READY));
+ while (!(this->read_byte(mtd) & NAND_STATUS_READY)) ;
return;
- /* This applies to read commands */
+ /* This applies to read commands */
default:
/*
* If we don't have access to the busy pin, we apply the given
* command delay
- */
+ */
if (!this->dev_ready) {
- udelay (this->chip_delay);
+ udelay(this->chip_delay);
return;
}
}
/* Apply this short delay always to ensure that we do wait tWB in
* any case on any machine. */
- ndelay (100);
+ ndelay(100);
nand_wait_ready(mtd);
}
@@ -647,11 +648,11 @@
* @page_addr: the page address for this command, -1 if none
*
* Send command to NAND device. This is the version for the new large page devices
- * We dont have the seperate regions as we have in the small page devices.
+ * We dont have the separate regions as we have in the small page devices.
* We must emulate NAND_CMD_READOOB to keep the code compatible.
*
*/
-static void nand_command_lp (struct mtd_info *mtd, unsigned command, int column, int page_addr)
+static void nand_command_lp(struct mtd_info *mtd, unsigned command, int column, int page_addr)
{
register struct nand_chip *this = mtd->priv;
@@ -661,7 +662,6 @@
command = NAND_CMD_READ0;
}
-
/* Begin command latch cycle */
this->hwcontrol(mtd, NAND_CTL_SETCLE);
/* Write out the command to the device. */
@@ -681,11 +681,11 @@
this->write_byte(mtd, column >> 8);
}
if (page_addr != -1) {
- this->write_byte(mtd, (unsigned char) (page_addr & 0xff));
- this->write_byte(mtd, (unsigned char) ((page_addr >> 8) & 0xff));
+ this->write_byte(mtd, (unsigned char)(page_addr & 0xff));
+ this->write_byte(mtd, (unsigned char)((page_addr >> 8) & 0xff));
/* One more address cycle for devices > 128MiB */
if (this->chipsize > (128 << 20))
- this->write_byte(mtd, (unsigned char) ((page_addr >> 16) & 0xff));
+ this->write_byte(mtd, (unsigned char)((page_addr >> 16) & 0xff));
}
/* Latch in address */
this->hwcontrol(mtd, NAND_CTL_CLRALE);
@@ -706,9 +706,9 @@
case NAND_CMD_DEPLETE1:
return;
- /*
- * read error status commands require only a short delay
- */
+ /*
+ * read error status commands require only a short delay
+ */
case NAND_CMD_STATUS_ERROR:
case NAND_CMD_STATUS_ERROR0:
case NAND_CMD_STATUS_ERROR1:
@@ -724,7 +724,7 @@
this->hwcontrol(mtd, NAND_CTL_SETCLE);
this->write_byte(mtd, NAND_CMD_STATUS);
this->hwcontrol(mtd, NAND_CTL_CLRCLE);
- while ( !(this->read_byte(mtd) & NAND_STATUS_READY));
+ while (!(this->read_byte(mtd) & NAND_STATUS_READY)) ;
return;
case NAND_CMD_READ0:
@@ -736,21 +736,21 @@
this->hwcontrol(mtd, NAND_CTL_CLRCLE);
/* Fall through into ready check */
- /* This applies to read commands */
+ /* This applies to read commands */
default:
/*
* If we don't have access to the busy pin, we apply the given
* command delay
- */
+ */
if (!this->dev_ready) {
- udelay (this->chip_delay);
+ udelay(this->chip_delay);
return;
}
}
/* Apply this short delay always to ensure that we do wait tWB in
* any case on any machine. */
- ndelay (100);
+ ndelay(100);
nand_wait_ready(mtd);
}
@@ -763,16 +763,16 @@
*
* Get the device and lock it for exclusive access
*/
-static int nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state)
+static int nand_get_device(struct nand_chip *this, struct mtd_info *mtd, int new_state)
{
struct nand_chip *active;
spinlock_t *lock;
wait_queue_head_t *wq;
- DECLARE_WAITQUEUE (wait, current);
+ DECLARE_WAITQUEUE(wait, current);
lock = (this->controller) ? &this->controller->lock : &this->chip_lock;
wq = (this->controller) ? &this->controller->wq : &this->wq;
-retry:
+ retry:
active = this;
spin_lock(lock);
@@ -814,24 +814,24 @@
static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
{
- unsigned long timeo = jiffies;
- int status;
+ unsigned long timeo = jiffies;
+ int status;
if (state == FL_ERASING)
- timeo += (HZ * 400) / 1000;
+ timeo += (HZ * 400) / 1000;
else
- timeo += (HZ * 20) / 1000;
+ timeo += (HZ * 20) / 1000;
led_trigger_event(nand_led_trigger, LED_FULL);
/* Apply this short delay always to ensure that we do wait tWB in
* any case on any machine. */
- ndelay (100);
+ ndelay(100);
if ((state == FL_ERASING) && (this->options & NAND_IS_AND))
- this->cmdfunc (mtd, NAND_CMD_STATUS_MULTI, -1, -1);
+ this->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1);
else
- this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
+ this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
while (time_before(jiffies, timeo)) {
/* Check, if we were interrupted */
@@ -849,7 +849,7 @@
}
led_trigger_event(nand_led_trigger, LED_OFF);
- status = (int) this->read_byte(mtd);
+ status = (int)this->read_byte(mtd);
return status;
}
@@ -868,31 +868,31 @@
*
* Cached programming is not supported yet.
*/
-static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page,
- u_char *oob_buf, struct nand_oobinfo *oobsel, int cached)
+static int nand_write_page(struct mtd_info *mtd, struct nand_chip *this, int page,
+ u_char *oob_buf, struct nand_oobinfo *oobsel, int cached)
{
- int i, status;
- u_char ecc_code[32];
- int eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
- int *oob_config = oobsel->eccpos;
- int datidx = 0, eccidx = 0, eccsteps = this->eccsteps;
- int eccbytes = 0;
+ int i, status;
+ u_char ecc_code[32];
+ int eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
+ int *oob_config = oobsel->eccpos;
+ int datidx = 0, eccidx = 0, eccsteps = this->eccsteps;
+ int eccbytes = 0;
/* FIXME: Enable cached programming */
cached = 0;
/* Send command to begin auto page programming */
- this->cmdfunc (mtd, NAND_CMD_SEQIN, 0x00, page);
+ this->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
/* Write out complete page of data, take care of eccmode */
switch (eccmode) {
- /* No ecc, write all */
+ /* No ecc, write all */
case NAND_ECC_NONE:
- printk (KERN_WARNING "Writing data without ECC to NAND-FLASH is not recommended\n");
+ printk(KERN_WARNING "Writing data without ECC to NAND-FLASH is not recommended\n");
this->write_buf(mtd, this->data_poi, mtd->oobblock);
break;
- /* Software ecc 3/256, write all */
+ /* Software ecc 3/256, write all */
case NAND_ECC_SOFT:
for (; eccsteps; eccsteps--) {
this->calculate_ecc(mtd, &this->data_poi[datidx], ecc_code);
@@ -928,11 +928,11 @@
this->write_buf(mtd, oob_buf, mtd->oobsize);
/* Send command to actually program the data */
- this->cmdfunc (mtd, cached ? NAND_CMD_CACHEDPROG : NAND_CMD_PAGEPROG, -1, -1);
+ this->cmdfunc(mtd, cached ? NAND_CMD_CACHEDPROG : NAND_CMD_PAGEPROG, -1, -1);
if (!cached) {
/* call wait ready function */
- status = this->waitfunc (mtd, this, FL_WRITING);
+ status = this->waitfunc(mtd, this, FL_WRITING);
/* See if operation failed and additional status checks are available */
if ((status & NAND_STATUS_FAIL) && (this->errstat)) {
@@ -941,12 +941,12 @@
/* See if device thinks it succeeded */
if (status & NAND_STATUS_FAIL) {
- DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write, page 0x%08x, ", __FUNCTION__, page);
+ DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write, page 0x%08x, ", __FUNCTION__, page);
return -EIO;
}
} else {
/* FIXME: Implement cached programming ! */
- /* wait until cache is ready*/
+ /* wait until cache is ready */
// status = this->waitfunc (mtd, this, FL_CACHEDRPG);
}
return 0;
@@ -972,24 +972,24 @@
* the error later when the ECC page check fails, but we would rather catch
* it early in the page write stage. Better to write no data than invalid data.
*/
-static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
- u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode)
+static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
+ u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode)
{
- int i, j, datidx = 0, oobofs = 0, res = -EIO;
- int eccsteps = this->eccsteps;
- int hweccbytes;
- u_char oobdata[64];
+ int i, j, datidx = 0, oobofs = 0, res = -EIO;
+ int eccsteps = this->eccsteps;
+ int hweccbytes;
+ u_char oobdata[64];
hweccbytes = (this->options & NAND_HWECC_SYNDROME) ? (oobsel->eccbytes / eccsteps) : 0;
/* Send command to read back the first page */
- this->cmdfunc (mtd, NAND_CMD_READ0, 0, page);
+ this->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
- for(;;) {
+ for (;;) {
for (j = 0; j < eccsteps; j++) {
/* Loop through and verify the data */
if (this->verify_buf(mtd, &this->data_poi[datidx], mtd->eccsize)) {
- DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
+ DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
goto out;
}
datidx += mtd->eccsize;
@@ -997,7 +997,7 @@
if (!hweccbytes)
continue;
if (this->verify_buf(mtd, &this->oob_buf[oobofs], hweccbytes)) {
- DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
+ DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
goto out;
}
oobofs += hweccbytes;
@@ -1008,7 +1008,7 @@
*/
if (oobmode) {
if (this->verify_buf(mtd, &oob_buf[oobofs], mtd->oobsize - hweccbytes * eccsteps)) {
- DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
+ DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
goto out;
}
} else {
@@ -1020,10 +1020,9 @@
for (i = 0; i < ecccnt; i++) {
int idx = oobsel->eccpos[i];
- if (oobdata[idx] != oob_buf[oobofs + idx] ) {
- DEBUG (MTD_DEBUG_LEVEL0,
- "%s: Failed ECC write "
- "verify, page 0x%08x, " "%6i bytes were succesful\n", __FUNCTION__, page, i);
+ if (oobdata[idx] != oob_buf[oobofs + idx]) {
+ DEBUG(MTD_DEBUG_LEVEL0, "%s: Failed ECC write verify, page 0x%08x, %6i bytes were succesful\n",
+ __FUNCTION__, page, i);
goto out;
}
}
@@ -1039,9 +1038,9 @@
* is marked as NOAUTOINCR by the board driver.
* Do this also before returning, so the chip is
* ready for the next command.
- */
+ */
if (!this->dev_ready)
- udelay (this->chip_delay);
+ udelay(this->chip_delay);
else
nand_wait_ready(mtd);
@@ -1049,17 +1048,16 @@
if (!numpages)
return 0;
-
/* Check, if the chip supports auto page increment */
if (!NAND_CANAUTOINCR(this))
- this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page);
+ this->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
}
/*
* Terminate the read command. We come here in case of an error
* So we must issue a reset command.
*/
-out:
- this->cmdfunc (mtd, NAND_CMD_RESET, -1, -1);
+ out:
+ this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
return res;
}
#endif
@@ -1075,12 +1073,11 @@
* This function simply calls nand_do_read_ecc with oob buffer and oobsel = NULL
* and flags = 0xff
*/
-static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf)
+static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
{
- return nand_do_read_ecc (mtd, from, len, retlen, buf, NULL, &mtd->oobinfo, 0xff);
+ return nand_do_read_ecc(mtd, from, len, retlen, buf, NULL, &mtd->oobinfo, 0xff);
}
-
/**
* nand_read_ecc - [MTD Interface] MTD compability function for nand_do_read_ecc
* @mtd: MTD device structure
@@ -1093,8 +1090,8 @@
*
* This function simply calls nand_do_read_ecc with flags = 0xff
*/
-static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
- size_t * retlen, u_char * buf, u_char * oob_buf, struct nand_oobinfo *oobsel)
+static int nand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
+ size_t *retlen, u_char *buf, u_char *oob_buf, struct nand_oobinfo *oobsel)
{
/* use userspace supplied oobinfo, if zero */
if (oobsel == NULL)
@@ -1102,7 +1099,6 @@
return nand_do_read_ecc(mtd, from, len, retlen, buf, oob_buf, oobsel, 0xff);
}
-
/**
* nand_do_read_ecc - [MTD Interface] Read data with ECC
* @mtd: MTD device structure
@@ -1119,9 +1115,8 @@
*
* NAND read with ECC
*/
-int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
- size_t * retlen, u_char * buf, u_char * oob_buf,
- struct nand_oobinfo *oobsel, int flags)
+int nand_do_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
+ size_t *retlen, u_char *buf, u_char *oob_buf, struct nand_oobinfo *oobsel, int flags)
{
int i, j, col, realpage, page, end, ecc, chipnr, sndcmd = 1;
@@ -1130,26 +1125,25 @@
u_char *data_poi, *oob_data = oob_buf;
u_char ecc_calc[32];
u_char ecc_code[32];
- int eccmode, eccsteps;
- int *oob_config, datidx;
- int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
- int eccbytes;
- int compareecc = 1;
- int oobreadlen;
+ int eccmode, eccsteps;
+ int *oob_config, datidx;
+ int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
+ int eccbytes;
+ int compareecc = 1;
+ int oobreadlen;
-
- DEBUG (MTD_DEBUG_LEVEL3, "nand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
+ DEBUG(MTD_DEBUG_LEVEL3, "nand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int)from, (int)len);
/* Do not allow reads past end of device */
if ((from + len) > mtd->size) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: Attempt read beyond end of device\n");
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: Attempt read beyond end of device\n");
*retlen = 0;
return -EINVAL;
}
/* Grab the lock and see if the device is available */
if (flags & NAND_GET_DEVICE)
- nand_get_device (this, mtd, FL_READING);
+ nand_get_device(this, mtd, FL_READING);
/* Autoplace of oob data ? Use the default placement scheme */
if (oobsel->useecc == MTD_NANDECC_AUTOPLACE)
@@ -1163,7 +1157,7 @@
this->select_chip(mtd, chipnr);
/* First we calculate the starting page */
- realpage = (int) (from >> this->page_shift);
+ realpage = (int)(from >> this->page_shift);
page = realpage & this->pagemask;
/* Get raw starting column */
@@ -1201,13 +1195,13 @@
if (realpage == this->pagebuf && !oob_buf) {
/* aligned read ? */
if (aligned)
- memcpy (data_poi, this->data_buf, end);
+ memcpy(data_poi, this->data_buf, end);
goto readdata;
}
/* Check, if we must send the read command */
if (sndcmd) {
- this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page);
+ this->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
sndcmd = 0;
}
@@ -1219,24 +1213,26 @@
eccsteps = this->eccsteps;
switch (eccmode) {
- case NAND_ECC_NONE: { /* No ECC, Read in a page */
- static unsigned long lastwhinge = 0;
- if ((lastwhinge / HZ) != (jiffies / HZ)) {
- printk (KERN_WARNING "Reading data from NAND FLASH without ECC is not recommended\n");
- lastwhinge = jiffies;
+ case NAND_ECC_NONE:{
+ /* No ECC, Read in a page */
+ static unsigned long lastwhinge = 0;
+ if ((lastwhinge / HZ) != (jiffies / HZ)) {
+ printk(KERN_WARNING
+ "Reading data from NAND FLASH without ECC is not recommended\n");
+ lastwhinge = jiffies;
+ }
+ this->read_buf(mtd, data_poi, end);
+ break;
}
- this->read_buf(mtd, data_poi, end);
- break;
- }
case NAND_ECC_SOFT: /* Software ECC 3/256: Read in a page + oob data */
this->read_buf(mtd, data_poi, end);
- for (i = 0, datidx = 0; eccsteps; eccsteps--, i+=3, datidx += ecc)
+ for (i = 0, datidx = 0; eccsteps; eccsteps--, i += 3, datidx += ecc)
this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]);
break;
default:
- for (i = 0, datidx = 0; eccsteps; eccsteps--, i+=eccbytes, datidx += ecc) {
+ for (i = 0, datidx = 0; eccsteps; eccsteps--, i += eccbytes, datidx += ecc) {
this->enable_hwecc(mtd, NAND_ECC_READ);
this->read_buf(mtd, &data_poi[datidx], ecc);
@@ -1252,8 +1248,8 @@
* does the error correction on the fly */
ecc_status = this->correct_data(mtd, &data_poi[datidx], &oob_data[i], &ecc_code[i]);
if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: "
- "Failed ECC read, page 0x%08x on chip %d\n", page, chipnr);
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: "
+ "Failed ECC read, page 0x%08x on chip %d\n", page, chipnr);
ecc_failed++;
}
} else {
@@ -1274,7 +1270,7 @@
for (j = 0; j < oobsel->eccbytes; j++)
ecc_code[j] = oob_data[oob_config[j]];
- /* correct data, if neccecary */
+ /* correct data, if necessary */
for (i = 0, j = 0, datidx = 0; i < this->eccsteps; i++, datidx += ecc) {
ecc_status = this->correct_data(mtd, &data_poi[datidx], &ecc_code[j], &ecc_calc[j]);
@@ -1291,16 +1287,16 @@
}
if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
ecc_failed++;
}
}
- readoob:
+ readoob:
/* check, if we have a fs supplied oob-buffer */
if (oob_buf) {
/* without autoplace. Legacy mode used by YAFFS1 */
- switch(oobsel->useecc) {
+ switch (oobsel->useecc) {
case MTD_NANDECC_AUTOPLACE:
case MTD_NANDECC_AUTOPL_USR:
/* Walk through the autoplace chunks */
@@ -1313,7 +1309,7 @@
break;
case MTD_NANDECC_PLACE:
/* YAFFS1 legacy mode */
- oob_data += this->eccsteps * sizeof (int);
+ oob_data += this->eccsteps * sizeof(int);
default:
oob_data += mtd->oobsize;
}
@@ -1331,9 +1327,9 @@
* Do this before the AUTOINCR check, so no problems
* arise if a chip which does auto increment
* is marked as NOAUTOINCR by the board driver.
- */
+ */
if (!this->dev_ready)
- udelay (this->chip_delay);
+ udelay(this->chip_delay);
else
nand_wait_ready(mtd);
@@ -1354,7 +1350,7 @@
}
/* Check, if the chip supports auto page increment
* or if we have hit a block boundary.
- */
+ */
if (!NAND_CANAUTOINCR(this) || !(page & blockcheck))
sndcmd = 1;
}
@@ -1382,13 +1378,13 @@
*
* NAND read out-of-band data from the spare area
*/
-static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf)
+static int nand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
{
int i, col, page, chipnr;
struct nand_chip *this = mtd->priv;
- int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
+ int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
- DEBUG (MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
+ DEBUG(MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", (unsigned int)from, (int)len);
/* Shift to get page */
page = (int)(from >> this->page_shift);
@@ -1402,19 +1398,19 @@
/* Do not allow reads past end of device */
if ((from + len) > mtd->size) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: Attempt read beyond end of device\n");
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_read_oob: Attempt read beyond end of device\n");
*retlen = 0;
return -EINVAL;
}
/* Grab the lock and see if the device is available */
- nand_get_device (this, mtd , FL_READING);
+ nand_get_device(this, mtd, FL_READING);
/* Select the NAND device */
this->select_chip(mtd, chipnr);
/* Send the read command */
- this->cmdfunc (mtd, NAND_CMD_READOOB, col, page & this->pagemask);
+ this->cmdfunc(mtd, NAND_CMD_READOOB, col, page & this->pagemask);
/*
* Read the data, if we read more than one page
* oob data, let the device transfer the data !
@@ -1444,16 +1440,16 @@
* is marked as NOAUTOINCR by the board driver.
*/
if (!this->dev_ready)
- udelay (this->chip_delay);
+ udelay(this->chip_delay);
else
nand_wait_ready(mtd);
/* Check, if the chip supports auto page increment
* or if we have hit a block boundary.
- */
+ */
if (!NAND_CANAUTOINCR(this) || !(page & blockcheck)) {
/* For subsequent page reads set offset to 0 */
- this->cmdfunc (mtd, NAND_CMD_READOOB, 0x0, page & this->pagemask);
+ this->cmdfunc(mtd, NAND_CMD_READOOB, 0x0, page & this->pagemask);
}
}
}
@@ -1476,43 +1472,43 @@
*
* Read raw data including oob into buffer
*/
-int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, size_t ooblen)
+int nand_read_raw(struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, size_t ooblen)
{
struct nand_chip *this = mtd->priv;
- int page = (int) (from >> this->page_shift);
- int chip = (int) (from >> this->chip_shift);
+ int page = (int)(from >> this->page_shift);
+ int chip = (int)(from >> this->chip_shift);
int sndcmd = 1;
int cnt = 0;
int pagesize = mtd->oobblock + mtd->oobsize;
- int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
+ int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
/* Do not allow reads past end of device */
if ((from + len) > mtd->size) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_read_raw: Attempt read beyond end of device\n");
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_read_raw: Attempt read beyond end of device\n");
return -EINVAL;
}
/* Grab the lock and see if the device is available */
- nand_get_device (this, mtd , FL_READING);
+ nand_get_device(this, mtd, FL_READING);
- this->select_chip (mtd, chip);
+ this->select_chip(mtd, chip);
/* Add requested oob length */
len += ooblen;
while (len) {
if (sndcmd)
- this->cmdfunc (mtd, NAND_CMD_READ0, 0, page & this->pagemask);
+ this->cmdfunc(mtd, NAND_CMD_READ0, 0, page & this->pagemask);
sndcmd = 0;
- this->read_buf (mtd, &buf[cnt], pagesize);
+ this->read_buf(mtd, &buf[cnt], pagesize);
len -= pagesize;
cnt += pagesize;
page++;
if (!this->dev_ready)
- udelay (this->chip_delay);
+ udelay(this->chip_delay);
else
nand_wait_ready(mtd);
@@ -1526,7 +1522,6 @@
return 0;
}
-
/**
* nand_prepare_oobbuf - [GENERIC] Prepare the out of band buffer
* @mtd: MTD device structure
@@ -1550,8 +1545,8 @@
* forces the 0xff fill before using the buffer again.
*
*/
-static u_char * nand_prepare_oobbuf (struct mtd_info *mtd, u_char *fsbuf, struct nand_oobinfo *oobsel,
- int autoplace, int numpages)
+static u_char *nand_prepare_oobbuf(struct mtd_info *mtd, u_char *fsbuf, struct nand_oobinfo *oobsel,
+ int autoplace, int numpages)
{
struct nand_chip *this = mtd->priv;
int i, len, ofs;
@@ -1562,8 +1557,7 @@
/* Check, if the buffer must be filled with ff again */
if (this->oobdirty) {
- memset (this->oob_buf, 0xff,
- mtd->oobsize << (this->phys_erase_shift - this->page_shift));
+ memset(this->oob_buf, 0xff, mtd->oobsize << (this->phys_erase_shift - this->page_shift));
this->oobdirty = 0;
}
@@ -1578,7 +1572,7 @@
for (i = 0, len = 0; len < mtd->oobavail; i++) {
int to = ofs + oobsel->oobfree[i][0];
int num = oobsel->oobfree[i][1];
- memcpy (&this->oob_buf[to], fsbuf, num);
+ memcpy(&this->oob_buf[to], fsbuf, num);
len += num;
fsbuf += num;
}
@@ -1600,9 +1594,9 @@
* This function simply calls nand_write_ecc with oob buffer and oobsel = NULL
*
*/
-static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf)
+static int nand_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf)
{
- return (nand_write_ecc (mtd, to, len, retlen, buf, NULL, NULL));
+ return (nand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL));
}
/**
@@ -1617,34 +1611,35 @@
*
* NAND write with ECC
*/
-static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
- size_t * retlen, const u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel)
+static int nand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
+ size_t *retlen, const u_char *buf, u_char *eccbuf,
+ struct nand_oobinfo *oobsel)
{
int startpage, page, ret = -EIO, oob = 0, written = 0, chipnr;
int autoplace = 0, numpages, totalpages;
struct nand_chip *this = mtd->priv;
u_char *oobbuf, *bufstart;
- int ppblock = (1 << (this->phys_erase_shift - this->page_shift));
+ int ppblock = (1 << (this->phys_erase_shift - this->page_shift));
- DEBUG (MTD_DEBUG_LEVEL3, "nand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
+ DEBUG(MTD_DEBUG_LEVEL3, "nand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int)to, (int)len);
/* Initialize retlen, in case of early exit */
*retlen = 0;
/* Do not allow write past end of device */
if ((to + len) > mtd->size) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: Attempt to write past end of page\n");
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_write_ecc: Attempt to write past end of page\n");
return -EINVAL;
}
/* reject writes, which are not page aligned */
- if (NOTALIGNED (to) || NOTALIGNED(len)) {
- printk (KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");
+ if (NOTALIGNED(to) || NOTALIGNED(len)) {
+ printk(KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");
return -EINVAL;
}
/* Grab the lock and see if the device is available */
- nand_get_device (this, mtd, FL_WRITING);
+ nand_get_device(this, mtd, FL_WRITING);
/* Calculate chipnr */
chipnr = (int)(to >> this->chip_shift);
@@ -1669,7 +1664,7 @@
/* Setup variables and oob buffer */
totalpages = len >> this->page_shift;
- page = (int) (to >> this->page_shift);
+ page = (int)(to >> this->page_shift);
/* Invalidate the page cache, if we write to the cached page */
if (page <= this->pagebuf && this->pagebuf < (page + totalpages))
this->pagebuf = -1;
@@ -1678,22 +1673,22 @@
page &= this->pagemask;
startpage = page;
/* Calc number of pages we can write in one go */
- numpages = min (ppblock - (startpage & (ppblock - 1)), totalpages);
- oobbuf = nand_prepare_oobbuf (mtd, eccbuf, oobsel, autoplace, numpages);
- bufstart = (u_char *)buf;
+ numpages = min(ppblock - (startpage & (ppblock - 1)), totalpages);
+ oobbuf = nand_prepare_oobbuf(mtd, eccbuf, oobsel, autoplace, numpages);
+ bufstart = (u_char *) buf;
/* Loop until all data is written */
while (written < len) {
- this->data_poi = (u_char*) &buf[written];
+ this->data_poi = (u_char *) &buf[written];
/* Write one page. If this is the last page to write
* or the last page in this block, then use the
* real pageprogram command, else select cached programming
* if supported by the chip.
*/
- ret = nand_write_page (mtd, this, page, &oobbuf[oob], oobsel, (--numpages > 0));
+ ret = nand_write_page(mtd, this, page, &oobbuf[oob], oobsel, (--numpages > 0));
if (ret) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: write_page failed %d\n", ret);
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_write_ecc: write_page failed %d\n", ret);
goto out;
}
/* Next oob page */
@@ -1709,15 +1704,14 @@
/* Have we hit a block boundary ? Then we have to verify and
* if verify is ok, we have to setup the oob buffer for
* the next pages.
- */
- if (!(page & (ppblock - 1))){
+ */
+ if (!(page & (ppblock - 1))) {
int ofs;
this->data_poi = bufstart;
- ret = nand_verify_pages (mtd, this, startpage,
- page - startpage,
- oobbuf, oobsel, chipnr, (eccbuf != NULL));
+ ret = nand_verify_pages(mtd, this, startpage, page - startpage,
+ oobbuf, oobsel, chipnr, (eccbuf != NULL));
if (ret) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
goto out;
}
*retlen = written;
@@ -1726,11 +1720,10 @@
if (eccbuf)
eccbuf += (page - startpage) * ofs;
totalpages -= page - startpage;
- numpages = min (totalpages, ppblock);
+ numpages = min(totalpages, ppblock);
page &= this->pagemask;
startpage = page;
- oobbuf = nand_prepare_oobbuf (mtd, eccbuf, oobsel,
- autoplace, numpages);
+ oobbuf = nand_prepare_oobbuf(mtd, eccbuf, oobsel, autoplace, numpages);
oob = 0;
/* Check, if we cross a chip boundary */
if (!page) {
@@ -1741,23 +1734,21 @@
}
}
/* Verify the remaining pages */
-cmp:
+ cmp:
this->data_poi = bufstart;
- ret = nand_verify_pages (mtd, this, startpage, totalpages,
- oobbuf, oobsel, chipnr, (eccbuf != NULL));
+ ret = nand_verify_pages(mtd, this, startpage, totalpages, oobbuf, oobsel, chipnr, (eccbuf != NULL));
if (!ret)
*retlen = written;
else
- DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
-out:
+ out:
/* Deselect and wake up anyone waiting on the device */
nand_release_device(mtd);
return ret;
}
-
/**
* nand_write_oob - [MTD Interface] NAND write out-of-band
* @mtd: MTD device structure
@@ -1768,16 +1759,16 @@
*
* NAND write out-of-band
*/
-static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf)
+static int nand_write_oob(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf)
{
int column, page, status, ret = -EIO, chipnr;
struct nand_chip *this = mtd->priv;
- DEBUG (MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
+ DEBUG(MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", (unsigned int)to, (int)len);
/* Shift to get page */
- page = (int) (to >> this->page_shift);
- chipnr = (int) (to >> this->chip_shift);
+ page = (int)(to >> this->page_shift);
+ chipnr = (int)(to >> this->chip_shift);
/* Mask to get column */
column = to & (mtd->oobsize - 1);
@@ -1787,12 +1778,12 @@
/* Do not allow write past end of page */
if ((column + len) > mtd->oobsize) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: Attempt to write past end of page\n");
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: Attempt to write past end of page\n");
return -EINVAL;
}
/* Grab the lock and see if the device is available */
- nand_get_device (this, mtd, FL_WRITING);
+ nand_get_device(this, mtd, FL_WRITING);
/* Select the NAND device */
this->select_chip(mtd, chipnr);
@@ -1814,27 +1805,27 @@
if (NAND_MUST_PAD(this)) {
/* Write out desired data */
- this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock, page & this->pagemask);
+ this->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->oobblock, page & this->pagemask);
/* prepad 0xff for partial programming */
this->write_buf(mtd, ffchars, column);
/* write data */
this->write_buf(mtd, buf, len);
/* postpad 0xff for partial programming */
- this->write_buf(mtd, ffchars, mtd->oobsize - (len+column));
+ this->write_buf(mtd, ffchars, mtd->oobsize - (len + column));
} else {
/* Write out desired data */
- this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock + column, page & this->pagemask);
+ this->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->oobblock + column, page & this->pagemask);
/* write data */
this->write_buf(mtd, buf, len);
}
/* Send command to program the OOB data */
- this->cmdfunc (mtd, NAND_CMD_PAGEPROG, -1, -1);
+ this->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
- status = this->waitfunc (mtd, this, FL_WRITING);
+ status = this->waitfunc(mtd, this, FL_WRITING);
/* See if device thinks it succeeded */
if (status & NAND_STATUS_FAIL) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page);
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page);
ret = -EIO;
goto out;
}
@@ -1843,23 +1834,22 @@
#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
/* Send command to read back the data */
- this->cmdfunc (mtd, NAND_CMD_READOOB, column, page & this->pagemask);
+ this->cmdfunc(mtd, NAND_CMD_READOOB, column, page & this->pagemask);
if (this->verify_buf(mtd, buf, len)) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write verify, page 0x%08x\n", page);
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write verify, page 0x%08x\n", page);
ret = -EIO;
goto out;
}
#endif
ret = 0;
-out:
+ out:
/* Deselect and wake up anyone waiting on the device */
nand_release_device(mtd);
return ret;
}
-
/**
* nand_writev - [MTD Interface] compabilty function for nand_writev_ecc
* @mtd: MTD device structure
@@ -1870,10 +1860,10 @@
*
* NAND write with kvec. This just calls the ecc function
*/
-static int nand_writev (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
- loff_t to, size_t * retlen)
+static int nand_writev(struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
+ loff_t to, size_t *retlen)
{
- return (nand_writev_ecc (mtd, vecs, count, to, retlen, NULL, NULL));
+ return (nand_writev_ecc(mtd, vecs, count, to, retlen, NULL, NULL));
}
/**
@@ -1888,13 +1878,13 @@
*
* NAND write with iovec with ecc
*/
-static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
- loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel)
+static int nand_writev_ecc(struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
+ loff_t to, size_t *retlen, u_char *eccbuf, struct nand_oobinfo *oobsel)
{
int i, page, len, total_len, ret = -EIO, written = 0, chipnr;
int oob, numpages, autoplace = 0, startpage;
struct nand_chip *this = mtd->priv;
- int ppblock = (1 << (this->phys_erase_shift - this->page_shift));
+ int ppblock = (1 << (this->phys_erase_shift - this->page_shift));
u_char *oobbuf, *bufstart;
/* Preset written len for early exit */
@@ -1903,28 +1893,27 @@
/* Calculate total length of data */
total_len = 0;
for (i = 0; i < count; i++)
- total_len += (int) vecs[i].iov_len;
+ total_len += (int)vecs[i].iov_len;
- DEBUG (MTD_DEBUG_LEVEL3,
- "nand_writev: to = 0x%08x, len = %i, count = %ld\n", (unsigned int) to, (unsigned int) total_len, count);
+ DEBUG(MTD_DEBUG_LEVEL3, "nand_writev: to = 0x%08x, len = %i, count = %ld\n", (unsigned int)to, (unsigned int)total_len, count);
/* Do not allow write past end of page */
if ((to + total_len) > mtd->size) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_writev: Attempted write past end of device\n");
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_writev: Attempted write past end of device\n");
return -EINVAL;
}
/* reject writes, which are not page aligned */
- if (NOTALIGNED (to) || NOTALIGNED(total_len)) {
- printk (KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");
+ if (NOTALIGNED(to) || NOTALIGNED(total_len)) {
+ printk(KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");
return -EINVAL;
}
/* Grab the lock and see if the device is available */
- nand_get_device (this, mtd, FL_WRITING);
+ nand_get_device(this, mtd, FL_WRITING);
/* Get the current chip-nr */
- chipnr = (int) (to >> this->chip_shift);
+ chipnr = (int)(to >> this->chip_shift);
/* Select the NAND device */
this->select_chip(mtd, chipnr);
@@ -1945,7 +1934,7 @@
autoplace = 1;
/* Setup start page */
- page = (int) (to >> this->page_shift);
+ page = (int)(to >> this->page_shift);
/* Invalidate the page cache, if we write to the cached page */
if (page <= this->pagebuf && this->pagebuf < ((to + total_len) >> this->page_shift))
this->pagebuf = -1;
@@ -1963,9 +1952,9 @@
* out of this iov in one go */
numpages = (vecs->iov_len - len) >> this->page_shift;
/* Do not cross block boundaries */
- numpages = min (ppblock - (startpage & (ppblock - 1)), numpages);
- oobbuf = nand_prepare_oobbuf (mtd, NULL, oobsel, autoplace, numpages);
- bufstart = (u_char *)vecs->iov_base;
+ numpages = min(ppblock - (startpage & (ppblock - 1)), numpages);
+ oobbuf = nand_prepare_oobbuf(mtd, NULL, oobsel, autoplace, numpages);
+ bufstart = (u_char *) vecs->iov_base;
bufstart += len;
this->data_poi = bufstart;
oob = 0;
@@ -1974,8 +1963,8 @@
* then use the real pageprogram command, else select
* cached programming if supported by the chip.
*/
- ret = nand_write_page (mtd, this, page & this->pagemask,
- &oobbuf[oob], oobsel, i != numpages);
+ ret = nand_write_page(mtd, this, page & this->pagemask,
+ &oobbuf[oob], oobsel, i != numpages);
if (ret)
goto out;
this->data_poi += mtd->oobblock;
@@ -1984,7 +1973,7 @@
page++;
}
/* Check, if we have to switch to the next tuple */
- if (len >= (int) vecs->iov_len) {
+ if (len >= (int)vecs->iov_len) {
vecs++;
len = 0;
count--;
@@ -1998,7 +1987,7 @@
if (vecs->iov_base != NULL && vecs->iov_len)
this->data_buf[cnt++] = ((u_char *) vecs->iov_base)[len++];
/* Check, if we have to switch to the next tuple */
- if (len >= (int) vecs->iov_len) {
+ if (len >= (int)vecs->iov_len) {
vecs++;
len = 0;
count--;
@@ -2008,16 +1997,15 @@
this->data_poi = this->data_buf;
bufstart = this->data_poi;
numpages = 1;
- oobbuf = nand_prepare_oobbuf (mtd, NULL, oobsel, autoplace, numpages);
- ret = nand_write_page (mtd, this, page & this->pagemask,
- oobbuf, oobsel, 0);
+ oobbuf = nand_prepare_oobbuf(mtd, NULL, oobsel, autoplace, numpages);
+ ret = nand_write_page(mtd, this, page & this->pagemask, oobbuf, oobsel, 0);
if (ret)
goto out;
page++;
}
this->data_poi = bufstart;
- ret = nand_verify_pages (mtd, this, startpage, numpages, oobbuf, oobsel, chipnr, 0);
+ ret = nand_verify_pages(mtd, this, startpage, numpages, oobbuf, oobsel, chipnr, 0);
if (ret)
goto out;
@@ -2035,7 +2023,7 @@
}
}
ret = 0;
-out:
+ out:
/* Deselect and wake up anyone waiting on the device */
nand_release_device(mtd);
@@ -2050,12 +2038,12 @@
*
* Standard erase command for NAND chips
*/
-static void single_erase_cmd (struct mtd_info *mtd, int page)
+static void single_erase_cmd(struct mtd_info *mtd, int page)
{
struct nand_chip *this = mtd->priv;
/* Send commands to erase a block */
- this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page);
- this->cmdfunc (mtd, NAND_CMD_ERASE2, -1, -1);
+ this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
+ this->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
}
/**
@@ -2066,15 +2054,15 @@
* AND multi block erase command function
* Erase 4 consecutive blocks
*/
-static void multi_erase_cmd (struct mtd_info *mtd, int page)
+static void multi_erase_cmd(struct mtd_info *mtd, int page)
{
struct nand_chip *this = mtd->priv;
/* Send commands to erase a block */
- this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
- this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
- this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
- this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page);
- this->cmdfunc (mtd, NAND_CMD_ERASE2, -1, -1);
+ this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
+ this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
+ this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
+ this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
+ this->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
}
/**
@@ -2084,9 +2072,9 @@
*
* Erase one ore more blocks
*/
-static int nand_erase (struct mtd_info *mtd, struct erase_info *instr)
+static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)
{
- return nand_erase_nand (mtd, instr, 0);
+ return nand_erase_nand(mtd, instr, 0);
}
#define BBT_PAGE_MASK 0xffffff3f
@@ -2098,7 +2086,7 @@
*
* Erase one ore more blocks
*/
-int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbbt)
+int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, int allowbbt)
{
int page, len, status, pages_per_block, ret, chipnr;
struct nand_chip *this = mtd->priv;
@@ -2107,35 +2095,34 @@
/* It is used to see if the current page is in the same */
/* 256 block group and the same bank as the bbt. */
- DEBUG (MTD_DEBUG_LEVEL3,
- "nand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
+ DEBUG(MTD_DEBUG_LEVEL3, "nand_erase: start = 0x%08x, len = %i\n", (unsigned int)instr->addr, (unsigned int)instr->len);
/* Start address must align on block boundary */
if (instr->addr & ((1 << this->phys_erase_shift) - 1)) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n");
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n");
return -EINVAL;
}
/* Length must align on block boundary */
if (instr->len & ((1 << this->phys_erase_shift) - 1)) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Length not block aligned\n");
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Length not block aligned\n");
return -EINVAL;
}
/* Do not allow erase past end of device */
if ((instr->len + instr->addr) > mtd->size) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Erase past end of device\n");
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Erase past end of device\n");
return -EINVAL;
}
instr->fail_addr = 0xffffffff;
/* Grab the lock and see if the device is available */
- nand_get_device (this, mtd, FL_ERASING);
+ nand_get_device(this, mtd, FL_ERASING);
/* Shift to get first page */
- page = (int) (instr->addr >> this->page_shift);
- chipnr = (int) (instr->addr >> this->chip_shift);
+ page = (int)(instr->addr >> this->page_shift);
+ chipnr = (int)(instr->addr >> this->chip_shift);
/* Calculate pages in each block */
pages_per_block = 1 << (this->phys_erase_shift - this->page_shift);
@@ -2146,7 +2133,7 @@
/* Check the WP bit */
/* Check, if it is write protected */
if (nand_check_wp(mtd)) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Device is write protected!!!\n");
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Device is write protected!!!\n");
instr->state = MTD_ERASE_FAILED;
goto erase_exit;
}
@@ -2166,7 +2153,7 @@
while (len) {
/* Check if we have a bad block, we do not erase bad blocks ! */
if (nand_block_checkbad(mtd, ((loff_t) page) << this->page_shift, 0, allowbbt)) {
- printk (KERN_WARNING "nand_erase: attempt to erase a bad block at page 0x%08x\n", page);
+ printk(KERN_WARNING "nand_erase: attempt to erase a bad block at page 0x%08x\n", page);
instr->state = MTD_ERASE_FAILED;
goto erase_exit;
}
@@ -2176,9 +2163,9 @@
if (page <= this->pagebuf && this->pagebuf < (page + pages_per_block))
this->pagebuf = -1;
- this->erase_cmd (mtd, page & this->pagemask);
+ this->erase_cmd(mtd, page & this->pagemask);
- status = this->waitfunc (mtd, this, FL_ERASING);
+ status = this->waitfunc(mtd, this, FL_ERASING);
/* See if operation failed and additional status checks are available */
if ((status & NAND_STATUS_FAIL) && (this->errstat)) {
@@ -2187,7 +2174,7 @@
/* See if block erase succeeded */
if (status & NAND_STATUS_FAIL) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: " "Failed erase, page 0x%08x\n", page);
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " "Failed erase, page 0x%08x\n", page);
instr->state = MTD_ERASE_FAILED;
instr->fail_addr = (page << this->page_shift);
goto erase_exit;
@@ -2221,7 +2208,7 @@
}
instr->state = MTD_ERASE_DONE;
-erase_exit:
+ erase_exit:
ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
/* Do call back function */
@@ -2236,9 +2223,9 @@
for (chipnr = 0; chipnr < this->numchips; chipnr++) {
if (rewrite_bbt[chipnr]) {
/* update the BBT for chip */
- DEBUG (MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt (%d:0x%0x 0x%0x)\n",
- chipnr, rewrite_bbt[chipnr], this->bbt_td->pages[chipnr]);
- nand_update_bbt (mtd, rewrite_bbt[chipnr]);
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt (%d:0x%0x 0x%0x)\n",
+ chipnr, rewrite_bbt[chipnr], this->bbt_td->pages[chipnr]);
+ nand_update_bbt(mtd, rewrite_bbt[chipnr]);
}
}
}
@@ -2253,31 +2240,30 @@
*
* Sync is actually a wait for chip ready function
*/
-static void nand_sync (struct mtd_info *mtd)
+static void nand_sync(struct mtd_info *mtd)
{
struct nand_chip *this = mtd->priv;
- DEBUG (MTD_DEBUG_LEVEL3, "nand_sync: called\n");
+ DEBUG(MTD_DEBUG_LEVEL3, "nand_sync: called\n");
/* Grab the lock and see if the device is available */
- nand_get_device (this, mtd, FL_SYNCING);
+ nand_get_device(this, mtd, FL_SYNCING);
/* Release it and go back */
- nand_release_device (mtd);
+ nand_release_device(mtd);
}
-
/**
* nand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
* @mtd: MTD device structure
* @ofs: offset relative to mtd start
*/
-static int nand_block_isbad (struct mtd_info *mtd, loff_t ofs)
+static int nand_block_isbad(struct mtd_info *mtd, loff_t ofs)
{
/* Check for invalid offset */
if (ofs > mtd->size)
return -EINVAL;
- return nand_block_checkbad (mtd, ofs, 1, 0);
+ return nand_block_checkbad(mtd, ofs, 1, 0);
}
/**
@@ -2285,17 +2271,17 @@
* @mtd: MTD device structure
* @ofs: offset relative to mtd start
*/
-static int nand_block_markbad (struct mtd_info *mtd, loff_t ofs)
+static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
{
struct nand_chip *this = mtd->priv;
int ret;
- if ((ret = nand_block_isbad(mtd, ofs))) {
- /* If it was bad already, return success and do nothing. */
+ if ((ret = nand_block_isbad(mtd, ofs))) {
+ /* If it was bad already, return success and do nothing. */
if (ret > 0)
return 0;
- return ret;
- }
+ return ret;
+ }
return this->block_markbad(mtd, ofs);
}
@@ -2308,7 +2294,7 @@
{
struct nand_chip *this = mtd->priv;
- return nand_get_device (this, mtd, FL_PM_SUSPENDED);
+ return nand_get_device(this, mtd, FL_PM_SUSPENDED);
}
/**
@@ -2322,30 +2308,44 @@
if (this->state == FL_PM_SUSPENDED)
nand_release_device(mtd);
else
- printk(KERN_ERR "resume() called for the chip which is not "
- "in suspended state\n");
+ printk(KERN_ERR "resume() called for the chip which is not in suspended state\n");
}
+/* module_text_address() isn't exported, and it's mostly a pointless
+ test if this is a module _anyway_ -- they'd have to try _really_ hard
+ to call us from in-kernel code if the core NAND support is modular. */
+#ifdef MODULE
+#define caller_is_module() (1)
+#else
+#define caller_is_module() module_text_address((unsigned long)__builtin_return_address(0))
+#endif
/**
* nand_scan - [NAND Interface] Scan for the NAND device
* @mtd: MTD device structure
* @maxchips: Number of chips to scan for
*
- * This fills out all the not initialized function pointers
+ * This fills out all the uninitialized function pointers
* with the defaults.
* The flash ID is read and the mtd/chip structures are
* filled with the appropriate values. Buffers are allocated if
* they are not provided by the board driver
+ * The mtd->owner field must be set to the module of the caller
*
*/
-int nand_scan (struct mtd_info *mtd, int maxchips)
+int nand_scan(struct mtd_info *mtd, int maxchips)
{
int i, nand_maf_id, nand_dev_id, busw, maf_id;
struct nand_chip *this = mtd->priv;
- /* Get buswidth to select the correct functions*/
+ /* Many callers got this wrong, so check for it for a while... */
+ if (!mtd->owner && caller_is_module()) {
+ printk(KERN_CRIT "nand_scan() called with NULL mtd->owner!\n");
+ BUG();
+ }
+
+ /* Get buswidth to select the correct functions */
busw = this->options & NAND_BUSWIDTH_16;
/* check for proper chip_delay setup, set 20us if not */
@@ -2387,7 +2387,7 @@
this->select_chip(mtd, 0);
/* Send the command for reading device ID */
- this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1);
+ this->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
/* Read manufacturer and device IDs */
nand_maf_id = this->read_byte(mtd);
@@ -2399,7 +2399,8 @@
if (nand_dev_id != nand_flash_ids[i].id)
continue;
- if (!mtd->name) mtd->name = nand_flash_ids[i].name;
+ if (!mtd->name)
+ mtd->name = nand_flash_ids[i].name;
this->chipsize = nand_flash_ids[i].chipsize << 20;
/* New devices have all the information in additional id bytes */
@@ -2416,7 +2417,7 @@
mtd->oobsize = (8 << (extid & 0x01)) * (mtd->oobblock >> 9);
extid >>= 2;
/* Calc blocksize. Blocksize is multiples of 64KiB */
- mtd->erasesize = (64 * 1024) << (extid & 0x03);
+ mtd->erasesize = (64 * 1024) << (extid & 0x03);
extid >>= 2;
/* Get buswidth information */
busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
@@ -2439,13 +2440,12 @@
/* Check, if buswidth is correct. Hardware drivers should set
* this correct ! */
if (busw != (this->options & NAND_BUSWIDTH_16)) {
- printk (KERN_INFO "NAND device: Manufacturer ID:"
- " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
- nand_manuf_ids[maf_id].name , mtd->name);
- printk (KERN_WARNING
- "NAND bus width %d instead %d bit\n",
- (this->options & NAND_BUSWIDTH_16) ? 16 : 8,
- busw ? 16 : 8);
+ printk(KERN_INFO "NAND device: Manufacturer ID:"
+ " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
+ nand_manuf_ids[maf_id].name, mtd->name);
+ printk(KERN_WARNING
+ "NAND bus width %d instead %d bit\n",
+ (this->options & NAND_BUSWIDTH_16) ? 16 : 8, busw ? 16 : 8);
this->select_chip(mtd, -1);
return 1;
}
@@ -2456,13 +2456,12 @@
this->chip_shift = ffs(this->chipsize) - 1;
/* Set the bad block position */
- this->badblockpos = mtd->oobblock > 512 ?
- NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS;
+ this->badblockpos = mtd->oobblock > 512 ? NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS;
/* Get chip options, preserve non chip based options */
this->options &= ~NAND_CHIPOPTIONS_MSK;
this->options |= nand_flash_ids[i].options & NAND_CHIPOPTIONS_MSK;
- /* Set this as a default. Board drivers can override it, if neccecary */
+ /* Set this as a default. Board drivers can override it, if necessary */
this->options |= NAND_NO_AUTOINCR;
/* Check if this is a not a samsung device. Do not clear the options
* for chips which are not having an extended id.
@@ -2480,23 +2479,23 @@
if (mtd->oobblock > 512 && this->cmdfunc == nand_command)
this->cmdfunc = nand_command_lp;
- printk (KERN_INFO "NAND device: Manufacturer ID:"
- " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
- nand_manuf_ids[maf_id].name , nand_flash_ids[i].name);
+ printk(KERN_INFO "NAND device: Manufacturer ID:"
+ " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
+ nand_manuf_ids[maf_id].name, nand_flash_ids[i].name);
break;
}
if (!nand_flash_ids[i].name) {
- printk (KERN_WARNING "No NAND device found!!!\n");
+ printk(KERN_WARNING "No NAND device found!!!\n");
this->select_chip(mtd, -1);
return 1;
}
- for (i=1; i < maxchips; i++) {
+ for (i = 1; i < maxchips; i++) {
this->select_chip(mtd, i);
/* Send the command for reading device ID */
- this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1);
+ this->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
/* Read manufacturer and device IDs */
if (nand_maf_id != this->read_byte(mtd) ||
@@ -2506,13 +2505,13 @@
if (i > 1)
printk(KERN_INFO "%d NAND chips detected\n", i);
- /* Allocate buffers, if neccecary */
+ /* Allocate buffers, if necessary */
if (!this->oob_buf) {
size_t len;
len = mtd->oobsize << (this->phys_erase_shift - this->page_shift);
- this->oob_buf = kmalloc (len, GFP_KERNEL);
+ this->oob_buf = kmalloc(len, GFP_KERNEL);
if (!this->oob_buf) {
- printk (KERN_ERR "nand_scan(): Cannot allocate oob_buf\n");
+ printk(KERN_ERR "nand_scan(): Cannot allocate oob_buf\n");
return -ENOMEM;
}
this->options |= NAND_OOBBUF_ALLOC;
@@ -2521,11 +2520,11 @@
if (!this->data_buf) {
size_t len;
len = mtd->oobblock + mtd->oobsize;
- this->data_buf = kmalloc (len, GFP_KERNEL);
+ this->data_buf = kmalloc(len, GFP_KERNEL);
if (!this->data_buf) {
if (this->options & NAND_OOBBUF_ALLOC)
- kfree (this->oob_buf);
- printk (KERN_ERR "nand_scan(): Cannot allocate data_buf\n");
+ kfree(this->oob_buf);
+ printk(KERN_ERR "nand_scan(): Cannot allocate data_buf\n");
return -ENOMEM;
}
this->options |= NAND_DATABUF_ALLOC;
@@ -2555,8 +2554,7 @@
this->autooob = &nand_oob_64;
break;
default:
- printk (KERN_WARNING "No oob scheme defined for oobsize %d\n",
- mtd->oobsize);
+ printk(KERN_WARNING "No oob scheme defined for oobsize %d\n", mtd->oobsize);
BUG();
}
}
@@ -2571,7 +2569,7 @@
* check ECC mode, default to software
* if 3byte/512byte hardware ECC is selected and we have 256 byte pagesize
* fallback to software ECC
- */
+ */
this->eccsize = 256; /* set default eccsize */
this->eccbytes = 3;
@@ -2591,19 +2589,19 @@
case NAND_ECC_HW6_512:
case NAND_ECC_HW8_512:
if (mtd->oobblock == 256) {
- printk (KERN_WARNING "512 byte HW ECC not possible on 256 Byte pagesize, fallback to SW ECC \n");
+ printk(KERN_WARNING "512 byte HW ECC not possible on 256 Byte pagesize, fallback to SW ECC \n");
this->eccmode = NAND_ECC_SOFT;
this->calculate_ecc = nand_calculate_ecc;
this->correct_data = nand_correct_data;
} else
- this->eccsize = 512; /* set eccsize to 512 */
+ this->eccsize = 512; /* set eccsize to 512 */
break;
case NAND_ECC_HW3_256:
break;
case NAND_ECC_NONE:
- printk (KERN_WARNING "NAND_ECC_NONE selected by board driver. This is not recommended !!\n");
+ printk(KERN_WARNING "NAND_ECC_NONE selected by board driver. This is not recommended !!\n");
this->eccmode = NAND_ECC_NONE;
break;
@@ -2613,13 +2611,13 @@
break;
default:
- printk (KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode);
+ printk(KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode);
BUG();
}
/* Check hardware ecc function availability and adjust number of ecc bytes per
* calculation step
- */
+ */
switch (this->eccmode) {
case NAND_ECC_HW12_2048:
this->eccbytes += 4;
@@ -2631,7 +2629,7 @@
case NAND_ECC_HW3_256:
if (this->calculate_ecc && this->correct_data && this->enable_hwecc)
break;
- printk (KERN_WARNING "No ECC functions supplied, Hardware ECC not possible\n");
+ printk(KERN_WARNING "No ECC functions supplied, Hardware ECC not possible\n");
BUG();
}
@@ -2659,8 +2657,8 @@
/* Initialize state, waitqueue and spinlock */
this->state = FL_READY;
- init_waitqueue_head (&this->wq);
- spin_lock_init (&this->chip_lock);
+ init_waitqueue_head(&this->wq);
+ spin_lock_init(&this->chip_lock);
/* De-select the device */
this->select_chip(mtd, -1);
@@ -2695,44 +2693,41 @@
/* and make the autooob the default one */
memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo));
- mtd->owner = THIS_MODULE;
-
/* Check, if we should skip the bad block table scan */
if (this->options & NAND_SKIP_BBTSCAN)
return 0;
/* Build bad block table */
- return this->scan_bbt (mtd);
+ return this->scan_bbt(mtd);
}
/**
* nand_release - [NAND Interface] Free resources held by the NAND device
* @mtd: MTD device structure
*/
-void nand_release (struct mtd_info *mtd)
+void nand_release(struct mtd_info *mtd)
{
struct nand_chip *this = mtd->priv;
#ifdef CONFIG_MTD_PARTITIONS
/* Deregister partitions */
- del_mtd_partitions (mtd);
+ del_mtd_partitions(mtd);
#endif
/* Deregister the device */
- del_mtd_device (mtd);
+ del_mtd_device(mtd);
/* Free bad block table memory */
- kfree (this->bbt);
+ kfree(this->bbt);
/* Buffer allocated by nand_scan ? */
if (this->options & NAND_OOBBUF_ALLOC)
- kfree (this->oob_buf);
+ kfree(this->oob_buf);
/* Buffer allocated by nand_scan ? */
if (this->options & NAND_DATABUF_ALLOC)
- kfree (this->data_buf);
+ kfree(this->data_buf);
}
-EXPORT_SYMBOL_GPL (nand_scan);
-EXPORT_SYMBOL_GPL (nand_release);
-
+EXPORT_SYMBOL_GPL(nand_scan);
+EXPORT_SYMBOL_GPL(nand_release);
static int __init nand_base_init(void)
{
@@ -2748,6 +2743,6 @@
module_init(nand_base_init);
module_exit(nand_base_exit);
-MODULE_LICENSE ("GPL");
-MODULE_AUTHOR ("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
-MODULE_DESCRIPTION ("Generic NAND flash driver code");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
+MODULE_DESCRIPTION("Generic NAND flash driver code");
diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c
index ca28699..9adc6d6 100644
--- a/drivers/mtd/nand/nand_bbt.c
+++ b/drivers/mtd/nand/nand_bbt.c
@@ -48,7 +48,7 @@
*
* Following assumptions are made:
* - bbts start at a page boundary, if autolocated on a block boundary
- * - the space neccecary for a bbt in FLASH does not exceed a block boundary
+ * - the space necessary for a bbt in FLASH does not exceed a block boundary
*
*/
@@ -60,7 +60,7 @@
#include <linux/mtd/compatmac.h>
#include <linux/bitops.h>
#include <linux/delay.h>
-
+#include <linux/vmalloc.h>
/**
* check_pattern - [GENERIC] check if a pattern is in the buffer
@@ -75,7 +75,7 @@
* pattern area contain 0xff
*
*/
-static int check_pattern (uint8_t *buf, int len, int paglen, struct nand_bbt_descr *td)
+static int check_pattern(uint8_t *buf, int len, int paglen, struct nand_bbt_descr *td)
{
int i, end = 0;
uint8_t *p = buf;
@@ -116,7 +116,7 @@
* no optional empty check
*
*/
-static int check_short_pattern (uint8_t *buf, struct nand_bbt_descr *td)
+static int check_short_pattern(uint8_t *buf, struct nand_bbt_descr *td)
{
int i;
uint8_t *p = buf;
@@ -142,8 +142,8 @@
* Read the bad block table starting from page.
*
*/
-static int read_bbt (struct mtd_info *mtd, uint8_t *buf, int page, int num,
- int bits, int offs, int reserved_block_code)
+static int read_bbt(struct mtd_info *mtd, uint8_t *buf, int page, int num,
+ int bits, int offs, int reserved_block_code)
{
int res, i, j, act = 0;
struct nand_chip *this = mtd->priv;
@@ -152,17 +152,17 @@
uint8_t msk = (uint8_t) ((1 << bits) - 1);
totlen = (num * bits) >> 3;
- from = ((loff_t)page) << this->page_shift;
+ from = ((loff_t) page) << this->page_shift;
while (totlen) {
- len = min (totlen, (size_t) (1 << this->bbt_erase_shift));
- res = mtd->read_ecc (mtd, from, len, &retlen, buf, NULL, this->autooob);
+ len = min(totlen, (size_t) (1 << this->bbt_erase_shift));
+ res = mtd->read_ecc(mtd, from, len, &retlen, buf, NULL, this->autooob);
if (res < 0) {
if (retlen != len) {
- printk (KERN_INFO "nand_bbt: Error reading bad block table\n");
+ printk(KERN_INFO "nand_bbt: Error reading bad block table\n");
return res;
}
- printk (KERN_WARNING "nand_bbt: ECC error while reading bad block table\n");
+ printk(KERN_WARNING "nand_bbt: ECC error while reading bad block table\n");
}
/* Analyse data */
@@ -172,17 +172,16 @@
uint8_t tmp = (dat >> j) & msk;
if (tmp == msk)
continue;
- if (reserved_block_code &&
- (tmp == reserved_block_code)) {
- printk (KERN_DEBUG "nand_read_bbt: Reserved block at 0x%08x\n",
- ((offs << 2) + (act >> 1)) << this->bbt_erase_shift);
+ if (reserved_block_code && (tmp == reserved_block_code)) {
+ printk(KERN_DEBUG "nand_read_bbt: Reserved block at 0x%08x\n",
+ ((offs << 2) + (act >> 1)) << this->bbt_erase_shift);
this->bbt[offs + (act >> 3)] |= 0x2 << (act & 0x06);
continue;
}
/* Leave it for now, if its matured we can move this
* message to MTD_DEBUG_LEVEL0 */
- printk (KERN_DEBUG "nand_read_bbt: Bad block at 0x%08x\n",
- ((offs << 2) + (act >> 1)) << this->bbt_erase_shift);
+ printk(KERN_DEBUG "nand_read_bbt: Bad block at 0x%08x\n",
+ ((offs << 2) + (act >> 1)) << this->bbt_erase_shift);
/* Factory marked bad or worn out ? */
if (tmp == 0)
this->bbt[offs + (act >> 3)] |= 0x3 << (act & 0x06);
@@ -207,7 +206,7 @@
* Read the bad block table for all chips starting at a given page
* We assume that the bbt bits are in consecutive order.
*/
-static int read_abs_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td, int chip)
+static int read_abs_bbt(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td, int chip)
{
struct nand_chip *this = mtd->priv;
int res = 0, i;
@@ -242,23 +241,22 @@
* We assume that the bbt bits are in consecutive order.
*
*/
-static int read_abs_bbts (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td,
- struct nand_bbt_descr *md)
+static int read_abs_bbts(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td, struct nand_bbt_descr *md)
{
struct nand_chip *this = mtd->priv;
/* Read the primary version, if available */
if (td->options & NAND_BBT_VERSION) {
- nand_read_raw (mtd, buf, td->pages[0] << this->page_shift, mtd->oobblock, mtd->oobsize);
+ nand_read_raw(mtd, buf, td->pages[0] << this->page_shift, mtd->oobblock, mtd->oobsize);
td->version[0] = buf[mtd->oobblock + td->veroffs];
- printk (KERN_DEBUG "Bad block table at page %d, version 0x%02X\n", td->pages[0], td->version[0]);
+ printk(KERN_DEBUG "Bad block table at page %d, version 0x%02X\n", td->pages[0], td->version[0]);
}
/* Read the mirror version, if available */
if (md && (md->options & NAND_BBT_VERSION)) {
- nand_read_raw (mtd, buf, md->pages[0] << this->page_shift, mtd->oobblock, mtd->oobsize);
+ nand_read_raw(mtd, buf, md->pages[0] << this->page_shift, mtd->oobblock, mtd->oobsize);
md->version[0] = buf[mtd->oobblock + md->veroffs];
- printk (KERN_DEBUG "Bad block table at page %d, version 0x%02X\n", md->pages[0], md->version[0]);
+ printk(KERN_DEBUG "Bad block table at page %d, version 0x%02X\n", md->pages[0], md->version[0]);
}
return 1;
@@ -275,7 +273,7 @@
* Create a bad block table by scanning the device
* for the given good/bad block identify pattern
*/
-static int create_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd, int chip)
+static int create_bbt(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd, int chip)
{
struct nand_chip *this = mtd->priv;
int i, j, numblocks, len, scanlen;
@@ -283,7 +281,7 @@
loff_t from;
size_t readlen, ooblen;
- printk (KERN_INFO "Scanning device for bad blocks\n");
+ printk(KERN_INFO "Scanning device for bad blocks\n");
if (bd->options & NAND_BBT_SCANALLPAGES)
len = 1 << (this->bbt_erase_shift - this->page_shift);
@@ -300,7 +298,7 @@
readlen = bd->len;
} else {
/* Full page content should be read */
- scanlen = mtd->oobblock + mtd->oobsize;
+ scanlen = mtd->oobblock + mtd->oobsize;
readlen = len * mtd->oobblock;
ooblen = len * mtd->oobsize;
}
@@ -313,8 +311,8 @@
from = 0;
} else {
if (chip >= this->numchips) {
- printk (KERN_WARNING "create_bbt(): chipnr (%d) > available chips (%d)\n",
- chip + 1, this->numchips);
+ printk(KERN_WARNING "create_bbt(): chipnr (%d) > available chips (%d)\n",
+ chip + 1, this->numchips);
return -EINVAL;
}
numblocks = this->chipsize >> (this->bbt_erase_shift - 1);
@@ -327,7 +325,7 @@
int ret;
if (bd->options & NAND_BBT_SCANEMPTY)
- if ((ret = nand_read_raw (mtd, buf, from, readlen, ooblen)))
+ if ((ret = nand_read_raw(mtd, buf, from, readlen, ooblen)))
return ret;
for (j = 0; j < len; j++) {
@@ -336,22 +334,21 @@
/* Read the full oob until read_oob is fixed to
* handle single byte reads for 16 bit buswidth */
- ret = mtd->read_oob(mtd, from + j * mtd->oobblock,
- mtd->oobsize, &retlen, buf);
+ ret = mtd->read_oob(mtd, from + j * mtd->oobblock, mtd->oobsize, &retlen, buf);
if (ret)
return ret;
- if (check_short_pattern (buf, bd)) {
+ if (check_short_pattern(buf, bd)) {
this->bbt[i >> 3] |= 0x03 << (i & 0x6);
- printk (KERN_WARNING "Bad eraseblock %d at 0x%08x\n",
- i >> 1, (unsigned int) from);
+ printk(KERN_WARNING "Bad eraseblock %d at 0x%08x\n",
+ i >> 1, (unsigned int)from);
break;
}
} else {
- if (check_pattern (&buf[j * scanlen], scanlen, mtd->oobblock, bd)) {
+ if (check_pattern(&buf[j * scanlen], scanlen, mtd->oobblock, bd)) {
this->bbt[i >> 3] |= 0x03 << (i & 0x6);
- printk (KERN_WARNING "Bad eraseblock %d at 0x%08x\n",
- i >> 1, (unsigned int) from);
+ printk(KERN_WARNING "Bad eraseblock %d at 0x%08x\n",
+ i >> 1, (unsigned int)from);
break;
}
}
@@ -374,12 +371,12 @@
* block.
* If the option NAND_BBT_PERCHIP is given, each chip is searched
* for a bbt, which contains the bad block information of this chip.
- * This is neccecary to provide support for certain DOC devices.
+ * This is necessary to provide support for certain DOC devices.
*
* The bbt ident pattern resides in the oob area of the first page
* in a block.
*/
-static int search_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td)
+static int search_bbt(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td)
{
struct nand_chip *this = mtd->priv;
int i, chips;
@@ -389,7 +386,7 @@
/* Search direction top -> down ? */
if (td->options & NAND_BBT_LASTBLOCK) {
- startblock = (mtd->size >> this->bbt_erase_shift) -1;
+ startblock = (mtd->size >> this->bbt_erase_shift) - 1;
dir = -1;
} else {
startblock = 0;
@@ -417,7 +414,7 @@
for (block = 0; block < td->maxblocks; block++) {
int actblock = startblock + dir * block;
/* Read first page */
- nand_read_raw (mtd, buf, actblock << this->bbt_erase_shift, mtd->oobblock, mtd->oobsize);
+ nand_read_raw(mtd, buf, actblock << this->bbt_erase_shift, mtd->oobblock, mtd->oobsize);
if (!check_pattern(buf, scanlen, mtd->oobblock, td)) {
td->pages[i] = actblock << (this->bbt_erase_shift - this->page_shift);
if (td->options & NAND_BBT_VERSION) {
@@ -431,9 +428,10 @@
/* Check, if we found a bbt for each requested chip */
for (i = 0; i < chips; i++) {
if (td->pages[i] == -1)
- printk (KERN_WARNING "Bad block table not found for chip %d\n", i);
+ printk(KERN_WARNING "Bad block table not found for chip %d\n", i);
else
- printk (KERN_DEBUG "Bad block table found at page %d, version 0x%02X\n", td->pages[i], td->version[i]);
+ printk(KERN_DEBUG "Bad block table found at page %d, version 0x%02X\n", td->pages[i],
+ td->version[i]);
}
return 0;
}
@@ -447,21 +445,19 @@
*
* Search and read the bad block table(s)
*/
-static int search_read_bbts (struct mtd_info *mtd, uint8_t *buf,
- struct nand_bbt_descr *td, struct nand_bbt_descr *md)
+static int search_read_bbts(struct mtd_info *mtd, uint8_t * buf, struct nand_bbt_descr *td, struct nand_bbt_descr *md)
{
/* Search the primary table */
- search_bbt (mtd, buf, td);
+ search_bbt(mtd, buf, td);
/* Search the mirror table */
if (md)
- search_bbt (mtd, buf, md);
+ search_bbt(mtd, buf, md);
/* Force result check */
return 1;
}
-
/**
* write_bbt - [GENERIC] (Re)write the bad block table
*
@@ -474,8 +470,8 @@
* (Re)write the bad block table
*
*/
-static int write_bbt (struct mtd_info *mtd, uint8_t *buf,
- struct nand_bbt_descr *td, struct nand_bbt_descr *md, int chipsel)
+static int write_bbt(struct mtd_info *mtd, uint8_t *buf,
+ struct nand_bbt_descr *td, struct nand_bbt_descr *md, int chipsel)
{
struct nand_chip *this = mtd->priv;
struct nand_oobinfo oobinfo;
@@ -492,7 +488,7 @@
rcode = 0xff;
/* Write bad block table per chip rather than per device ? */
if (td->options & NAND_BBT_PERCHIP) {
- numblocks = (int) (this->chipsize >> this->bbt_erase_shift);
+ numblocks = (int)(this->chipsize >> this->bbt_erase_shift);
/* Full device write or specific chip ? */
if (chipsel == -1) {
nrchips = this->numchips;
@@ -501,7 +497,7 @@
chip = chipsel;
}
} else {
- numblocks = (int) (mtd->size >> this->bbt_erase_shift);
+ numblocks = (int)(mtd->size >> this->bbt_erase_shift);
nrchips = 1;
}
@@ -540,9 +536,9 @@
if (!md || md->pages[chip] != page)
goto write;
}
- printk (KERN_ERR "No space left to write bad block table\n");
+ printk(KERN_ERR "No space left to write bad block table\n");
return -ENOSPC;
-write:
+ write:
/* Set up shift count and masks for the flash table */
bits = td->options & NAND_BBT_NRBITS_MSK;
@@ -558,7 +554,7 @@
to = ((loff_t) page) << this->page_shift;
- memcpy (&oobinfo, this->autooob, sizeof(oobinfo));
+ memcpy(&oobinfo, this->autooob, sizeof(oobinfo));
oobinfo.useecc = MTD_NANDECC_PLACEONLY;
/* Must we save the block contents ? */
@@ -566,22 +562,23 @@
/* Make it block aligned */
to &= ~((loff_t) ((1 << this->bbt_erase_shift) - 1));
len = 1 << this->bbt_erase_shift;
- res = mtd->read_ecc (mtd, to, len, &retlen, buf, &buf[len], &oobinfo);
+ res = mtd->read_ecc(mtd, to, len, &retlen, buf, &buf[len], &oobinfo);
if (res < 0) {
if (retlen != len) {
- printk (KERN_INFO "nand_bbt: Error reading block for writing the bad block table\n");
+ printk(KERN_INFO
+ "nand_bbt: Error reading block for writing the bad block table\n");
return res;
}
- printk (KERN_WARNING "nand_bbt: ECC error while reading block for writing bad block table\n");
+ printk(KERN_WARNING "nand_bbt: ECC error while reading block for writing bad block table\n");
}
/* Calc the byte offset in the buffer */
pageoffs = page - (int)(to >> this->page_shift);
offs = pageoffs << this->page_shift;
/* Preset the bbt area with 0xff */
- memset (&buf[offs], 0xff, (size_t)(numblocks >> sft));
+ memset(&buf[offs], 0xff, (size_t) (numblocks >> sft));
/* Preset the bbt's oob area with 0xff */
- memset (&buf[len + pageoffs * mtd->oobsize], 0xff,
- ((len >> this->page_shift) - pageoffs) * mtd->oobsize);
+ memset(&buf[len + pageoffs * mtd->oobsize], 0xff,
+ ((len >> this->page_shift) - pageoffs) * mtd->oobsize);
if (td->options & NAND_BBT_VERSION) {
buf[len + (pageoffs * mtd->oobsize) + td->veroffs] = td->version[chip];
}
@@ -589,22 +586,22 @@
/* Calc length */
len = (size_t) (numblocks >> sft);
/* Make it page aligned ! */
- len = (len + (mtd->oobblock-1)) & ~(mtd->oobblock-1);
+ len = (len + (mtd->oobblock - 1)) & ~(mtd->oobblock - 1);
/* Preset the buffer with 0xff */
- memset (buf, 0xff, len + (len >> this->page_shift) * mtd->oobsize);
+ memset(buf, 0xff, len + (len >> this->page_shift) * mtd->oobsize);
offs = 0;
/* Pattern is located in oob area of first page */
- memcpy (&buf[len + td->offs], td->pattern, td->len);
+ memcpy(&buf[len + td->offs], td->pattern, td->len);
if (td->options & NAND_BBT_VERSION) {
buf[len + td->veroffs] = td->version[chip];
}
}
/* walk through the memory table */
- for (i = 0; i < numblocks; ) {
+ for (i = 0; i < numblocks;) {
uint8_t dat;
dat = this->bbt[bbtoffs + (i >> 2)];
- for (j = 0; j < 4; j++ , i++) {
+ for (j = 0; j < 4; j++, i++) {
int sftcnt = (i << (3 - sft)) & sftmsk;
/* Do not store the reserved bbt blocks ! */
buf[offs + (i >> sft)] &= ~(msk[dat & 0x03] << sftcnt);
@@ -612,23 +609,23 @@
}
}
- memset (&einfo, 0, sizeof (einfo));
+ memset(&einfo, 0, sizeof(einfo));
einfo.mtd = mtd;
- einfo.addr = (unsigned long) to;
+ einfo.addr = (unsigned long)to;
einfo.len = 1 << this->bbt_erase_shift;
- res = nand_erase_nand (mtd, &einfo, 1);
+ res = nand_erase_nand(mtd, &einfo, 1);
if (res < 0) {
- printk (KERN_WARNING "nand_bbt: Error during block erase: %d\n", res);
+ printk(KERN_WARNING "nand_bbt: Error during block erase: %d\n", res);
return res;
}
- res = mtd->write_ecc (mtd, to, len, &retlen, buf, &buf[len], &oobinfo);
+ res = mtd->write_ecc(mtd, to, len, &retlen, buf, &buf[len], &oobinfo);
if (res < 0) {
- printk (KERN_WARNING "nand_bbt: Error while writing bad block table %d\n", res);
+ printk(KERN_WARNING "nand_bbt: Error while writing bad block table %d\n", res);
return res;
}
- printk (KERN_DEBUG "Bad block table written to 0x%08x, version 0x%02X\n",
- (unsigned int) to, td->version[chip]);
+ printk(KERN_DEBUG "Bad block table written to 0x%08x, version 0x%02X\n",
+ (unsigned int)to, td->version[chip]);
/* Mark it as used */
td->pages[chip] = page;
@@ -644,27 +641,27 @@
* The function creates a memory based bbt by scanning the device
* for manufacturer / software marked good / bad blocks
*/
-static inline int nand_memory_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd)
+static inline int nand_memory_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd)
{
struct nand_chip *this = mtd->priv;
bd->options &= ~NAND_BBT_SCANEMPTY;
- return create_bbt (mtd, this->data_buf, bd, -1);
+ return create_bbt(mtd, this->data_buf, bd, -1);
}
/**
- * check_create - [GENERIC] create and write bbt(s) if neccecary
+ * check_create - [GENERIC] create and write bbt(s) if necessary
* @mtd: MTD device structure
* @buf: temporary buffer
* @bd: descriptor for the good/bad block search pattern
*
* The function checks the results of the previous call to read_bbt
- * and creates / updates the bbt(s) if neccecary
- * Creation is neccecary if no bbt was found for the chip/device
- * Update is neccecary if one of the tables is missing or the
+ * and creates / updates the bbt(s) if necessary
+ * Creation is necessary if no bbt was found for the chip/device
+ * Update is necessary if one of the tables is missing or the
* version nr. of one table is less than the other
*/
-static int check_create (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd)
+static int check_create(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd)
{
int i, chips, writeops, chipsel, res;
struct nand_chip *this = mtd->priv;
@@ -732,35 +729,35 @@
rd = td;
goto writecheck;
}
-create:
+ create:
/* Create the bad block table by scanning the device ? */
if (!(td->options & NAND_BBT_CREATE))
continue;
/* Create the table in memory by scanning the chip(s) */
- create_bbt (mtd, buf, bd, chipsel);
+ create_bbt(mtd, buf, bd, chipsel);
td->version[i] = 1;
if (md)
md->version[i] = 1;
-writecheck:
+ writecheck:
/* read back first ? */
if (rd)
- read_abs_bbt (mtd, buf, rd, chipsel);
+ read_abs_bbt(mtd, buf, rd, chipsel);
/* If they weren't versioned, read both. */
if (rd2)
- read_abs_bbt (mtd, buf, rd2, chipsel);
+ read_abs_bbt(mtd, buf, rd2, chipsel);
/* Write the bad block table to the device ? */
if ((writeops & 0x01) && (td->options & NAND_BBT_WRITE)) {
- res = write_bbt (mtd, buf, td, md, chipsel);
+ res = write_bbt(mtd, buf, td, md, chipsel);
if (res < 0)
return res;
}
/* Write the mirror bad block table to the device ? */
if ((writeops & 0x02) && md && (md->options & NAND_BBT_WRITE)) {
- res = write_bbt (mtd, buf, md, td, chipsel);
+ res = write_bbt(mtd, buf, md, td, chipsel);
if (res < 0)
return res;
}
@@ -777,7 +774,7 @@
* accidental erasures / writes. The regions are identified by
* the mark 0x02.
*/
-static void mark_bbt_region (struct mtd_info *mtd, struct nand_bbt_descr *td)
+static void mark_bbt_region(struct mtd_info *mtd, struct nand_bbt_descr *td)
{
struct nand_chip *this = mtd->priv;
int i, j, chips, block, nrblocks, update;
@@ -795,7 +792,8 @@
for (i = 0; i < chips; i++) {
if ((td->options & NAND_BBT_ABSPAGE) ||
!(td->options & NAND_BBT_WRITE)) {
- if (td->pages[i] == -1) continue;
+ if (td->pages[i] == -1)
+ continue;
block = td->pages[i] >> (this->bbt_erase_shift - this->page_shift);
block <<= 1;
oldval = this->bbt[(block >> 3)];
@@ -815,7 +813,8 @@
oldval = this->bbt[(block >> 3)];
newval = oldval | (0x2 << (block & 0x06));
this->bbt[(block >> 3)] = newval;
- if (oldval != newval) update = 1;
+ if (oldval != newval)
+ update = 1;
block += 2;
}
/* If we want reserved blocks to be recorded to flash, and some
@@ -840,7 +839,7 @@
* by calling the nand_free_bbt function.
*
*/
-int nand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd)
+int nand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd)
{
struct nand_chip *this = mtd->priv;
int len, res = 0;
@@ -850,21 +849,21 @@
len = mtd->size >> (this->bbt_erase_shift + 2);
/* Allocate memory (2bit per block) */
- this->bbt = kmalloc (len, GFP_KERNEL);
+ this->bbt = kmalloc(len, GFP_KERNEL);
if (!this->bbt) {
- printk (KERN_ERR "nand_scan_bbt: Out of memory\n");
+ printk(KERN_ERR "nand_scan_bbt: Out of memory\n");
return -ENOMEM;
}
/* Clear the memory bad block table */
- memset (this->bbt, 0x00, len);
+ memset(this->bbt, 0x00, len);
/* If no primary table decriptor is given, scan the device
* to build a memory based bad block table
*/
if (!td) {
if ((res = nand_memory_bbt(mtd, bd))) {
- printk (KERN_ERR "nand_bbt: Can't scan flash and build the RAM-based BBT\n");
- kfree (this->bbt);
+ printk(KERN_ERR "nand_bbt: Can't scan flash and build the RAM-based BBT\n");
+ kfree(this->bbt);
this->bbt = NULL;
}
return res;
@@ -873,35 +872,34 @@
/* Allocate a temporary buffer for one eraseblock incl. oob */
len = (1 << this->bbt_erase_shift);
len += (len >> this->page_shift) * mtd->oobsize;
- buf = kmalloc (len, GFP_KERNEL);
+ buf = vmalloc(len);
if (!buf) {
- printk (KERN_ERR "nand_bbt: Out of memory\n");
- kfree (this->bbt);
+ printk(KERN_ERR "nand_bbt: Out of memory\n");
+ kfree(this->bbt);
this->bbt = NULL;
return -ENOMEM;
}
/* Is the bbt at a given page ? */
if (td->options & NAND_BBT_ABSPAGE) {
- res = read_abs_bbts (mtd, buf, td, md);
+ res = read_abs_bbts(mtd, buf, td, md);
} else {
/* Search the bad block table using a pattern in oob */
- res = search_read_bbts (mtd, buf, td, md);
+ res = search_read_bbts(mtd, buf, td, md);
}
if (res)
- res = check_create (mtd, buf, bd);
+ res = check_create(mtd, buf, bd);
/* Prevent the bbt regions from erasing / writing */
- mark_bbt_region (mtd, td);
+ mark_bbt_region(mtd, td);
if (md)
- mark_bbt_region (mtd, md);
+ mark_bbt_region(mtd, md);
- kfree (buf);
+ vfree(buf);
return res;
}
-
/**
* nand_update_bbt - [NAND Interface] update bad block table(s)
* @mtd: MTD device structure
@@ -909,7 +907,7 @@
*
* The function updates the bad block table(s)
*/
-int nand_update_bbt (struct mtd_info *mtd, loff_t offs)
+int nand_update_bbt(struct mtd_info *mtd, loff_t offs)
{
struct nand_chip *this = mtd->priv;
int len, res = 0, writeops = 0;
@@ -925,9 +923,9 @@
/* Allocate a temporary buffer for one eraseblock incl. oob */
len = (1 << this->bbt_erase_shift);
len += (len >> this->page_shift) * mtd->oobsize;
- buf = kmalloc (len, GFP_KERNEL);
+ buf = kmalloc(len, GFP_KERNEL);
if (!buf) {
- printk (KERN_ERR "nand_update_bbt: Out of memory\n");
+ printk(KERN_ERR "nand_update_bbt: Out of memory\n");
return -ENOMEM;
}
@@ -935,7 +933,7 @@
/* Do we have a bbt per chip ? */
if (td->options & NAND_BBT_PERCHIP) {
- chip = (int) (offs >> this->chip_shift);
+ chip = (int)(offs >> this->chip_shift);
chipsel = chip;
} else {
chip = 0;
@@ -948,17 +946,17 @@
/* Write the bad block table to the device ? */
if ((writeops & 0x01) && (td->options & NAND_BBT_WRITE)) {
- res = write_bbt (mtd, buf, td, md, chipsel);
+ res = write_bbt(mtd, buf, td, md, chipsel);
if (res < 0)
goto out;
}
/* Write the mirror bad block table to the device ? */
if ((writeops & 0x02) && md && (md->options & NAND_BBT_WRITE)) {
- res = write_bbt (mtd, buf, md, td, chipsel);
+ res = write_bbt(mtd, buf, md, td, chipsel);
}
-out:
- kfree (buf);
+ out:
+ kfree(buf);
return res;
}
@@ -981,14 +979,14 @@
};
static struct nand_bbt_descr smallpage_flashbased = {
- .options = NAND_BBT_SCANEMPTY | NAND_BBT_SCANALLPAGES,
+ .options = NAND_BBT_SCAN2NDPAGE,
.offs = 5,
.len = 1,
.pattern = scan_ff_pattern
};
static struct nand_bbt_descr largepage_flashbased = {
- .options = NAND_BBT_SCANEMPTY | NAND_BBT_SCANALLPAGES,
+ .options = NAND_BBT_SCAN2NDPAGE,
.offs = 0,
.len = 2,
.pattern = scan_ff_pattern
@@ -1036,7 +1034,7 @@
* support for the device and calls the nand_scan_bbt function
*
*/
-int nand_default_bbt (struct mtd_info *mtd)
+int nand_default_bbt(struct mtd_info *mtd)
{
struct nand_chip *this = mtd->priv;
@@ -1046,7 +1044,7 @@
* of the good / bad information, so we _must_ store
* this information in a good / bad table during
* startup
- */
+ */
if (this->options & NAND_IS_AND) {
/* Use the default pattern descriptors */
if (!this->bbt_td) {
@@ -1054,10 +1052,9 @@
this->bbt_md = &bbt_mirror_descr;
}
this->options |= NAND_USE_FLASH_BBT;
- return nand_scan_bbt (mtd, &agand_flashbased);
+ return nand_scan_bbt(mtd, &agand_flashbased);
}
-
/* Is a flash based bad block table requested ? */
if (this->options & NAND_USE_FLASH_BBT) {
/* Use the default pattern descriptors */
@@ -1066,18 +1063,17 @@
this->bbt_md = &bbt_mirror_descr;
}
if (!this->badblock_pattern) {
- this->badblock_pattern = (mtd->oobblock > 512) ?
- &largepage_flashbased : &smallpage_flashbased;
+ this->badblock_pattern = (mtd->oobblock > 512) ? &largepage_flashbased : &smallpage_flashbased;
}
} else {
this->bbt_td = NULL;
this->bbt_md = NULL;
if (!this->badblock_pattern) {
this->badblock_pattern = (mtd->oobblock > 512) ?
- &largepage_memorybased : &smallpage_memorybased;
+ &largepage_memorybased : &smallpage_memorybased;
}
}
- return nand_scan_bbt (mtd, this->badblock_pattern);
+ return nand_scan_bbt(mtd, this->badblock_pattern);
}
/**
@@ -1087,26 +1083,29 @@
* @allowbbt: allow access to bad block table region
*
*/
-int nand_isbad_bbt (struct mtd_info *mtd, loff_t offs, int allowbbt)
+int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt)
{
struct nand_chip *this = mtd->priv;
int block;
- uint8_t res;
+ uint8_t res;
/* Get block number * 2 */
- block = (int) (offs >> (this->bbt_erase_shift - 1));
+ block = (int)(offs >> (this->bbt_erase_shift - 1));
res = (this->bbt[block >> 3] >> (block & 0x06)) & 0x03;
- DEBUG (MTD_DEBUG_LEVEL2, "nand_isbad_bbt(): bbt info for offs 0x%08x: (block %d) 0x%02x\n",
- (unsigned int)offs, block >> 1, res);
+ DEBUG(MTD_DEBUG_LEVEL2, "nand_isbad_bbt(): bbt info for offs 0x%08x: (block %d) 0x%02x\n",
+ (unsigned int)offs, block >> 1, res);
switch ((int)res) {
- case 0x00: return 0;
- case 0x01: return 1;
- case 0x02: return allowbbt ? 0 : 1;
+ case 0x00:
+ return 0;
+ case 0x01:
+ return 1;
+ case 0x02:
+ return allowbbt ? 0 : 1;
}
return 1;
}
-EXPORT_SYMBOL (nand_scan_bbt);
-EXPORT_SYMBOL (nand_default_bbt);
+EXPORT_SYMBOL(nand_scan_bbt);
+EXPORT_SYMBOL(nand_default_bbt);
diff --git a/drivers/mtd/nand/nand_ecc.c b/drivers/mtd/nand/nand_ecc.c
index 40ac909..1018929 100644
--- a/drivers/mtd/nand/nand_ecc.c
+++ b/drivers/mtd/nand/nand_ecc.c
@@ -62,7 +62,6 @@
0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
};
-
/**
* nand_trans_result - [GENERIC] create non-inverted ECC
* @reg2: line parity reg 2
@@ -71,8 +70,7 @@
*
* Creates non-inverted ECC code from line parity
*/
-static void nand_trans_result(u_char reg2, u_char reg3,
- u_char *ecc_code)
+static void nand_trans_result(u_char reg2, u_char reg3, u_char *ecc_code)
{
u_char a, b, i, tmp1, tmp2;
@@ -82,10 +80,10 @@
/* Calculate first ECC byte */
for (i = 0; i < 4; i++) {
- if (reg3 & a) /* LP15,13,11,9 --> ecc_code[0] */
+ if (reg3 & a) /* LP15,13,11,9 --> ecc_code[0] */
tmp1 |= b;
b >>= 1;
- if (reg2 & a) /* LP14,12,10,8 --> ecc_code[0] */
+ if (reg2 & a) /* LP14,12,10,8 --> ecc_code[0] */
tmp1 |= b;
b >>= 1;
a >>= 1;
@@ -94,10 +92,10 @@
/* Calculate second ECC byte */
b = 0x80;
for (i = 0; i < 4; i++) {
- if (reg3 & a) /* LP7,5,3,1 --> ecc_code[1] */
+ if (reg3 & a) /* LP7,5,3,1 --> ecc_code[1] */
tmp2 |= b;
b >>= 1;
- if (reg2 & a) /* LP6,4,2,0 --> ecc_code[1] */
+ if (reg2 & a) /* LP6,4,2,0 --> ecc_code[1] */
tmp2 |= b;
b >>= 1;
a >>= 1;
@@ -124,7 +122,7 @@
ecc_code[0] = ecc_code[1] = ecc_code[2] = 0;
/* Build up column parity */
- for(j = 0; j < 256; j++) {
+ for (j = 0; j < 256; j++) {
/* Get CP0 - CP5 from table */
idx = nand_ecc_precalc_table[dat[j]];
@@ -168,8 +166,7 @@
if ((d1 | d2 | d3) == 0) {
/* No errors */
return 0;
- }
- else {
+ } else {
a = (d1 ^ (d1 >> 1)) & 0x55;
b = (d2 ^ (d2 >> 1)) & 0x55;
c = (d3 ^ (d3 >> 1)) & 0x54;
@@ -179,14 +176,14 @@
c = 0x80;
add = 0;
a = 0x80;
- for (i=0; i<4; i++) {
+ for (i = 0; i < 4; i++) {
if (d1 & c)
add |= a;
c >>= 2;
a >>= 1;
}
c = 0x80;
- for (i=0; i<4; i++) {
+ for (i = 0; i < 4; i++) {
if (d2 & c)
add |= a;
c >>= 2;
@@ -195,7 +192,7 @@
bit = 0;
b = 0x04;
c = 0x80;
- for (i=0; i<3; i++) {
+ for (i = 0; i < 3; i++) {
if (d3 & c)
bit |= b;
c >>= 2;
@@ -206,8 +203,7 @@
a ^= (b << bit);
dat[add] = a;
return 1;
- }
- else {
+ } else {
i = 0;
while (d1) {
if (d1 & 0x01)
@@ -230,8 +226,7 @@
read_ecc[1] = calc_ecc[1];
read_ecc[2] = calc_ecc[2];
return 2;
- }
- else {
+ } else {
/* Uncorrectable Error */
return -1;
}
diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
index dbc7e55..a9d52fc 100644
--- a/drivers/mtd/nand/nand_ids.c
+++ b/drivers/mtd/nand/nand_ids.c
@@ -125,13 +125,13 @@
{NAND_MFR_NATIONAL, "National"},
{NAND_MFR_RENESAS, "Renesas"},
{NAND_MFR_STMICRO, "ST Micro"},
- {NAND_MFR_HYNIX, "Hynix"},
+ {NAND_MFR_HYNIX, "Hynix"},
{0x0, "Unknown"}
};
-EXPORT_SYMBOL (nand_manuf_ids);
-EXPORT_SYMBOL (nand_flash_ids);
+EXPORT_SYMBOL(nand_manuf_ids);
+EXPORT_SYMBOL(nand_flash_ids);
-MODULE_LICENSE ("GPL");
-MODULE_AUTHOR ("Thomas Gleixner <tglx@linutronix.de>");
-MODULE_DESCRIPTION ("Nand device & manufacturer ID's");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
+MODULE_DESCRIPTION("Nand device & manufacturer IDs");
diff --git a/drivers/mtd/nand/nandsim.c b/drivers/mtd/nand/nandsim.c
index a0af92c..6903f5b9 100644
--- a/drivers/mtd/nand/nandsim.c
+++ b/drivers/mtd/nand/nandsim.c
@@ -1546,6 +1546,8 @@
chip->options |= NAND_BUSWIDTH_16;
}
+ nsmtd->owner = THIS_MODULE;
+
if ((retval = nand_scan(nsmtd, 1)) != 0) {
NS_ERR("can't register NAND Simulator\n");
if (retval > 0)
diff --git a/drivers/mtd/nand/ppchameleonevb.c b/drivers/mtd/nand/ppchameleonevb.c
index 91a95f3..5d4d16f 100644
--- a/drivers/mtd/nand/ppchameleonevb.c
+++ b/drivers/mtd/nand/ppchameleonevb.c
@@ -58,21 +58,21 @@
/*
* MTD structure for PPChameleonEVB board
*/
-static struct mtd_info *ppchameleon_mtd = NULL;
+static struct mtd_info *ppchameleon_mtd = NULL;
static struct mtd_info *ppchameleonevb_mtd = NULL;
/*
* Module stuff
*/
-static unsigned long ppchameleon_fio_pbase = CFG_NAND0_PADDR;
+static unsigned long ppchameleon_fio_pbase = CFG_NAND0_PADDR;
static unsigned long ppchameleonevb_fio_pbase = CFG_NAND1_PADDR;
#ifdef MODULE
module_param(ppchameleon_fio_pbase, ulong, 0);
module_param(ppchameleonevb_fio_pbase, ulong, 0);
#else
-__setup("ppchameleon_fio_pbase=",ppchameleon_fio_pbase);
-__setup("ppchameleonevb_fio_pbase=",ppchameleonevb_fio_pbase);
+__setup("ppchameleon_fio_pbase=", ppchameleon_fio_pbase);
+__setup("ppchameleonevb_fio_pbase=", ppchameleonevb_fio_pbase);
#endif
#ifdef CONFIG_MTD_PARTITIONS
@@ -80,80 +80,80 @@
* Define static partitions for flash devices
*/
static struct mtd_partition partition_info_hi[] = {
- { name: "PPChameleon HI Nand Flash",
- offset: 0,
- size: 128*1024*1024 }
+ { .name = "PPChameleon HI Nand Flash",
+ offset = 0,
+ .size = 128 * 1024 * 1024
+ }
};
static struct mtd_partition partition_info_me[] = {
- { name: "PPChameleon ME Nand Flash",
- offset: 0,
- size: 32*1024*1024 }
+ { .name = "PPChameleon ME Nand Flash",
+ .offset = 0,
+ .size = 32 * 1024 * 1024
+ }
};
static struct mtd_partition partition_info_evb[] = {
- { name: "PPChameleonEVB Nand Flash",
- offset: 0,
- size: 32*1024*1024 }
+ { .name = "PPChameleonEVB Nand Flash",
+ .offset = 0,
+ .size = 32 * 1024 * 1024
+ }
};
#define NUM_PARTITIONS 1
-extern int parse_cmdline_partitions(struct mtd_info *master,
- struct mtd_partition **pparts,
- const char *mtd_id);
+extern int parse_cmdline_partitions(struct mtd_info *master, struct mtd_partition **pparts, const char *mtd_id);
#endif
-
/*
* hardware specific access to control-lines
*/
static void ppchameleon_hwcontrol(struct mtd_info *mtdinfo, int cmd)
{
- switch(cmd) {
+ switch (cmd) {
case NAND_CTL_SETCLE:
- MACRO_NAND_CTL_SETCLE((unsigned long)CFG_NAND0_PADDR);
+ MACRO_NAND_CTL_SETCLE((unsigned long)CFG_NAND0_PADDR);
break;
case NAND_CTL_CLRCLE:
- MACRO_NAND_CTL_CLRCLE((unsigned long)CFG_NAND0_PADDR);
+ MACRO_NAND_CTL_CLRCLE((unsigned long)CFG_NAND0_PADDR);
break;
case NAND_CTL_SETALE:
- MACRO_NAND_CTL_SETALE((unsigned long)CFG_NAND0_PADDR);
+ MACRO_NAND_CTL_SETALE((unsigned long)CFG_NAND0_PADDR);
break;
case NAND_CTL_CLRALE:
- MACRO_NAND_CTL_CLRALE((unsigned long)CFG_NAND0_PADDR);
+ MACRO_NAND_CTL_CLRALE((unsigned long)CFG_NAND0_PADDR);
break;
case NAND_CTL_SETNCE:
- MACRO_NAND_ENABLE_CE((unsigned long)CFG_NAND0_PADDR);
+ MACRO_NAND_ENABLE_CE((unsigned long)CFG_NAND0_PADDR);
break;
case NAND_CTL_CLRNCE:
- MACRO_NAND_DISABLE_CE((unsigned long)CFG_NAND0_PADDR);
+ MACRO_NAND_DISABLE_CE((unsigned long)CFG_NAND0_PADDR);
break;
}
}
static void ppchameleonevb_hwcontrol(struct mtd_info *mtdinfo, int cmd)
{
- switch(cmd) {
+ switch (cmd) {
case NAND_CTL_SETCLE:
- MACRO_NAND_CTL_SETCLE((unsigned long)CFG_NAND1_PADDR);
+ MACRO_NAND_CTL_SETCLE((unsigned long)CFG_NAND1_PADDR);
break;
case NAND_CTL_CLRCLE:
- MACRO_NAND_CTL_CLRCLE((unsigned long)CFG_NAND1_PADDR);
+ MACRO_NAND_CTL_CLRCLE((unsigned long)CFG_NAND1_PADDR);
break;
case NAND_CTL_SETALE:
- MACRO_NAND_CTL_SETALE((unsigned long)CFG_NAND1_PADDR);
+ MACRO_NAND_CTL_SETALE((unsigned long)CFG_NAND1_PADDR);
break;
case NAND_CTL_CLRALE:
- MACRO_NAND_CTL_CLRALE((unsigned long)CFG_NAND1_PADDR);
+ MACRO_NAND_CTL_CLRALE((unsigned long)CFG_NAND1_PADDR);
break;
case NAND_CTL_SETNCE:
- MACRO_NAND_ENABLE_CE((unsigned long)CFG_NAND1_PADDR);
+ MACRO_NAND_ENABLE_CE((unsigned long)CFG_NAND1_PADDR);
break;
case NAND_CTL_CLRNCE:
- MACRO_NAND_DISABLE_CE((unsigned long)CFG_NAND1_PADDR);
+ MACRO_NAND_DISABLE_CE((unsigned long)CFG_NAND1_PADDR);
break;
}
}
@@ -164,15 +164,15 @@
*/
static int ppchameleon_device_ready(struct mtd_info *minfo)
{
- if (in_be32((volatile unsigned*)GPIO0_IR) & NAND_RB_GPIO_PIN)
+ if (in_be32((volatile unsigned *)GPIO0_IR) & NAND_RB_GPIO_PIN)
return 1;
return 0;
}
static int ppchameleonevb_device_ready(struct mtd_info *minfo)
{
- if (in_be32((volatile unsigned*)GPIO0_IR) & NAND_EVB_RB_GPIO_PIN)
- return 1;
+ if (in_be32((volatile unsigned *)GPIO0_IR) & NAND_EVB_RB_GPIO_PIN)
+ return 1;
return 0;
}
#endif
@@ -185,7 +185,7 @@
/*
* Main initialization routine
*/
-static int __init ppchameleonevb_init (void)
+static int __init ppchameleonevb_init(void)
{
struct nand_chip *this;
const char *part_type = 0;
@@ -194,13 +194,11 @@
void __iomem *ppchameleon_fio_base;
void __iomem *ppchameleonevb_fio_base;
-
/*********************************
* Processor module NAND (if any) *
*********************************/
/* Allocate memory for MTD device structure and private data */
- ppchameleon_mtd = kmalloc(sizeof(struct mtd_info) +
- sizeof(struct nand_chip), GFP_KERNEL);
+ ppchameleon_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
if (!ppchameleon_mtd) {
printk("Unable to allocate PPChameleon NAND MTD device structure.\n");
return -ENOMEM;
@@ -208,43 +206,46 @@
/* map physical address */
ppchameleon_fio_base = ioremap(ppchameleon_fio_pbase, SZ_4M);
- if(!ppchameleon_fio_base) {
+ if (!ppchameleon_fio_base) {
printk("ioremap PPChameleon NAND flash failed\n");
kfree(ppchameleon_mtd);
return -EIO;
}
/* Get pointer to private data */
- this = (struct nand_chip *) (&ppchameleon_mtd[1]);
+ this = (struct nand_chip *)(&ppchameleon_mtd[1]);
/* Initialize structures */
- memset((char *) ppchameleon_mtd, 0, sizeof(struct mtd_info));
- memset((char *) this, 0, sizeof(struct nand_chip));
+ memset(ppchameleon_mtd, 0, sizeof(struct mtd_info));
+ memset(this, 0, sizeof(struct nand_chip));
/* Link the private data with the MTD structure */
ppchameleon_mtd->priv = this;
+ ppchameleon_mtd->owner = THIS_MODULE;
- /* Initialize GPIOs */
+ /* Initialize GPIOs */
/* Pin mapping for NAND chip */
/*
- CE GPIO_01
- CLE GPIO_02
- ALE GPIO_03
- R/B GPIO_04
- */
+ CE GPIO_01
+ CLE GPIO_02
+ ALE GPIO_03
+ R/B GPIO_04
+ */
/* output select */
- out_be32((volatile unsigned*)GPIO0_OSRH, in_be32((volatile unsigned*)GPIO0_OSRH) & 0xC0FFFFFF);
+ out_be32((volatile unsigned *)GPIO0_OSRH, in_be32((volatile unsigned *)GPIO0_OSRH) & 0xC0FFFFFF);
/* three-state select */
- out_be32((volatile unsigned*)GPIO0_TSRH, in_be32((volatile unsigned*)GPIO0_TSRH) & 0xC0FFFFFF);
+ out_be32((volatile unsigned *)GPIO0_TSRH, in_be32((volatile unsigned *)GPIO0_TSRH) & 0xC0FFFFFF);
/* enable output driver */
- out_be32((volatile unsigned*)GPIO0_TCR, in_be32((volatile unsigned*)GPIO0_TCR) | NAND_nCE_GPIO_PIN | NAND_CLE_GPIO_PIN | NAND_ALE_GPIO_PIN);
+ out_be32((volatile unsigned *)GPIO0_TCR,
+ in_be32((volatile unsigned *)GPIO0_TCR) | NAND_nCE_GPIO_PIN | NAND_CLE_GPIO_PIN | NAND_ALE_GPIO_PIN);
#ifdef USE_READY_BUSY_PIN
/* three-state select */
- out_be32((volatile unsigned*)GPIO0_TSRH, in_be32((volatile unsigned*)GPIO0_TSRH) & 0xFF3FFFFF);
+ out_be32((volatile unsigned *)GPIO0_TSRH, in_be32((volatile unsigned *)GPIO0_TSRH) & 0xFF3FFFFF);
/* high-impedecence */
- out_be32((volatile unsigned*)GPIO0_TCR, in_be32((volatile unsigned*)GPIO0_TCR) & (~NAND_RB_GPIO_PIN));
+ out_be32((volatile unsigned *)GPIO0_TCR, in_be32((volatile unsigned *)GPIO0_TCR) & (~NAND_RB_GPIO_PIN));
/* input select */
- out_be32((volatile unsigned*)GPIO0_ISR1H, (in_be32((volatile unsigned*)GPIO0_ISR1H) & 0xFF3FFFFF) | 0x00400000);
+ out_be32((volatile unsigned *)GPIO0_ISR1H,
+ (in_be32((volatile unsigned *)GPIO0_ISR1H) & 0xFF3FFFFF) | 0x00400000);
#endif
/* insert callbacks */
@@ -259,12 +260,11 @@
this->eccmode = NAND_ECC_SOFT;
/* Scan to find existence of the device (it could not be mounted) */
- if (nand_scan (ppchameleon_mtd, 1)) {
+ if (nand_scan(ppchameleon_mtd, 1)) {
iounmap((void *)ppchameleon_fio_base);
- kfree (ppchameleon_mtd);
+ kfree(ppchameleon_mtd);
goto nand_evb_init;
}
-
#ifndef USE_READY_BUSY_PIN
/* Adjust delay if necessary */
if (ppchameleon_mtd->size == NAND_SMALL_SIZE)
@@ -275,12 +275,11 @@
ppchameleon_mtd->name = "ppchameleon-nand";
mtd_parts_nb = parse_mtd_partitions(ppchameleon_mtd, part_probes, &mtd_parts, 0);
if (mtd_parts_nb > 0)
- part_type = "command line";
+ part_type = "command line";
else
- mtd_parts_nb = 0;
+ mtd_parts_nb = 0;
#endif
- if (mtd_parts_nb == 0)
- {
+ if (mtd_parts_nb == 0) {
if (ppchameleon_mtd->size == NAND_SMALL_SIZE)
mtd_parts = partition_info_me;
else
@@ -293,13 +292,12 @@
printk(KERN_NOTICE "Using %s partition definition\n", part_type);
add_mtd_partitions(ppchameleon_mtd, mtd_parts, mtd_parts_nb);
-nand_evb_init:
+ nand_evb_init:
/****************************
* EVB NAND (always present) *
****************************/
/* Allocate memory for MTD device structure and private data */
- ppchameleonevb_mtd = kmalloc(sizeof(struct mtd_info) +
- sizeof(struct nand_chip), GFP_KERNEL);
+ ppchameleonevb_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
if (!ppchameleonevb_mtd) {
printk("Unable to allocate PPChameleonEVB NAND MTD device structure.\n");
return -ENOMEM;
@@ -307,46 +305,47 @@
/* map physical address */
ppchameleonevb_fio_base = ioremap(ppchameleonevb_fio_pbase, SZ_4M);
- if(!ppchameleonevb_fio_base) {
+ if (!ppchameleonevb_fio_base) {
printk("ioremap PPChameleonEVB NAND flash failed\n");
kfree(ppchameleonevb_mtd);
return -EIO;
}
/* Get pointer to private data */
- this = (struct nand_chip *) (&ppchameleonevb_mtd[1]);
+ this = (struct nand_chip *)(&ppchameleonevb_mtd[1]);
/* Initialize structures */
- memset((char *) ppchameleonevb_mtd, 0, sizeof(struct mtd_info));
- memset((char *) this, 0, sizeof(struct nand_chip));
+ memset(ppchameleonevb_mtd, 0, sizeof(struct mtd_info));
+ memset(this, 0, sizeof(struct nand_chip));
/* Link the private data with the MTD structure */
ppchameleonevb_mtd->priv = this;
- /* Initialize GPIOs */
+ /* Initialize GPIOs */
/* Pin mapping for NAND chip */
/*
- CE GPIO_14
- CLE GPIO_15
- ALE GPIO_16
- R/B GPIO_31
- */
+ CE GPIO_14
+ CLE GPIO_15
+ ALE GPIO_16
+ R/B GPIO_31
+ */
/* output select */
- out_be32((volatile unsigned*)GPIO0_OSRH, in_be32((volatile unsigned*)GPIO0_OSRH) & 0xFFFFFFF0);
- out_be32((volatile unsigned*)GPIO0_OSRL, in_be32((volatile unsigned*)GPIO0_OSRL) & 0x3FFFFFFF);
+ out_be32((volatile unsigned *)GPIO0_OSRH, in_be32((volatile unsigned *)GPIO0_OSRH) & 0xFFFFFFF0);
+ out_be32((volatile unsigned *)GPIO0_OSRL, in_be32((volatile unsigned *)GPIO0_OSRL) & 0x3FFFFFFF);
/* three-state select */
- out_be32((volatile unsigned*)GPIO0_TSRH, in_be32((volatile unsigned*)GPIO0_TSRH) & 0xFFFFFFF0);
- out_be32((volatile unsigned*)GPIO0_TSRL, in_be32((volatile unsigned*)GPIO0_TSRL) & 0x3FFFFFFF);
+ out_be32((volatile unsigned *)GPIO0_TSRH, in_be32((volatile unsigned *)GPIO0_TSRH) & 0xFFFFFFF0);
+ out_be32((volatile unsigned *)GPIO0_TSRL, in_be32((volatile unsigned *)GPIO0_TSRL) & 0x3FFFFFFF);
/* enable output driver */
- out_be32((volatile unsigned*)GPIO0_TCR, in_be32((volatile unsigned*)GPIO0_TCR) | NAND_EVB_nCE_GPIO_PIN |
+ out_be32((volatile unsigned *)GPIO0_TCR, in_be32((volatile unsigned *)GPIO0_TCR) | NAND_EVB_nCE_GPIO_PIN |
NAND_EVB_CLE_GPIO_PIN | NAND_EVB_ALE_GPIO_PIN);
#ifdef USE_READY_BUSY_PIN
/* three-state select */
- out_be32((volatile unsigned*)GPIO0_TSRL, in_be32((volatile unsigned*)GPIO0_TSRL) & 0xFFFFFFFC);
+ out_be32((volatile unsigned *)GPIO0_TSRL, in_be32((volatile unsigned *)GPIO0_TSRL) & 0xFFFFFFFC);
/* high-impedecence */
- out_be32((volatile unsigned*)GPIO0_TCR, in_be32((volatile unsigned*)GPIO0_TCR) & (~NAND_EVB_RB_GPIO_PIN));
+ out_be32((volatile unsigned *)GPIO0_TCR, in_be32((volatile unsigned *)GPIO0_TCR) & (~NAND_EVB_RB_GPIO_PIN));
/* input select */
- out_be32((volatile unsigned*)GPIO0_ISR1L, (in_be32((volatile unsigned*)GPIO0_ISR1L) & 0xFFFFFFFC) | 0x00000001);
+ out_be32((volatile unsigned *)GPIO0_ISR1L,
+ (in_be32((volatile unsigned *)GPIO0_ISR1L) & 0xFFFFFFFC) | 0x00000001);
#endif
/* insert callbacks */
@@ -362,22 +361,20 @@
this->eccmode = NAND_ECC_SOFT;
/* Scan to find existence of the device */
- if (nand_scan (ppchameleonevb_mtd, 1)) {
+ if (nand_scan(ppchameleonevb_mtd, 1)) {
iounmap((void *)ppchameleonevb_fio_base);
- kfree (ppchameleonevb_mtd);
+ kfree(ppchameleonevb_mtd);
return -ENXIO;
}
-
#ifdef CONFIG_MTD_PARTITIONS
ppchameleonevb_mtd->name = NAND_EVB_MTD_NAME;
mtd_parts_nb = parse_mtd_partitions(ppchameleonevb_mtd, part_probes_evb, &mtd_parts, 0);
if (mtd_parts_nb > 0)
- part_type = "command line";
+ part_type = "command line";
else
- mtd_parts_nb = 0;
+ mtd_parts_nb = 0;
#endif
- if (mtd_parts_nb == 0)
- {
+ if (mtd_parts_nb == 0) {
mtd_parts = partition_info_evb;
mtd_parts_nb = NUM_PARTITIONS;
part_type = "static";
@@ -390,18 +387,19 @@
/* Return happy */
return 0;
}
+
module_init(ppchameleonevb_init);
/*
* Clean up routine
*/
-static void __exit ppchameleonevb_cleanup (void)
+static void __exit ppchameleonevb_cleanup(void)
{
struct nand_chip *this;
/* Release resources, unregister device(s) */
- nand_release (ppchameleon_mtd);
- nand_release (ppchameleonevb_mtd);
+ nand_release(ppchameleon_mtd);
+ nand_release(ppchameleonevb_mtd);
/* Release iomaps */
this = (struct nand_chip *) &ppchameleon_mtd[1];
diff --git a/drivers/mtd/nand/rtc_from4.c b/drivers/mtd/nand/rtc_from4.c
index 4129c03..0c56a66 100644
--- a/drivers/mtd/nand/rtc_from4.c
+++ b/drivers/mtd/nand/rtc_from4.c
@@ -97,12 +97,12 @@
static void __iomem *rtc_from4_fio_base = (void *)P2SEGADDR(RTC_FROM4_FIO_BASE);
static const struct mtd_partition partition_info[] = {
- {
- .name = "Renesas flash partition 1",
- .offset = 0,
- .size = MTDPART_SIZ_FULL
- },
+ {
+ .name = "Renesas flash partition 1",
+ .offset = 0,
+ .size = MTDPART_SIZ_FULL},
};
+
#define NUM_PARTITIONS 1
/*
@@ -111,8 +111,8 @@
* NAND_BBT_CREATE and/or NAND_BBT_WRITE
*
*/
-static uint8_t bbt_pattern[] = {'B', 'b', 't', '0' };
-static uint8_t mirror_pattern[] = {'1', 't', 'b', 'B' };
+static uint8_t bbt_pattern[] = { 'B', 'b', 't', '0' };
+static uint8_t mirror_pattern[] = { '1', 't', 'b', 'B' };
static struct nand_bbt_descr rtc_from4_bbt_main_descr = {
.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
@@ -134,8 +134,6 @@
.pattern = mirror_pattern
};
-
-
#ifdef RTC_FROM4_HWECC
/* the Reed Solomon control structure */
@@ -148,11 +146,11 @@
.useecc = MTD_NANDECC_AUTOPLACE,
.eccbytes = 32,
.eccpos = {
- 0, 1, 2, 3, 4, 5, 6, 7,
- 8, 9, 10, 11, 12, 13, 14, 15,
- 16, 17, 18, 19, 20, 21, 22, 23,
- 24, 25, 26, 27, 28, 29, 30, 31},
- .oobfree = { {32, 32} }
+ 0, 1, 2, 3, 4, 5, 6, 7,
+ 8, 9, 10, 11, 12, 13, 14, 15,
+ 16, 17, 18, 19, 20, 21, 22, 23,
+ 24, 25, 26, 27, 28, 29, 30, 31},
+ .oobfree = {{32, 32}}
};
/* Aargh. I missed the reversed bit order, when I
@@ -162,44 +160,42 @@
* of the ecc byte which we get from the FPGA
*/
static uint8_t revbits[256] = {
- 0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0,
- 0x10, 0x90, 0x50, 0xd0, 0x30, 0xb0, 0x70, 0xf0,
- 0x08, 0x88, 0x48, 0xc8, 0x28, 0xa8, 0x68, 0xe8,
- 0x18, 0x98, 0x58, 0xd8, 0x38, 0xb8, 0x78, 0xf8,
- 0x04, 0x84, 0x44, 0xc4, 0x24, 0xa4, 0x64, 0xe4,
- 0x14, 0x94, 0x54, 0xd4, 0x34, 0xb4, 0x74, 0xf4,
- 0x0c, 0x8c, 0x4c, 0xcc, 0x2c, 0xac, 0x6c, 0xec,
- 0x1c, 0x9c, 0x5c, 0xdc, 0x3c, 0xbc, 0x7c, 0xfc,
- 0x02, 0x82, 0x42, 0xc2, 0x22, 0xa2, 0x62, 0xe2,
- 0x12, 0x92, 0x52, 0xd2, 0x32, 0xb2, 0x72, 0xf2,
- 0x0a, 0x8a, 0x4a, 0xca, 0x2a, 0xaa, 0x6a, 0xea,
- 0x1a, 0x9a, 0x5a, 0xda, 0x3a, 0xba, 0x7a, 0xfa,
- 0x06, 0x86, 0x46, 0xc6, 0x26, 0xa6, 0x66, 0xe6,
- 0x16, 0x96, 0x56, 0xd6, 0x36, 0xb6, 0x76, 0xf6,
- 0x0e, 0x8e, 0x4e, 0xce, 0x2e, 0xae, 0x6e, 0xee,
- 0x1e, 0x9e, 0x5e, 0xde, 0x3e, 0xbe, 0x7e, 0xfe,
- 0x01, 0x81, 0x41, 0xc1, 0x21, 0xa1, 0x61, 0xe1,
- 0x11, 0x91, 0x51, 0xd1, 0x31, 0xb1, 0x71, 0xf1,
- 0x09, 0x89, 0x49, 0xc9, 0x29, 0xa9, 0x69, 0xe9,
- 0x19, 0x99, 0x59, 0xd9, 0x39, 0xb9, 0x79, 0xf9,
- 0x05, 0x85, 0x45, 0xc5, 0x25, 0xa5, 0x65, 0xe5,
- 0x15, 0x95, 0x55, 0xd5, 0x35, 0xb5, 0x75, 0xf5,
- 0x0d, 0x8d, 0x4d, 0xcd, 0x2d, 0xad, 0x6d, 0xed,
- 0x1d, 0x9d, 0x5d, 0xdd, 0x3d, 0xbd, 0x7d, 0xfd,
- 0x03, 0x83, 0x43, 0xc3, 0x23, 0xa3, 0x63, 0xe3,
- 0x13, 0x93, 0x53, 0xd3, 0x33, 0xb3, 0x73, 0xf3,
- 0x0b, 0x8b, 0x4b, 0xcb, 0x2b, 0xab, 0x6b, 0xeb,
- 0x1b, 0x9b, 0x5b, 0xdb, 0x3b, 0xbb, 0x7b, 0xfb,
- 0x07, 0x87, 0x47, 0xc7, 0x27, 0xa7, 0x67, 0xe7,
- 0x17, 0x97, 0x57, 0xd7, 0x37, 0xb7, 0x77, 0xf7,
- 0x0f, 0x8f, 0x4f, 0xcf, 0x2f, 0xaf, 0x6f, 0xef,
- 0x1f, 0x9f, 0x5f, 0xdf, 0x3f, 0xbf, 0x7f, 0xff,
+ 0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0,
+ 0x10, 0x90, 0x50, 0xd0, 0x30, 0xb0, 0x70, 0xf0,
+ 0x08, 0x88, 0x48, 0xc8, 0x28, 0xa8, 0x68, 0xe8,
+ 0x18, 0x98, 0x58, 0xd8, 0x38, 0xb8, 0x78, 0xf8,
+ 0x04, 0x84, 0x44, 0xc4, 0x24, 0xa4, 0x64, 0xe4,
+ 0x14, 0x94, 0x54, 0xd4, 0x34, 0xb4, 0x74, 0xf4,
+ 0x0c, 0x8c, 0x4c, 0xcc, 0x2c, 0xac, 0x6c, 0xec,
+ 0x1c, 0x9c, 0x5c, 0xdc, 0x3c, 0xbc, 0x7c, 0xfc,
+ 0x02, 0x82, 0x42, 0xc2, 0x22, 0xa2, 0x62, 0xe2,
+ 0x12, 0x92, 0x52, 0xd2, 0x32, 0xb2, 0x72, 0xf2,
+ 0x0a, 0x8a, 0x4a, 0xca, 0x2a, 0xaa, 0x6a, 0xea,
+ 0x1a, 0x9a, 0x5a, 0xda, 0x3a, 0xba, 0x7a, 0xfa,
+ 0x06, 0x86, 0x46, 0xc6, 0x26, 0xa6, 0x66, 0xe6,
+ 0x16, 0x96, 0x56, 0xd6, 0x36, 0xb6, 0x76, 0xf6,
+ 0x0e, 0x8e, 0x4e, 0xce, 0x2e, 0xae, 0x6e, 0xee,
+ 0x1e, 0x9e, 0x5e, 0xde, 0x3e, 0xbe, 0x7e, 0xfe,
+ 0x01, 0x81, 0x41, 0xc1, 0x21, 0xa1, 0x61, 0xe1,
+ 0x11, 0x91, 0x51, 0xd1, 0x31, 0xb1, 0x71, 0xf1,
+ 0x09, 0x89, 0x49, 0xc9, 0x29, 0xa9, 0x69, 0xe9,
+ 0x19, 0x99, 0x59, 0xd9, 0x39, 0xb9, 0x79, 0xf9,
+ 0x05, 0x85, 0x45, 0xc5, 0x25, 0xa5, 0x65, 0xe5,
+ 0x15, 0x95, 0x55, 0xd5, 0x35, 0xb5, 0x75, 0xf5,
+ 0x0d, 0x8d, 0x4d, 0xcd, 0x2d, 0xad, 0x6d, 0xed,
+ 0x1d, 0x9d, 0x5d, 0xdd, 0x3d, 0xbd, 0x7d, 0xfd,
+ 0x03, 0x83, 0x43, 0xc3, 0x23, 0xa3, 0x63, 0xe3,
+ 0x13, 0x93, 0x53, 0xd3, 0x33, 0xb3, 0x73, 0xf3,
+ 0x0b, 0x8b, 0x4b, 0xcb, 0x2b, 0xab, 0x6b, 0xeb,
+ 0x1b, 0x9b, 0x5b, 0xdb, 0x3b, 0xbb, 0x7b, 0xfb,
+ 0x07, 0x87, 0x47, 0xc7, 0x27, 0xa7, 0x67, 0xe7,
+ 0x17, 0x97, 0x57, 0xd7, 0x37, 0xb7, 0x77, 0xf7,
+ 0x0f, 0x8f, 0x4f, 0xcf, 0x2f, 0xaf, 0x6f, 0xef,
+ 0x1f, 0x9f, 0x5f, 0xdf, 0x3f, 0xbf, 0x7f, 0xff,
};
#endif
-
-
/*
* rtc_from4_hwcontrol - hardware specific access to control-lines
* @mtd: MTD device structure
@@ -214,9 +210,9 @@
*/
static void rtc_from4_hwcontrol(struct mtd_info *mtd, int cmd)
{
- struct nand_chip* this = (struct nand_chip *) (mtd->priv);
+ struct nand_chip *this = (struct nand_chip *)(mtd->priv);
- switch(cmd) {
+ switch (cmd) {
case NAND_CTL_SETCLE:
this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_CLE);
@@ -240,7 +236,6 @@
}
}
-
/*
* rtc_from4_nand_select_chip - hardware specific chip select
* @mtd: MTD device structure
@@ -252,26 +247,25 @@
*/
static void rtc_from4_nand_select_chip(struct mtd_info *mtd, int chip)
{
- struct nand_chip *this = mtd->priv;
+ struct nand_chip *this = mtd->priv;
this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R & ~RTC_FROM4_NAND_ADDR_MASK);
this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W & ~RTC_FROM4_NAND_ADDR_MASK);
- switch(chip) {
+ switch (chip) {
- case 0: /* select slot 3 chip */
+ case 0: /* select slot 3 chip */
this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R | RTC_FROM4_NAND_ADDR_SLOT3);
this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_NAND_ADDR_SLOT3);
- break;
- case 1: /* select slot 4 chip */
+ break;
+ case 1: /* select slot 4 chip */
this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R | RTC_FROM4_NAND_ADDR_SLOT4);
this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_NAND_ADDR_SLOT4);
- break;
+ break;
- }
+ }
}
-
/*
* rtc_from4_nand_device_ready - hardware specific ready/busy check
* @mtd: MTD device structure
@@ -290,7 +284,6 @@
}
-
/*
* deplete - code to perform device recovery in case there was a power loss
* @mtd: MTD device structure
@@ -306,24 +299,23 @@
*/
static void deplete(struct mtd_info *mtd, int chip)
{
- struct nand_chip *this = mtd->priv;
+ struct nand_chip *this = mtd->priv;
- /* wait until device is ready */
- while (!this->dev_ready(mtd));
+ /* wait until device is ready */
+ while (!this->dev_ready(mtd)) ;
this->select_chip(mtd, chip);
/* Send the commands for device recovery, phase 1 */
- this->cmdfunc (mtd, NAND_CMD_DEPLETE1, 0x0000, 0x0000);
- this->cmdfunc (mtd, NAND_CMD_DEPLETE2, -1, -1);
+ this->cmdfunc(mtd, NAND_CMD_DEPLETE1, 0x0000, 0x0000);
+ this->cmdfunc(mtd, NAND_CMD_DEPLETE2, -1, -1);
/* Send the commands for device recovery, phase 2 */
- this->cmdfunc (mtd, NAND_CMD_DEPLETE1, 0x0000, 0x0004);
- this->cmdfunc (mtd, NAND_CMD_DEPLETE2, -1, -1);
+ this->cmdfunc(mtd, NAND_CMD_DEPLETE1, 0x0000, 0x0004);
+ this->cmdfunc(mtd, NAND_CMD_DEPLETE2, -1, -1);
}
-
#ifdef RTC_FROM4_HWECC
/*
* rtc_from4_enable_hwecc - hardware specific hardware ECC enable function
@@ -335,39 +327,35 @@
*/
static void rtc_from4_enable_hwecc(struct mtd_info *mtd, int mode)
{
- volatile unsigned short * rs_ecc_ctl = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC_CTL);
+ volatile unsigned short *rs_ecc_ctl = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC_CTL);
unsigned short status;
switch (mode) {
- case NAND_ECC_READ :
- status = RTC_FROM4_RS_ECC_CTL_CLR
- | RTC_FROM4_RS_ECC_CTL_FD_E;
+ case NAND_ECC_READ:
+ status = RTC_FROM4_RS_ECC_CTL_CLR | RTC_FROM4_RS_ECC_CTL_FD_E;
*rs_ecc_ctl = status;
break;
- case NAND_ECC_READSYN :
- status = 0x00;
+ case NAND_ECC_READSYN:
+ status = 0x00;
*rs_ecc_ctl = status;
break;
- case NAND_ECC_WRITE :
- status = RTC_FROM4_RS_ECC_CTL_CLR
- | RTC_FROM4_RS_ECC_CTL_GEN
- | RTC_FROM4_RS_ECC_CTL_FD_E;
+ case NAND_ECC_WRITE:
+ status = RTC_FROM4_RS_ECC_CTL_CLR | RTC_FROM4_RS_ECC_CTL_GEN | RTC_FROM4_RS_ECC_CTL_FD_E;
*rs_ecc_ctl = status;
break;
- default:
+ default:
BUG();
break;
}
}
-
/*
* rtc_from4_calculate_ecc - hardware specific code to read ECC code
* @mtd: MTD device structure
@@ -383,7 +371,7 @@
*/
static void rtc_from4_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
{
- volatile unsigned short * rs_eccn = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECCN);
+ volatile unsigned short *rs_eccn = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECCN);
unsigned short value;
int i;
@@ -395,7 +383,6 @@
ecc_code[7] |= 0x0f; /* set the last four bits (not used) */
}
-
/*
* rtc_from4_correct_data - hardware specific code to correct data using ECC code
* @mtd: MTD device structure
@@ -414,7 +401,7 @@
unsigned short status;
uint16_t par[6], syn[6];
uint8_t ecc[8];
- volatile unsigned short *rs_ecc;
+ volatile unsigned short *rs_ecc;
status = *((volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC_CHK));
@@ -424,23 +411,18 @@
/* Read the syndrom pattern from the FPGA and correct the bitorder */
rs_ecc = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC);
- for (i = 0; i < 8; i++) {
- ecc[i] = revbits[(*rs_ecc) & 0xFF];
- rs_ecc++;
- }
+ for (i = 0; i < 8; i++) {
+ ecc[i] = revbits[(*rs_ecc) & 0xFF];
+ rs_ecc++;
+ }
/* convert into 6 10bit syndrome fields */
- par[5] = rs_decoder->index_of[(((uint16_t)ecc[0] >> 0) & 0x0ff) |
- (((uint16_t)ecc[1] << 8) & 0x300)];
- par[4] = rs_decoder->index_of[(((uint16_t)ecc[1] >> 2) & 0x03f) |
- (((uint16_t)ecc[2] << 6) & 0x3c0)];
- par[3] = rs_decoder->index_of[(((uint16_t)ecc[2] >> 4) & 0x00f) |
- (((uint16_t)ecc[3] << 4) & 0x3f0)];
- par[2] = rs_decoder->index_of[(((uint16_t)ecc[3] >> 6) & 0x003) |
- (((uint16_t)ecc[4] << 2) & 0x3fc)];
- par[1] = rs_decoder->index_of[(((uint16_t)ecc[5] >> 0) & 0x0ff) |
- (((uint16_t)ecc[6] << 8) & 0x300)];
- par[0] = (((uint16_t)ecc[6] >> 2) & 0x03f) | (((uint16_t)ecc[7] << 6) & 0x3c0);
+ par[5] = rs_decoder->index_of[(((uint16_t) ecc[0] >> 0) & 0x0ff) | (((uint16_t) ecc[1] << 8) & 0x300)];
+ par[4] = rs_decoder->index_of[(((uint16_t) ecc[1] >> 2) & 0x03f) | (((uint16_t) ecc[2] << 6) & 0x3c0)];
+ par[3] = rs_decoder->index_of[(((uint16_t) ecc[2] >> 4) & 0x00f) | (((uint16_t) ecc[3] << 4) & 0x3f0)];
+ par[2] = rs_decoder->index_of[(((uint16_t) ecc[3] >> 6) & 0x003) | (((uint16_t) ecc[4] << 2) & 0x3fc)];
+ par[1] = rs_decoder->index_of[(((uint16_t) ecc[5] >> 0) & 0x0ff) | (((uint16_t) ecc[6] << 8) & 0x300)];
+ par[0] = (((uint16_t) ecc[6] >> 2) & 0x03f) | (((uint16_t) ecc[7] << 6) & 0x3c0);
/* Convert to computable syndrome */
for (i = 0; i < 6; i++) {
@@ -453,16 +435,14 @@
syn[i] = rs_decoder->index_of[syn[i]];
}
- /* Let the library code do its magic.*/
- res = decode_rs8(rs_decoder, (uint8_t *)buf, par, 512, syn, 0, NULL, 0xff, NULL);
+ /* Let the library code do its magic. */
+ res = decode_rs8(rs_decoder, (uint8_t *) buf, par, 512, syn, 0, NULL, 0xff, NULL);
if (res > 0) {
- DEBUG (MTD_DEBUG_LEVEL0, "rtc_from4_correct_data: "
- "ECC corrected %d errors on read\n", res);
+ DEBUG(MTD_DEBUG_LEVEL0, "rtc_from4_correct_data: " "ECC corrected %d errors on read\n", res);
}
return res;
}
-
/**
* rtc_from4_errstat - perform additional error status checks
* @mtd: MTD device structure
@@ -480,44 +460,44 @@
*/
static int rtc_from4_errstat(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page)
{
- int er_stat=0;
- int rtn, retlen;
- size_t len;
+ int er_stat = 0;
+ int rtn, retlen;
+ size_t len;
uint8_t *buf;
- int i;
+ int i;
- this->cmdfunc (mtd, NAND_CMD_STATUS_CLEAR, -1, -1);
+ this->cmdfunc(mtd, NAND_CMD_STATUS_CLEAR, -1, -1);
- if (state == FL_ERASING) {
- for (i=0; i<4; i++) {
- if (status & 1<<(i+1)) {
- this->cmdfunc (mtd, (NAND_CMD_STATUS_ERROR + i + 1), -1, -1);
+ if (state == FL_ERASING) {
+ for (i = 0; i < 4; i++) {
+ if (status & 1 << (i + 1)) {
+ this->cmdfunc(mtd, (NAND_CMD_STATUS_ERROR + i + 1), -1, -1);
rtn = this->read_byte(mtd);
- this->cmdfunc (mtd, NAND_CMD_STATUS_RESET, -1, -1);
+ this->cmdfunc(mtd, NAND_CMD_STATUS_RESET, -1, -1);
if (!(rtn & ERR_STAT_ECC_AVAILABLE)) {
- er_stat |= 1<<(i+1); /* err_ecc_not_avail */
+ er_stat |= 1 << (i + 1); /* err_ecc_not_avail */
}
}
}
} else if (state == FL_WRITING) {
/* single bank write logic */
- this->cmdfunc (mtd, NAND_CMD_STATUS_ERROR, -1, -1);
+ this->cmdfunc(mtd, NAND_CMD_STATUS_ERROR, -1, -1);
rtn = this->read_byte(mtd);
- this->cmdfunc (mtd, NAND_CMD_STATUS_RESET, -1, -1);
+ this->cmdfunc(mtd, NAND_CMD_STATUS_RESET, -1, -1);
if (!(rtn & ERR_STAT_ECC_AVAILABLE)) {
- er_stat |= 1<<1; /* err_ecc_not_avail */
+ er_stat |= 1 << 1; /* err_ecc_not_avail */
} else {
len = mtd->oobblock;
- buf = kmalloc (len, GFP_KERNEL);
+ buf = kmalloc(len, GFP_KERNEL);
if (!buf) {
- printk (KERN_ERR "rtc_from4_errstat: Out of memory!\n");
- er_stat = 1; /* if we can't check, assume failed */
+ printk(KERN_ERR "rtc_from4_errstat: Out of memory!\n");
+ er_stat = 1; /* if we can't check, assume failed */
} else {
/* recovery read */
/* page read */
- rtn = nand_do_read_ecc (mtd, page, len, &retlen, buf, NULL, this->autooob, 1);
+ rtn = nand_do_read_ecc(mtd, page, len, &retlen, buf, NULL, this->autooob, 1);
if (rtn) { /* if read failed or > 1-bit error corrected */
- er_stat |= 1<<1; /* ECC read failed */
+ er_stat |= 1 << 1; /* ECC read failed */
}
kfree(buf);
}
@@ -525,7 +505,7 @@
}
rtn = status;
- if (er_stat == 0) { /* if ECC is available */
+ if (er_stat == 0) { /* if ECC is available */
rtn = (status & ~NAND_STATUS_FAIL); /* clear the error bit */
}
@@ -533,33 +513,32 @@
}
#endif
-
/*
* Main initialization routine
*/
-int __init rtc_from4_init (void)
+int __init rtc_from4_init(void)
{
struct nand_chip *this;
unsigned short bcr1, bcr2, wcr2;
int i;
/* Allocate memory for MTD device structure and private data */
- rtc_from4_mtd = kmalloc(sizeof(struct mtd_info) + sizeof (struct nand_chip),
- GFP_KERNEL);
+ rtc_from4_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
if (!rtc_from4_mtd) {
- printk ("Unable to allocate Renesas NAND MTD device structure.\n");
+ printk("Unable to allocate Renesas NAND MTD device structure.\n");
return -ENOMEM;
}
/* Get pointer to private data */
- this = (struct nand_chip *) (&rtc_from4_mtd[1]);
+ this = (struct nand_chip *)(&rtc_from4_mtd[1]);
/* Initialize structures */
- memset((char *) rtc_from4_mtd, 0, sizeof(struct mtd_info));
- memset((char *) this, 0, sizeof(struct nand_chip));
+ memset(rtc_from4_mtd, 0, sizeof(struct mtd_info));
+ memset(this, 0, sizeof(struct nand_chip));
/* Link the private data with the MTD structure */
rtc_from4_mtd->priv = this;
+ rtc_from4_mtd->owner = THIS_MODULE;
/* set area 5 as PCMCIA mode to clear the spec of tDH(Data hold time;9ns min) */
bcr1 = *SH77X9_BCR1 & ~0x0002;
@@ -582,7 +561,7 @@
/* Set address of hardware control function */
this->hwcontrol = rtc_from4_hwcontrol;
/* Set address of chip select function */
- this->select_chip = rtc_from4_nand_select_chip;
+ this->select_chip = rtc_from4_nand_select_chip;
/* command delay time (in us) */
this->chip_delay = 100;
/* return the status of the Ready/Busy line */
@@ -591,7 +570,7 @@
#ifdef RTC_FROM4_HWECC
printk(KERN_INFO "rtc_from4_init: using hardware ECC detection.\n");
- this->eccmode = NAND_ECC_HW8_512;
+ this->eccmode = NAND_ECC_HW8_512;
this->options |= NAND_HWECC_SYNDROME;
/* return the status of extra status and ECC checks */
this->errstat = rtc_from4_errstat;
@@ -617,7 +596,7 @@
}
/* Perform 'device recovery' for each chip in case there was a power loss. */
- for (i=0; i < this->numchips; i++) {
+ for (i = 0; i < this->numchips; i++) {
deplete(rtc_from4_mtd, i);
}
@@ -643,7 +622,7 @@
*/
rs_decoder = init_rs(10, 0x409, 0, 1, 6);
if (!rs_decoder) {
- printk (KERN_ERR "Could not create a RS decoder\n");
+ printk(KERN_ERR "Could not create a RS decoder\n");
nand_release(rtc_from4_mtd);
kfree(rtc_from4_mtd);
return -ENOMEM;
@@ -652,20 +631,20 @@
/* Return happy */
return 0;
}
-module_init(rtc_from4_init);
+module_init(rtc_from4_init);
/*
* Clean up routine
*/
#ifdef MODULE
-static void __exit rtc_from4_cleanup (void)
+static void __exit rtc_from4_cleanup(void)
{
/* Release resource, unregister partitions */
nand_release(rtc_from4_mtd);
/* Free the MTD device structure */
- kfree (rtc_from4_mtd);
+ kfree(rtc_from4_mtd);
#ifdef RTC_FROM4_HWECC
/* Free the reed solomon resources */
@@ -674,10 +653,10 @@
}
#endif
}
+
module_exit(rtc_from4_cleanup);
#endif
MODULE_LICENSE("GPL");
MODULE_AUTHOR("d.marlin <dmarlin@redhat.com");
MODULE_DESCRIPTION("Board-specific glue layer for AG-AND flash on Renesas FROM_BOARD4");
-
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 5b55599..f800259 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -77,10 +77,10 @@
*/
static struct nand_oobinfo nand_hw_eccoob = {
- .useecc = MTD_NANDECC_AUTOPLACE,
- .eccbytes = 3,
- .eccpos = {0, 1, 2 },
- .oobfree = { {8, 8} }
+ .useecc = MTD_NANDECC_AUTOPLACE,
+ .eccbytes = 3,
+ .eccpos = {0, 1, 2},
+ .oobfree = {{8, 8}}
};
/* controller and mtd information */
@@ -149,8 +149,7 @@
pr_debug("result %d from %ld, %d\n", result, clk, wanted);
if (result > max) {
- printk("%d ns is too big for current clock rate %ld\n",
- wanted, clk);
+ printk("%d ns is too big for current clock rate %ld\n", wanted, clk);
return -1;
}
@@ -164,8 +163,7 @@
/* controller setup */
-static int s3c2410_nand_inithw(struct s3c2410_nand_info *info,
- struct platform_device *pdev)
+static int s3c2410_nand_inithw(struct s3c2410_nand_info *info, struct platform_device *pdev)
{
struct s3c2410_platform_nand *plat = to_nand_plat(pdev);
unsigned long clkrate = clk_get_rate(info->clk);
@@ -177,7 +175,7 @@
clkrate /= 1000; /* turn clock into kHz for ease of use */
if (plat != NULL) {
- tacls = s3c2410_nand_calc_rate(plat->tacls, clkrate, 4);
+ tacls = s3c2410_nand_calc_rate(plat->tacls, clkrate, 4);
twrph0 = s3c2410_nand_calc_rate(plat->twrph0, clkrate, 8);
twrph1 = s3c2410_nand_calc_rate(plat->twrph1, clkrate, 8);
} else {
@@ -193,19 +191,17 @@
}
printk(KERN_INFO PFX "Tacls=%d, %dns Twrph0=%d %dns, Twrph1=%d %dns\n",
- tacls, to_ns(tacls, clkrate),
- twrph0, to_ns(twrph0, clkrate),
- twrph1, to_ns(twrph1, clkrate));
+ tacls, to_ns(tacls, clkrate), twrph0, to_ns(twrph0, clkrate), twrph1, to_ns(twrph1, clkrate));
if (!info->is_s3c2440) {
- cfg = S3C2410_NFCONF_EN;
- cfg |= S3C2410_NFCONF_TACLS(tacls-1);
- cfg |= S3C2410_NFCONF_TWRPH0(twrph0-1);
- cfg |= S3C2410_NFCONF_TWRPH1(twrph1-1);
+ cfg = S3C2410_NFCONF_EN;
+ cfg |= S3C2410_NFCONF_TACLS(tacls - 1);
+ cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1);
+ cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1);
} else {
- cfg = S3C2440_NFCONF_TACLS(tacls-1);
- cfg |= S3C2440_NFCONF_TWRPH0(twrph0-1);
- cfg |= S3C2440_NFCONF_TWRPH1(twrph1-1);
+ cfg = S3C2440_NFCONF_TACLS(tacls - 1);
+ cfg |= S3C2440_NFCONF_TWRPH0(twrph0 - 1);
+ cfg |= S3C2440_NFCONF_TWRPH1(twrph1 - 1);
}
pr_debug(PFX "NF_CONF is 0x%lx\n", cfg);
@@ -229,7 +225,7 @@
info = nmtd->info;
bit = (info->is_s3c2440) ? S3C2440_NFCONT_nFCE : S3C2410_NFCONF_nFCE;
- reg = info->regs+((info->is_s3c2440) ? S3C2440_NFCONT:S3C2410_NFCONF);
+ reg = info->regs + ((info->is_s3c2440) ? S3C2440_NFCONT : S3C2410_NFCONF);
cur = readl(reg);
@@ -243,7 +239,7 @@
if (info->platform != NULL) {
if (info->platform->select_chip != NULL)
- (info->platform->select_chip)(nmtd->set, chip);
+ (info->platform->select_chip) (nmtd->set, chip);
}
cur &= ~bit;
@@ -330,22 +326,16 @@
return readb(info->regs + S3C2410_NFSTAT) & S3C2410_NFSTAT_BUSY;
}
-
/* ECC handling functions */
-static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat,
- u_char *read_ecc, u_char *calc_ecc)
+static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc)
{
- pr_debug("s3c2410_nand_correct_data(%p,%p,%p,%p)\n",
- mtd, dat, read_ecc, calc_ecc);
+ pr_debug("s3c2410_nand_correct_data(%p,%p,%p,%p)\n", mtd, dat, read_ecc, calc_ecc);
pr_debug("eccs: read %02x,%02x,%02x vs calc %02x,%02x,%02x\n",
- read_ecc[0], read_ecc[1], read_ecc[2],
- calc_ecc[0], calc_ecc[1], calc_ecc[2]);
+ read_ecc[0], read_ecc[1], read_ecc[2], calc_ecc[0], calc_ecc[1], calc_ecc[2]);
- if (read_ecc[0] == calc_ecc[0] &&
- read_ecc[1] == calc_ecc[1] &&
- read_ecc[2] == calc_ecc[2])
+ if (read_ecc[0] == calc_ecc[0] && read_ecc[1] == calc_ecc[1] && read_ecc[2] == calc_ecc[2])
return 0;
/* we curently have no method for correcting the error */
@@ -378,8 +368,7 @@
writel(ctrl | S3C2440_NFCONT_INITECC, info->regs + S3C2440_NFCONT);
}
-static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd,
- const u_char *dat, u_char *ecc_code)
+static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
{
struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
@@ -387,15 +376,12 @@
ecc_code[1] = readb(info->regs + S3C2410_NFECC + 1);
ecc_code[2] = readb(info->regs + S3C2410_NFECC + 2);
- pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n",
- ecc_code[0], ecc_code[1], ecc_code[2]);
+ pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n", ecc_code[0], ecc_code[1], ecc_code[2]);
return 0;
}
-
-static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd,
- const u_char *dat, u_char *ecc_code)
+static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
{
struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
unsigned long ecc = readl(info->regs + S3C2440_NFMECC0);
@@ -404,13 +390,11 @@
ecc_code[1] = ecc >> 8;
ecc_code[2] = ecc >> 16;
- pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n",
- ecc_code[0], ecc_code[1], ecc_code[2]);
+ pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n", ecc_code[0], ecc_code[1], ecc_code[2]);
return 0;
}
-
/* over-ride the standard functions for a little more speed. We can
* use read/write block to move the data buffers to/from the controller
*/
@@ -421,8 +405,7 @@
readsb(this->IO_ADDR_R, buf, len);
}
-static void s3c2410_nand_write_buf(struct mtd_info *mtd,
- const u_char *buf, int len)
+static void s3c2410_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
{
struct nand_chip *this = mtd->priv;
writesb(this->IO_ADDR_W, buf, len);
@@ -488,9 +471,7 @@
return add_mtd_device(&mtd->mtd);
if (set->nr_partitions > 0 && set->partitions != NULL) {
- return add_mtd_partitions(&mtd->mtd,
- set->partitions,
- set->nr_partitions);
+ return add_mtd_partitions(&mtd->mtd, set->partitions, set->nr_partitions);
}
return add_mtd_device(&mtd->mtd);
@@ -535,6 +516,7 @@
nmtd->info = info;
nmtd->mtd.priv = chip;
+ nmtd->mtd.owner = THIS_MODULE;
nmtd->set = set;
if (hardware_ecc) {
@@ -654,13 +636,11 @@
nmtd = info->mtds;
for (setno = 0; setno < nr_sets; setno++, nmtd++) {
- pr_debug("initialising set %d (%p, info %p)\n",
- setno, nmtd, info);
+ pr_debug("initialising set %d (%p, info %p)\n", setno, nmtd, info);
s3c2410_nand_init_chip(info, nmtd, sets);
- nmtd->scan_res = nand_scan(&nmtd->mtd,
- (sets) ? sets->nr_chips : 1);
+ nmtd->scan_res = nand_scan(&nmtd->mtd, (sets) ? sets->nr_chips : 1);
if (nmtd->scan_res == 0) {
s3c2410_nand_add_partition(info, nmtd, sets);
diff --git a/drivers/mtd/nand/sharpsl.c b/drivers/mtd/nand/sharpsl.c
index 1924a4f..d375cb3 100644
--- a/drivers/mtd/nand/sharpsl.c
+++ b/drivers/mtd/nand/sharpsl.c
@@ -46,7 +46,6 @@
#define FLCLE (1 << 1)
#define FLCE0 (1 << 0)
-
/*
* MTD structure for SharpSL
*/
@@ -60,27 +59,26 @@
static int nr_partitions;
static struct mtd_partition sharpsl_nand_default_partition_info[] = {
{
- .name = "System Area",
- .offset = 0,
- .size = 7 * 1024 * 1024,
- },
+ .name = "System Area",
+ .offset = 0,
+ .size = 7 * 1024 * 1024,
+ },
{
- .name = "Root Filesystem",
- .offset = 7 * 1024 * 1024,
- .size = 30 * 1024 * 1024,
- },
+ .name = "Root Filesystem",
+ .offset = 7 * 1024 * 1024,
+ .size = 30 * 1024 * 1024,
+ },
{
- .name = "Home Filesystem",
- .offset = MTDPART_OFS_APPEND ,
- .size = MTDPART_SIZ_FULL ,
- },
+ .name = "Home Filesystem",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
};
/*
* hardware specific access to control-lines
*/
-static void
-sharpsl_nand_hwcontrol(struct mtd_info* mtd, int cmd)
+static void sharpsl_nand_hwcontrol(struct mtd_info *mtd, int cmd)
{
switch (cmd) {
case NAND_CTL_SETCLE:
@@ -98,10 +96,10 @@
break;
case NAND_CTL_SETNCE:
- writeb(readb(FLASHCTL) & ~(FLCE0|FLCE1), FLASHCTL);
+ writeb(readb(FLASHCTL) & ~(FLCE0 | FLCE1), FLASHCTL);
break;
case NAND_CTL_CLRNCE:
- writeb(readb(FLASHCTL) | (FLCE0|FLCE1), FLASHCTL);
+ writeb(readb(FLASHCTL) | (FLCE0 | FLCE1), FLASHCTL);
break;
}
}
@@ -126,27 +124,23 @@
.useecc = MTD_NANDECC_AUTOPLACE,
.eccbytes = 24,
.eccpos = {
- 0x5, 0x1, 0x2, 0x3, 0x6, 0x7, 0x15, 0x11,
- 0x12, 0x13, 0x16, 0x17, 0x25, 0x21, 0x22, 0x23,
- 0x26, 0x27, 0x35, 0x31, 0x32, 0x33, 0x36, 0x37},
- .oobfree = { {0x08, 0x09} }
+ 0x5, 0x1, 0x2, 0x3, 0x6, 0x7, 0x15, 0x11,
+ 0x12, 0x13, 0x16, 0x17, 0x25, 0x21, 0x22, 0x23,
+ 0x26, 0x27, 0x35, 0x31, 0x32, 0x33, 0x36, 0x37},
+ .oobfree = {{0x08, 0x09}}
};
-static int
-sharpsl_nand_dev_ready(struct mtd_info* mtd)
+static int sharpsl_nand_dev_ready(struct mtd_info *mtd)
{
return !((readb(FLASHCTL) & FLRYBY) == 0);
}
-static void
-sharpsl_nand_enable_hwecc(struct mtd_info* mtd, int mode)
+static void sharpsl_nand_enable_hwecc(struct mtd_info *mtd, int mode)
{
- writeb(0 ,ECCCLRR);
+ writeb(0, ECCCLRR);
}
-static int
-sharpsl_nand_calculate_ecc(struct mtd_info* mtd, const u_char* dat,
- u_char* ecc_code)
+static int sharpsl_nand_calculate_ecc(struct mtd_info *mtd, const u_char * dat, u_char * ecc_code)
{
ecc_code[0] = ~readb(ECCLPUB);
ecc_code[1] = ~readb(ECCLPLB);
@@ -154,47 +148,44 @@
return readb(ECCCNTR) != 0;
}
-
#ifdef CONFIG_MTD_PARTITIONS
const char *part_probes[] = { "cmdlinepart", NULL };
#endif
-
/*
* Main initialization routine
*/
-int __init
-sharpsl_nand_init(void)
+int __init sharpsl_nand_init(void)
{
struct nand_chip *this;
- struct mtd_partition* sharpsl_partition_info;
+ struct mtd_partition *sharpsl_partition_info;
int err = 0;
/* Allocate memory for MTD device structure and private data */
- sharpsl_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip),
- GFP_KERNEL);
+ sharpsl_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
if (!sharpsl_mtd) {
- printk ("Unable to allocate SharpSL NAND MTD device structure.\n");
+ printk("Unable to allocate SharpSL NAND MTD device structure.\n");
return -ENOMEM;
}
/* map physical adress */
sharpsl_io_base = ioremap(sharpsl_phys_base, 0x1000);
- if(!sharpsl_io_base){
+ if (!sharpsl_io_base) {
printk("ioremap to access Sharp SL NAND chip failed\n");
kfree(sharpsl_mtd);
return -EIO;
}
/* Get pointer to private data */
- this = (struct nand_chip *) (&sharpsl_mtd[1]);
+ this = (struct nand_chip *)(&sharpsl_mtd[1]);
/* Initialize structures */
- memset((char *) sharpsl_mtd, 0, sizeof(struct mtd_info));
- memset((char *) this, 0, sizeof(struct nand_chip));
+ memset(sharpsl_mtd, 0, sizeof(struct mtd_info));
+ memset(this, 0, sizeof(struct nand_chip));
/* Link the private data with the MTD structure */
sharpsl_mtd->priv = this;
+ sharpsl_mtd->owner = THIS_MODULE;
/*
* PXA initialize
@@ -221,7 +212,7 @@
this->correct_data = nand_correct_data;
/* Scan to find existence of the device */
- err=nand_scan(sharpsl_mtd,1);
+ err = nand_scan(sharpsl_mtd, 1);
if (err) {
iounmap(sharpsl_io_base);
kfree(sharpsl_mtd);
@@ -230,24 +221,23 @@
/* Register the partitions */
sharpsl_mtd->name = "sharpsl-nand";
- nr_partitions = parse_mtd_partitions(sharpsl_mtd, part_probes,
- &sharpsl_partition_info, 0);
+ nr_partitions = parse_mtd_partitions(sharpsl_mtd, part_probes, &sharpsl_partition_info, 0);
if (nr_partitions <= 0) {
nr_partitions = DEFAULT_NUM_PARTITIONS;
sharpsl_partition_info = sharpsl_nand_default_partition_info;
if (machine_is_poodle()) {
- sharpsl_partition_info[1].size=30 * 1024 * 1024;
+ sharpsl_partition_info[1].size = 22 * 1024 * 1024;
} else if (machine_is_corgi() || machine_is_shepherd()) {
- sharpsl_partition_info[1].size=25 * 1024 * 1024;
+ sharpsl_partition_info[1].size = 25 * 1024 * 1024;
} else if (machine_is_husky()) {
- sharpsl_partition_info[1].size=53 * 1024 * 1024;
+ sharpsl_partition_info[1].size = 53 * 1024 * 1024;
} else if (machine_is_spitz()) {
- sharpsl_partition_info[1].size=5 * 1024 * 1024;
+ sharpsl_partition_info[1].size = 5 * 1024 * 1024;
} else if (machine_is_akita()) {
- sharpsl_partition_info[1].size=58 * 1024 * 1024;
+ sharpsl_partition_info[1].size = 58 * 1024 * 1024;
} else if (machine_is_borzoi()) {
- sharpsl_partition_info[1].size=32 * 1024 * 1024;
+ sharpsl_partition_info[1].size = 32 * 1024 * 1024;
}
}
@@ -261,6 +251,7 @@
/* Return happy */
return 0;
}
+
module_init(sharpsl_nand_init);
/*
@@ -269,7 +260,7 @@
#ifdef MODULE
static void __exit sharpsl_nand_cleanup(void)
{
- struct nand_chip *this = (struct nand_chip *) &sharpsl_mtd[1];
+ struct nand_chip *this = (struct nand_chip *)&sharpsl_mtd[1];
/* Release resources, unregister device */
nand_release(sharpsl_mtd);
@@ -279,6 +270,7 @@
/* Free the MTD device structure */
kfree(sharpsl_mtd);
}
+
module_exit(sharpsl_nand_cleanup);
#endif
diff --git a/drivers/mtd/nand/spia.c b/drivers/mtd/nand/spia.c
index 9cf1ce7..b06aada 100644
--- a/drivers/mtd/nand/spia.c
+++ b/drivers/mtd/nand/spia.c
@@ -39,16 +39,16 @@
*/
#define SPIA_IO_BASE 0xd0000000 /* Start of EP7212 IO address space */
#define SPIA_FIO_BASE 0xf0000000 /* Address where flash is mapped */
-#define SPIA_PEDR 0x0080 /*
- * IO offset to Port E data register
- * where the CLE, ALE and NCE pins
- * are wired to.
- */
-#define SPIA_PEDDR 0x00c0 /*
- * IO offset to Port E data direction
- * register so we can control the IO
- * lines.
- */
+#define SPIA_PEDR 0x0080 /*
+ * IO offset to Port E data register
+ * where the CLE, ALE and NCE pins
+ * are wired to.
+ */
+#define SPIA_PEDDR 0x00c0 /*
+ * IO offset to Port E data direction
+ * register so we can control the IO
+ * lines.
+ */
/*
* Module stuff
@@ -69,25 +69,23 @@
*/
static const struct mtd_partition partition_info[] = {
{
- .name = "SPIA flash partition 1",
- .offset = 0,
- .size = 2*1024*1024
- },
+ .name = "SPIA flash partition 1",
+ .offset = 0,
+ .size = 2 * 1024 * 1024},
{
- .name = "SPIA flash partition 2",
- .offset = 2*1024*1024,
- .size = 6*1024*1024
- }
+ .name = "SPIA flash partition 2",
+ .offset = 2 * 1024 * 1024,
+ .size = 6 * 1024 * 1024}
};
-#define NUM_PARTITIONS 2
+#define NUM_PARTITIONS 2
/*
* hardware specific access to control-lines
*/
-static void spia_hwcontrol(struct mtd_info *mtd, int cmd){
-
- switch(cmd){
+static void spia_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+ switch (cmd) {
case NAND_CTL_SETCLE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) |= 0x01; break;
case NAND_CTL_CLRCLE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) &= ~0x01; break;
@@ -97,51 +95,51 @@
case NAND_CTL_SETNCE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) &= ~0x04; break;
case NAND_CTL_CLRNCE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) |= 0x04; break;
- }
+ }
}
/*
* Main initialization routine
*/
-int __init spia_init (void)
+int __init spia_init(void)
{
struct nand_chip *this;
/* Allocate memory for MTD device structure and private data */
- spia_mtd = kmalloc (sizeof(struct mtd_info) + sizeof (struct nand_chip),
- GFP_KERNEL);
+ spia_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
if (!spia_mtd) {
- printk ("Unable to allocate SPIA NAND MTD device structure.\n");
+ printk("Unable to allocate SPIA NAND MTD device structure.\n");
return -ENOMEM;
}
/* Get pointer to private data */
- this = (struct nand_chip *) (&spia_mtd[1]);
+ this = (struct nand_chip *)(&spia_mtd[1]);
/* Initialize structures */
- memset((char *) spia_mtd, 0, sizeof(struct mtd_info));
- memset((char *) this, 0, sizeof(struct nand_chip));
+ memset(spia_mtd, 0, sizeof(struct mtd_info));
+ memset(this, 0, sizeof(struct nand_chip));
/* Link the private data with the MTD structure */
spia_mtd->priv = this;
+ spia_mtd->owner = THIS_MODULE;
/*
* Set GPIO Port E control register so that the pins are configured
* to be outputs for controlling the NAND flash.
*/
- (*(volatile unsigned char *) (spia_io_base + spia_peddr)) = 0x07;
+ (*(volatile unsigned char *)(spia_io_base + spia_peddr)) = 0x07;
/* Set address of NAND IO lines */
- this->IO_ADDR_R = (void __iomem *) spia_fio_base;
- this->IO_ADDR_W = (void __iomem *) spia_fio_base;
+ this->IO_ADDR_R = (void __iomem *)spia_fio_base;
+ this->IO_ADDR_W = (void __iomem *)spia_fio_base;
/* Set address of hardware control function */
this->hwcontrol = spia_hwcontrol;
/* 15 us command delay time */
this->chip_delay = 15;
/* Scan to find existence of the device */
- if (nand_scan (spia_mtd, 1)) {
- kfree (spia_mtd);
+ if (nand_scan(spia_mtd, 1)) {
+ kfree(spia_mtd);
return -ENXIO;
}
@@ -151,20 +149,22 @@
/* Return happy */
return 0;
}
+
module_init(spia_init);
/*
* Clean up routine
*/
#ifdef MODULE
-static void __exit spia_cleanup (void)
+static void __exit spia_cleanup(void)
{
/* Release resources, unregister device */
- nand_release (spia_mtd);
+ nand_release(spia_mtd);
/* Free the MTD device structure */
- kfree (spia_mtd);
+ kfree(spia_mtd);
}
+
module_exit(spia_cleanup);
#endif
diff --git a/drivers/mtd/nand/toto.c b/drivers/mtd/nand/toto.c
index 7609c43..24cfa9e 100644
--- a/drivers/mtd/nand/toto.c
+++ b/drivers/mtd/nand/toto.c
@@ -48,7 +48,7 @@
#define T_NAND_CTL_CLRALE(iob) gpiosetout(NAND_ALE, 0)
#define T_NAND_CTL_SETALE(iob) gpiosetout(NAND_ALE, NAND_ALE)
-#ifdef CONFIG_NAND_WORKAROUND /* "some" dev boards busted, blue wired to rts2 :( */
+#ifdef CONFIG_NAND_WORKAROUND /* "some" dev boards busted, blue wired to rts2 :( */
#define T_NAND_CTL_CLRCLE(iob) gpiosetout(NAND_CLE, 0); rts2setout(2, 2)
#define T_NAND_CTL_SETCLE(iob) gpiosetout(NAND_CLE, NAND_CLE); rts2setout(2, 0)
#else
@@ -98,9 +98,8 @@
static void toto_hwcontrol(struct mtd_info *mtd, int cmd)
{
- udelay(1); /* hopefully enough time for tc make proceding write to clear */
- switch(cmd){
-
+ udelay(1); /* hopefully enough time for tc make proceding write to clear */
+ switch (cmd) {
case NAND_CTL_SETCLE: T_NAND_CTL_SETCLE(cmd); break;
case NAND_CTL_CLRCLE: T_NAND_CTL_CLRCLE(cmd); break;
@@ -110,35 +109,35 @@
case NAND_CTL_SETNCE: T_NAND_CTL_SETNCE(cmd); break;
case NAND_CTL_CLRNCE: T_NAND_CTL_CLRNCE(cmd); break;
}
- udelay(1); /* allow time to ensure gpio state to over take memory write */
+ udelay(1); /* allow time to ensure gpio state to over take memory write */
}
/*
* Main initialization routine
*/
-int __init toto_init (void)
+int __init toto_init(void)
{
struct nand_chip *this;
int err = 0;
/* Allocate memory for MTD device structure and private data */
- toto_mtd = kmalloc (sizeof(struct mtd_info) + sizeof (struct nand_chip),
- GFP_KERNEL);
+ toto_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
if (!toto_mtd) {
- printk (KERN_WARNING "Unable to allocate toto NAND MTD device structure.\n");
+ printk(KERN_WARNING "Unable to allocate toto NAND MTD device structure.\n");
err = -ENOMEM;
goto out;
}
/* Get pointer to private data */
- this = (struct nand_chip *) (&toto_mtd[1]);
+ this = (struct nand_chip *)(&toto_mtd[1]);
/* Initialize structures */
- memset((char *) toto_mtd, 0, sizeof(struct mtd_info));
- memset((char *) this, 0, sizeof(struct nand_chip));
+ memset(toto_mtd, 0, sizeof(struct mtd_info));
+ memset(this, 0, sizeof(struct nand_chip));
/* Link the private data with the MTD structure */
toto_mtd->priv = this;
+ toto_mtd->owner = THIS_MODULE;
/* Set address of NAND IO lines */
this->IO_ADDR_R = toto_io_base;
@@ -149,33 +148,37 @@
this->chip_delay = 30;
this->eccmode = NAND_ECC_SOFT;
- /* Scan to find existance of the device */
- if (nand_scan (toto_mtd, 1)) {
+ /* Scan to find existance of the device */
+ if (nand_scan(toto_mtd, 1)) {
err = -ENXIO;
goto out_mtd;
}
/* Register the partitions */
- switch(toto_mtd->size){
- case SZ_64M: add_mtd_partitions(toto_mtd, partition_info64M, NUM_PARTITIONS64M); break;
- case SZ_32M: add_mtd_partitions(toto_mtd, partition_info32M, NUM_PARTITIONS32M); break;
- default: {
- printk (KERN_WARNING "Unsupported Nand device\n");
+ switch (toto_mtd->size) {
+ case SZ_64M:
+ add_mtd_partitions(toto_mtd, partition_info64M, NUM_PARTITIONS64M);
+ break;
+ case SZ_32M:
+ add_mtd_partitions(toto_mtd, partition_info32M, NUM_PARTITIONS32M);
+ break;
+ default:{
+ printk(KERN_WARNING "Unsupported Nand device\n");
err = -ENXIO;
goto out_buf;
}
}
- gpioreserve(NAND_MASK); /* claim our gpios */
- archflashwp(0,0); /* open up flash for writing */
+ gpioreserve(NAND_MASK); /* claim our gpios */
+ archflashwp(0, 0); /* open up flash for writing */
goto out;
-out_buf:
- kfree (this->data_buf);
-out_mtd:
- kfree (toto_mtd);
-out:
+ out_buf:
+ kfree(this->data_buf);
+ out_mtd:
+ kfree(toto_mtd);
+ out:
return err;
}
@@ -184,20 +187,21 @@
/*
* Clean up routine
*/
-static void __exit toto_cleanup (void)
+static void __exit toto_cleanup(void)
{
/* Release resources, unregister device */
- nand_release (toto_mtd);
+ nand_release(toto_mtd);
/* Free the MTD device structure */
- kfree (toto_mtd);
+ kfree(toto_mtd);
/* stop flash writes */
- archflashwp(0,1);
+ archflashwp(0, 1);
/* release gpios to system */
- gpiorelease(NAND_MASK);
+ gpiorelease(NAND_MASK);
}
+
module_exit(toto_cleanup);
MODULE_LICENSE("GPL");
diff --git a/drivers/mtd/nand/ts7250.c b/drivers/mtd/nand/ts7250.c
new file mode 100644
index 0000000..622db31
--- /dev/null
+++ b/drivers/mtd/nand/ts7250.c
@@ -0,0 +1,208 @@
+/*
+ * drivers/mtd/nand/ts7250.c
+ *
+ * Copyright (C) 2004 Technologic Systems (support@embeddedARM.com)
+ *
+ * Derived from drivers/mtd/nand/edb7312.c
+ * Copyright (C) 2004 Marius Gröger (mag@sysgo.de)
+ *
+ * Derived from drivers/mtd/nand/autcpu12.c
+ * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de)
+ *
+ * $Id: ts7250.c,v 1.4 2004/12/30 22:02:07 joff Exp $
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Overview:
+ * This is a device driver for the NAND flash device found on the
+ * TS-7250 board which utilizes a Samsung 32 Mbyte part.
+ */
+
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/sizes.h>
+#include <asm/mach-types.h>
+
+/*
+ * MTD structure for TS7250 board
+ */
+static struct mtd_info *ts7250_mtd = NULL;
+
+#ifdef CONFIG_MTD_PARTITIONS
+static const char *part_probes[] = { "cmdlinepart", NULL };
+
+#define NUM_PARTITIONS 3
+
+/*
+ * Define static partitions for flash device
+ */
+static struct mtd_partition partition_info32[] = {
+ {
+ .name = "TS-BOOTROM",
+ .offset = 0x00000000,
+ .size = 0x00004000,
+ }, {
+ .name = "Linux",
+ .offset = 0x00004000,
+ .size = 0x01d00000,
+ }, {
+ .name = "RedBoot",
+ .offset = 0x01d04000,
+ .size = 0x002fc000,
+ },
+};
+
+/*
+ * Define static partitions for flash device
+ */
+static struct mtd_partition partition_info128[] = {
+ {
+ .name = "TS-BOOTROM",
+ .offset = 0x00000000,
+ .size = 0x00004000,
+ }, {
+ .name = "Linux",
+ .offset = 0x00004000,
+ .size = 0x07d00000,
+ }, {
+ .name = "RedBoot",
+ .offset = 0x07d04000,
+ .size = 0x002fc000,
+ },
+};
+#endif
+
+
+/*
+ * hardware specific access to control-lines
+ */
+static void ts7250_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+ unsigned long ctrl = TS72XX_NAND_CONTROL_VIRT_BASE;
+
+ switch (cmd) {
+ case NAND_CTL_SETCLE:
+ __raw_writeb(__raw_readb(ctrl) | 0x2, ctrl);
+ break;
+ case NAND_CTL_CLRCLE:
+ __raw_writeb(__raw_readb(ctrl) & ~0x2, ctrl);
+ break;
+ case NAND_CTL_SETALE:
+ __raw_writeb(__raw_readb(ctrl) | 0x1, ctrl);
+ break;
+ case NAND_CTL_CLRALE:
+ __raw_writeb(__raw_readb(ctrl) & ~0x1, ctrl);
+ break;
+ case NAND_CTL_SETNCE:
+ __raw_writeb(__raw_readb(ctrl) | 0x4, ctrl);
+ break;
+ case NAND_CTL_CLRNCE:
+ __raw_writeb(__raw_readb(ctrl) & ~0x4, ctrl);
+ break;
+ }
+}
+
+/*
+ * read device ready pin
+ */
+static int ts7250_device_ready(struct mtd_info *mtd)
+{
+ return __raw_readb(TS72XX_NAND_BUSY_VIRT_BASE) & 0x20;
+}
+
+/*
+ * Main initialization routine
+ */
+static int __init ts7250_init(void)
+{
+ struct nand_chip *this;
+ const char *part_type = 0;
+ int mtd_parts_nb = 0;
+ struct mtd_partition *mtd_parts = 0;
+
+ if (!machine_is_ts72xx() || board_is_ts7200())
+ return -ENXIO;
+
+ /* Allocate memory for MTD device structure and private data */
+ ts7250_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
+ if (!ts7250_mtd) {
+ printk("Unable to allocate TS7250 NAND MTD device structure.\n");
+ return -ENOMEM;
+ }
+
+ /* Get pointer to private data */
+ this = (struct nand_chip *)(&ts7250_mtd[1]);
+
+ /* Initialize structures */
+ memset(ts7250_mtd, 0, sizeof(struct mtd_info));
+ memset(this, 0, sizeof(struct nand_chip));
+
+ /* Link the private data with the MTD structure */
+ ts7250_mtd->priv = this;
+ ts7250_mtd->owner = THIS_MODULE;
+
+ /* insert callbacks */
+ this->IO_ADDR_R = (void *)TS72XX_NAND_DATA_VIRT_BASE;
+ this->IO_ADDR_W = (void *)TS72XX_NAND_DATA_VIRT_BASE;
+ this->hwcontrol = ts7250_hwcontrol;
+ this->dev_ready = ts7250_device_ready;
+ this->chip_delay = 15;
+ this->eccmode = NAND_ECC_SOFT;
+
+ printk("Searching for NAND flash...\n");
+ /* Scan to find existence of the device */
+ if (nand_scan(ts7250_mtd, 1)) {
+ kfree(ts7250_mtd);
+ return -ENXIO;
+ }
+#ifdef CONFIG_MTD_PARTITIONS
+ ts7250_mtd->name = "ts7250-nand";
+ mtd_parts_nb = parse_mtd_partitions(ts7250_mtd, part_probes, &mtd_parts, 0);
+ if (mtd_parts_nb > 0)
+ part_type = "command line";
+ else
+ mtd_parts_nb = 0;
+#endif
+ if (mtd_parts_nb == 0) {
+ mtd_parts = partition_info32;
+ if (ts7250_mtd->size >= (128 * 0x100000))
+ mtd_parts = partition_info128;
+ mtd_parts_nb = NUM_PARTITIONS;
+ part_type = "static";
+ }
+
+ /* Register the partitions */
+ printk(KERN_NOTICE "Using %s partition definition\n", part_type);
+ add_mtd_partitions(ts7250_mtd, mtd_parts, mtd_parts_nb);
+
+ /* Return happy */
+ return 0;
+}
+
+module_init(ts7250_init);
+
+/*
+ * Clean up routine
+ */
+static void __exit ts7250_cleanup(void)
+{
+ /* Unregister the device */
+ del_mtd_device(ts7250_mtd);
+
+ /* Free the MTD device structure */
+ kfree(ts7250_mtd);
+}
+
+module_exit(ts7250_cleanup);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Jesse Off <joff@embeddedARM.com>");
+MODULE_DESCRIPTION("MTD map driver for Technologic Systems TS-7250 board");
diff --git a/drivers/mtd/onenand/Kconfig b/drivers/mtd/onenand/Kconfig
index 126ff6b..5930a03 100644
--- a/drivers/mtd/onenand/Kconfig
+++ b/drivers/mtd/onenand/Kconfig
@@ -29,6 +29,20 @@
help
Support for OneNAND flash via platform device driver.
+config MTD_ONENAND_OTP
+ bool "OneNAND OTP Support"
+ depends on MTD_ONENAND
+ help
+ One Block of the NAND Flash Array memory is reserved as
+ a One-Time Programmable Block memory area.
+ Also, 1st Block of NAND Flash Array can be used as OTP.
+
+ The OTP block can be read, programmed and locked using the same
+ operations as any other NAND Flash Array memory block.
+ OTP block cannot be erased.
+
+ OTP block is fully-guaranteed to be a valid block.
+
config MTD_ONENAND_SYNC_READ
bool "OneNAND Sync. Burst Read Support"
depends on ARCH_OMAP
diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c
index a53a73f..fe5b489 100644
--- a/drivers/mtd/onenand/onenand_base.c
+++ b/drivers/mtd/onenand/onenand_base.c
@@ -34,7 +34,8 @@
},
.oobfree = {
{2, 3}, {14, 2}, {18, 3}, {30, 2},
- {24, 3}, {46, 2}, {40, 3}, {62, 2} }
+ {34, 3}, {46, 2}, {50, 3}, {62, 2}
+ }
};
/**
@@ -190,7 +191,7 @@
static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
{
struct onenand_chip *this = mtd->priv;
- int value, readcmd = 0;
+ int value, readcmd = 0, block_cmd = 0;
int block, page;
/* Now we use page size operation */
int sectors = 4, count = 4;
@@ -206,6 +207,8 @@
case ONENAND_CMD_ERASE:
case ONENAND_CMD_BUFFERRAM:
+ case ONENAND_CMD_OTP_ACCESS:
+ block_cmd = 1;
block = (int) (addr >> this->erase_shift);
page = -1;
break;
@@ -233,6 +236,12 @@
/* Write 'DFS, FBA' of Flash */
value = onenand_block_address(this, block);
this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
+
+ if (block_cmd) {
+ /* Select DataRAM for DDP */
+ value = onenand_bufferram_address(this, block);
+ this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
+ }
}
if (page != -1) {
@@ -301,6 +310,7 @@
if (state != FL_READING)
cond_resched();
+ touch_softlockup_watchdog();
}
/* To get correct interrupt status in timeout case */
interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
@@ -372,6 +382,17 @@
bufferram += onenand_bufferram_offset(mtd, area);
+ if (ONENAND_CHECK_BYTE_ACCESS(count)) {
+ unsigned short word;
+
+ /* Align with word(16-bit) size */
+ count--;
+
+ /* Read word and save byte */
+ word = this->read_word(bufferram + offset + count);
+ buffer[count] = (word & 0xff);
+ }
+
memcpy(buffer, bufferram + offset, count);
return 0;
@@ -399,6 +420,17 @@
this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
+ if (ONENAND_CHECK_BYTE_ACCESS(count)) {
+ unsigned short word;
+
+ /* Align with word(16-bit) size */
+ count--;
+
+ /* Read word and save byte */
+ word = this->read_word(bufferram + offset + count);
+ buffer[count] = (word & 0xff);
+ }
+
memcpy(buffer, bufferram + offset, count);
this->mmcontrol(mtd, 0);
@@ -426,6 +458,22 @@
bufferram += onenand_bufferram_offset(mtd, area);
+ if (ONENAND_CHECK_BYTE_ACCESS(count)) {
+ unsigned short word;
+ int byte_offset;
+
+ /* Align with word(16-bit) size */
+ count--;
+
+ /* Calculate byte access offset */
+ byte_offset = offset + count;
+
+ /* Read word and save byte */
+ word = this->read_word(bufferram + byte_offset);
+ word = (word & ~0xff) | buffer[count];
+ this->write_word(word, bufferram + byte_offset);
+ }
+
memcpy(bufferram + offset, buffer, count);
return 0;
@@ -719,6 +767,36 @@
#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
/**
+ * onenand_verify_oob - [GENERIC] verify the oob contents after a write
+ * @param mtd MTD device structure
+ * @param buf the databuffer to verify
+ * @param to offset to read from
+ * @param len number of bytes to read and compare
+ *
+ */
+static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to, int len)
+{
+ struct onenand_chip *this = mtd->priv;
+ char *readp = this->page_buf;
+ int column = to & (mtd->oobsize - 1);
+ int status, i;
+
+ this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
+ onenand_update_bufferram(mtd, to, 0);
+ status = this->wait(mtd, FL_READING);
+ if (status)
+ return status;
+
+ this->read_bufferram(mtd, ONENAND_SPARERAM, readp, column, len);
+
+ for(i = 0; i < len; i++)
+ if (buf[i] != 0xFF && buf[i] != readp[i])
+ return -EBADMSG;
+
+ return 0;
+}
+
+/**
* onenand_verify_page - [GENERIC] verify the chip contents after a write
* @param mtd MTD device structure
* @param buf the databuffer to verify
@@ -750,6 +828,7 @@
}
#else
#define onenand_verify_page(...) (0)
+#define onenand_verify_oob(...) (0)
#endif
#define NOTALIGNED(x) ((x & (mtd->oobblock - 1)) != 0)
@@ -869,7 +948,7 @@
size_t *retlen, const u_char *buf)
{
struct onenand_chip *this = mtd->priv;
- int column, status;
+ int column, ret = 0;
int written = 0;
DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
@@ -894,16 +973,27 @@
this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
- this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
- this->write_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
+ /* We send data to spare ram with oobsize
+ * to prevent byte access */
+ memset(this->page_buf, 0xff, mtd->oobsize);
+ memcpy(this->page_buf + column, buf, thislen);
+ this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
onenand_update_bufferram(mtd, to, 0);
- status = this->wait(mtd, FL_WRITING);
- if (status)
+ ret = this->wait(mtd, FL_WRITING);
+ if (ret) {
+ DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write filaed %d\n", ret);
goto out;
+ }
+
+ ret = onenand_verify_oob(mtd, buf, to, thislen);
+ if (ret) {
+ DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret);
+ goto out;
+ }
written += thislen;
@@ -920,7 +1010,7 @@
*retlen = written;
- return 0;
+ return ret;
}
/**
@@ -1324,6 +1414,304 @@
return 0;
}
+#ifdef CONFIG_MTD_ONENAND_OTP
+
+/* Interal OTP operation */
+typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
+ size_t *retlen, u_char *buf);
+
+/**
+ * do_otp_read - [DEFAULT] Read OTP block area
+ * @param mtd MTD device structure
+ * @param from The offset to read
+ * @param len number of bytes to read
+ * @param retlen pointer to variable to store the number of readbytes
+ * @param buf the databuffer to put/get data
+ *
+ * Read OTP block area.
+ */
+static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
+ size_t *retlen, u_char *buf)
+{
+ struct onenand_chip *this = mtd->priv;
+ int ret;
+
+ /* Enter OTP access mode */
+ this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
+ this->wait(mtd, FL_OTPING);
+
+ ret = mtd->read(mtd, from, len, retlen, buf);
+
+ /* Exit OTP access mode */
+ this->command(mtd, ONENAND_CMD_RESET, 0, 0);
+ this->wait(mtd, FL_RESETING);
+
+ return ret;
+}
+
+/**
+ * do_otp_write - [DEFAULT] Write OTP block area
+ * @param mtd MTD device structure
+ * @param from The offset to write
+ * @param len number of bytes to write
+ * @param retlen pointer to variable to store the number of write bytes
+ * @param buf the databuffer to put/get data
+ *
+ * Write OTP block area.
+ */
+static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
+ size_t *retlen, u_char *buf)
+{
+ struct onenand_chip *this = mtd->priv;
+ unsigned char *pbuf = buf;
+ int ret;
+
+ /* Force buffer page aligned */
+ if (len < mtd->oobblock) {
+ memcpy(this->page_buf, buf, len);
+ memset(this->page_buf + len, 0xff, mtd->oobblock - len);
+ pbuf = this->page_buf;
+ len = mtd->oobblock;
+ }
+
+ /* Enter OTP access mode */
+ this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
+ this->wait(mtd, FL_OTPING);
+
+ ret = mtd->write(mtd, from, len, retlen, pbuf);
+
+ /* Exit OTP access mode */
+ this->command(mtd, ONENAND_CMD_RESET, 0, 0);
+ this->wait(mtd, FL_RESETING);
+
+ return ret;
+}
+
+/**
+ * do_otp_lock - [DEFAULT] Lock OTP block area
+ * @param mtd MTD device structure
+ * @param from The offset to lock
+ * @param len number of bytes to lock
+ * @param retlen pointer to variable to store the number of lock bytes
+ * @param buf the databuffer to put/get data
+ *
+ * Lock OTP block area.
+ */
+static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
+ size_t *retlen, u_char *buf)
+{
+ struct onenand_chip *this = mtd->priv;
+ int ret;
+
+ /* Enter OTP access mode */
+ this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
+ this->wait(mtd, FL_OTPING);
+
+ ret = mtd->write_oob(mtd, from, len, retlen, buf);
+
+ /* Exit OTP access mode */
+ this->command(mtd, ONENAND_CMD_RESET, 0, 0);
+ this->wait(mtd, FL_RESETING);
+
+ return ret;
+}
+
+/**
+ * onenand_otp_walk - [DEFAULT] Handle OTP operation
+ * @param mtd MTD device structure
+ * @param from The offset to read/write
+ * @param len number of bytes to read/write
+ * @param retlen pointer to variable to store the number of read bytes
+ * @param buf the databuffer to put/get data
+ * @param action do given action
+ * @param mode specify user and factory
+ *
+ * Handle OTP operation.
+ */
+static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
+ size_t *retlen, u_char *buf,
+ otp_op_t action, int mode)
+{
+ struct onenand_chip *this = mtd->priv;
+ int otp_pages;
+ int density;
+ int ret = 0;
+
+ *retlen = 0;
+
+ density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
+ if (density < ONENAND_DEVICE_DENSITY_512Mb)
+ otp_pages = 20;
+ else
+ otp_pages = 10;
+
+ if (mode == MTD_OTP_FACTORY) {
+ from += mtd->oobblock * otp_pages;
+ otp_pages = 64 - otp_pages;
+ }
+
+ /* Check User/Factory boundary */
+ if (((mtd->oobblock * otp_pages) - (from + len)) < 0)
+ return 0;
+
+ while (len > 0 && otp_pages > 0) {
+ if (!action) { /* OTP Info functions */
+ struct otp_info *otpinfo;
+
+ len -= sizeof(struct otp_info);
+ if (len <= 0)
+ return -ENOSPC;
+
+ otpinfo = (struct otp_info *) buf;
+ otpinfo->start = from;
+ otpinfo->length = mtd->oobblock;
+ otpinfo->locked = 0;
+
+ from += mtd->oobblock;
+ buf += sizeof(struct otp_info);
+ *retlen += sizeof(struct otp_info);
+ } else {
+ size_t tmp_retlen;
+ int size = len;
+
+ ret = action(mtd, from, len, &tmp_retlen, buf);
+
+ buf += size;
+ len -= size;
+ *retlen += size;
+
+ if (ret < 0)
+ return ret;
+ }
+ otp_pages--;
+ }
+
+ return 0;
+}
+
+/**
+ * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
+ * @param mtd MTD device structure
+ * @param buf the databuffer to put/get data
+ * @param len number of bytes to read
+ *
+ * Read factory OTP info.
+ */
+static int onenand_get_fact_prot_info(struct mtd_info *mtd,
+ struct otp_info *buf, size_t len)
+{
+ size_t retlen;
+ int ret;
+
+ ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
+
+ return ret ? : retlen;
+}
+
+/**
+ * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
+ * @param mtd MTD device structure
+ * @param from The offset to read
+ * @param len number of bytes to read
+ * @param retlen pointer to variable to store the number of read bytes
+ * @param buf the databuffer to put/get data
+ *
+ * Read factory OTP area.
+ */
+static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
+ size_t len, size_t *retlen, u_char *buf)
+{
+ return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
+}
+
+/**
+ * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
+ * @param mtd MTD device structure
+ * @param buf the databuffer to put/get data
+ * @param len number of bytes to read
+ *
+ * Read user OTP info.
+ */
+static int onenand_get_user_prot_info(struct mtd_info *mtd,
+ struct otp_info *buf, size_t len)
+{
+ size_t retlen;
+ int ret;
+
+ ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
+
+ return ret ? : retlen;
+}
+
+/**
+ * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
+ * @param mtd MTD device structure
+ * @param from The offset to read
+ * @param len number of bytes to read
+ * @param retlen pointer to variable to store the number of read bytes
+ * @param buf the databuffer to put/get data
+ *
+ * Read user OTP area.
+ */
+static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
+ size_t len, size_t *retlen, u_char *buf)
+{
+ return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
+}
+
+/**
+ * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
+ * @param mtd MTD device structure
+ * @param from The offset to write
+ * @param len number of bytes to write
+ * @param retlen pointer to variable to store the number of write bytes
+ * @param buf the databuffer to put/get data
+ *
+ * Write user OTP area.
+ */
+static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
+ size_t len, size_t *retlen, u_char *buf)
+{
+ return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
+}
+
+/**
+ * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
+ * @param mtd MTD device structure
+ * @param from The offset to lock
+ * @param len number of bytes to unlock
+ *
+ * Write lock mark on spare area in page 0 in OTP block
+ */
+static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
+ size_t len)
+{
+ unsigned char oob_buf[64];
+ size_t retlen;
+ int ret;
+
+ memset(oob_buf, 0xff, mtd->oobsize);
+ /*
+ * Note: OTP lock operation
+ * OTP block : 0xXXFC
+ * 1st block : 0xXXF3 (If chip support)
+ * Both : 0xXXF0 (If chip support)
+ */
+ oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
+
+ /*
+ * Write lock mark to 8th word of sector0 of page0 of the spare0.
+ * We write 16 bytes spare area instead of 2 bytes.
+ */
+ from = 0;
+ len = 16;
+
+ ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
+
+ return ret ? : retlen;
+}
+#endif /* CONFIG_MTD_ONENAND_OTP */
+
/**
* onenand_print_device_info - Print device ID
* @param device device ID
@@ -1475,7 +1863,6 @@
"in suspended state\n");
}
-
/**
* onenand_scan - [OneNAND Interface] Scan for the OneNAND device
* @param mtd MTD device structure
@@ -1567,6 +1954,14 @@
mtd->write_ecc = onenand_write_ecc;
mtd->read_oob = onenand_read_oob;
mtd->write_oob = onenand_write_oob;
+#ifdef CONFIG_MTD_ONENAND_OTP
+ mtd->get_fact_prot_info = onenand_get_fact_prot_info;
+ mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
+ mtd->get_user_prot_info = onenand_get_user_prot_info;
+ mtd->read_user_prot_reg = onenand_read_user_prot_reg;
+ mtd->write_user_prot_reg = onenand_write_user_prot_reg;
+ mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
+#endif
mtd->readv = NULL;
mtd->readv_ecc = NULL;
mtd->writev = onenand_writev;
diff --git a/fs/jffs2/compr.h b/fs/jffs2/compr.h
index a77e830..509b8b1 100644
--- a/fs/jffs2/compr.h
+++ b/fs/jffs2/compr.h
@@ -23,8 +23,8 @@
#include <linux/errno.h>
#include <linux/fs.h>
#include <linux/jffs2.h>
-#include <linux/jffs2_fs_i.h>
-#include <linux/jffs2_fs_sb.h>
+#include "jffs2_fs_i.h"
+#include "jffs2_fs_sb.h"
#include "nodelist.h"
#define JFFS2_RUBINMIPS_PRIORITY 10
diff --git a/fs/jffs2/dir.c b/fs/jffs2/dir.c
index 8bc7a50..1c8e8c0 100644
--- a/fs/jffs2/dir.c
+++ b/fs/jffs2/dir.c
@@ -17,8 +17,8 @@
#include <linux/fs.h>
#include <linux/crc32.h>
#include <linux/jffs2.h>
-#include <linux/jffs2_fs_i.h>
-#include <linux/jffs2_fs_sb.h>
+#include "jffs2_fs_i.h"
+#include "jffs2_fs_sb.h"
#include <linux/time.h>
#include "nodelist.h"
@@ -78,6 +78,9 @@
D1(printk(KERN_DEBUG "jffs2_lookup()\n"));
+ if (target->d_name.len > JFFS2_MAX_NAME_LEN)
+ return ERR_PTR(-ENAMETOOLONG);
+
dir_f = JFFS2_INODE_INFO(dir_i);
c = JFFS2_SB_INFO(dir_i->i_sb);
diff --git a/fs/jffs2/file.c b/fs/jffs2/file.c
index 9f41712..3349db0 100644
--- a/fs/jffs2/file.c
+++ b/fs/jffs2/file.c
@@ -215,12 +215,20 @@
D1(printk(KERN_DEBUG "jffs2_commit_write(): ino #%lu, page at 0x%lx, range %d-%d, flags %lx\n",
inode->i_ino, pg->index << PAGE_CACHE_SHIFT, start, end, pg->flags));
- if (!start && end == PAGE_CACHE_SIZE) {
- /* We need to avoid deadlock with page_cache_read() in
- jffs2_garbage_collect_pass(). So we have to mark the
- page up to date, to prevent page_cache_read() from
- trying to re-lock it. */
- SetPageUptodate(pg);
+ if (end == PAGE_CACHE_SIZE) {
+ if (!start) {
+ /* We need to avoid deadlock with page_cache_read() in
+ jffs2_garbage_collect_pass(). So we have to mark the
+ page up to date, to prevent page_cache_read() from
+ trying to re-lock it. */
+ SetPageUptodate(pg);
+ } else {
+ /* When writing out the end of a page, write out the
+ _whole_ page. This helps to reduce the number of
+ nodes in files which have many short writes, like
+ syslog files. */
+ start = aligned_start = 0;
+ }
}
ri = jffs2_alloc_raw_inode();
diff --git a/fs/jffs2/fs.c b/fs/jffs2/fs.c
index 09e5d10..ea1f37d 100644
--- a/fs/jffs2/fs.c
+++ b/fs/jffs2/fs.c
@@ -56,15 +56,20 @@
mdatalen = sizeof(dev);
D1(printk(KERN_DEBUG "jffs2_setattr(): Writing %d bytes of kdev_t\n", mdatalen));
} else if (S_ISLNK(inode->i_mode)) {
+ down(&f->sem);
mdatalen = f->metadata->size;
mdata = kmalloc(f->metadata->size, GFP_USER);
- if (!mdata)
+ if (!mdata) {
+ up(&f->sem);
return -ENOMEM;
+ }
ret = jffs2_read_dnode(c, f, f->metadata, mdata, 0, mdatalen);
if (ret) {
+ up(&f->sem);
kfree(mdata);
return ret;
}
+ up(&f->sem);
D1(printk(KERN_DEBUG "jffs2_setattr(): Writing %d bytes of symlink target\n", mdatalen));
}
diff --git a/fs/jffs2/gc.c b/fs/jffs2/gc.c
index f9ffece..967fb2c 100644
--- a/fs/jffs2/gc.c
+++ b/fs/jffs2/gc.c
@@ -181,6 +181,10 @@
and trigger the BUG() above while we haven't yet
finished checking all its nodes */
D1(printk(KERN_DEBUG "Waiting for ino #%u to finish reading\n", ic->ino));
+ /* We need to come back again for the _same_ inode. We've
+ made no progress in this case, but that should be OK */
+ c->checked_ino--;
+
up(&c->alloc_sem);
sleep_on_spinunlock(&c->inocache_wq, &c->inocache_lock);
return 0;
diff --git a/fs/jffs2/histo.h b/fs/jffs2/histo.h
deleted file mode 100644
index 22a93a0..0000000
--- a/fs/jffs2/histo.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/* This file provides the bit-probabilities for the input file */
-#define BIT_DIVIDER 629
-static int bits[9] = { 179,167,183,165,159,198,178,119,}; /* ia32 .so files */
diff --git a/include/linux/jffs2_fs_i.h b/fs/jffs2/jffs2_fs_i.h
similarity index 100%
rename from include/linux/jffs2_fs_i.h
rename to fs/jffs2/jffs2_fs_i.h
diff --git a/include/linux/jffs2_fs_sb.h b/fs/jffs2/jffs2_fs_sb.h
similarity index 100%
rename from include/linux/jffs2_fs_sb.h
rename to fs/jffs2/jffs2_fs_sb.h
diff --git a/fs/jffs2/nodelist.c b/fs/jffs2/nodelist.c
index 1d46677..7d71593 100644
--- a/fs/jffs2/nodelist.c
+++ b/fs/jffs2/nodelist.c
@@ -438,8 +438,7 @@
if (c->mtd->point) {
err = c->mtd->point(c->mtd, ofs, len, &retlen, &buffer);
if (!err && retlen < tn->csize) {
- JFFS2_WARNING("MTD point returned len too short: %zu "
- "instead of %u.\n", retlen, tn->csize);
+ JFFS2_WARNING("MTD point returned len too short: %zu instead of %u.\n", retlen, tn->csize);
c->mtd->unpoint(c->mtd, buffer, ofs, len);
} else if (err)
JFFS2_WARNING("MTD point failed: error code %d.\n", err);
@@ -462,8 +461,7 @@
}
if (retlen != len) {
- JFFS2_ERROR("short read at %#08x: %zd instead of %d.\n",
- ofs, retlen, len);
+ JFFS2_ERROR("short read at %#08x: %zd instead of %d.\n", ofs, retlen, len);
err = -EIO;
goto free_out;
}
diff --git a/fs/jffs2/nodelist.h b/fs/jffs2/nodelist.h
index 23a67bb..f6645af 100644
--- a/fs/jffs2/nodelist.h
+++ b/fs/jffs2/nodelist.h
@@ -18,8 +18,8 @@
#include <linux/fs.h>
#include <linux/types.h>
#include <linux/jffs2.h>
-#include <linux/jffs2_fs_sb.h>
-#include <linux/jffs2_fs_i.h>
+#include "jffs2_fs_sb.h"
+#include "jffs2_fs_i.h"
#include "summary.h"
#ifdef __ECOS
diff --git a/fs/jffs2/readinode.c b/fs/jffs2/readinode.c
index f169564..e1acce8 100644
--- a/fs/jffs2/readinode.c
+++ b/fs/jffs2/readinode.c
@@ -204,7 +204,7 @@
tn = jffs2_alloc_tmp_dnode_info();
if (!tn) {
- JFFS2_ERROR("failed to allocate tn (%d bytes).\n", sizeof(*tn));
+ JFFS2_ERROR("failed to allocate tn (%zu bytes).\n", sizeof(*tn));
return -ENOMEM;
}
@@ -434,7 +434,7 @@
}
if (retlen < len) {
- JFFS2_ERROR("short read at %#08x: %d instead of %d.\n",
+ JFFS2_ERROR("short read at %#08x: %zu instead of %d.\n",
offs, retlen, len);
return -EIO;
}
@@ -542,7 +542,7 @@
}
if (retlen < len) {
- JFFS2_ERROR("short read at %#08x: %d instead of %d.\n", ref_offset(ref), retlen, len);
+ JFFS2_ERROR("short read at %#08x: %zu instead of %d.\n", ref_offset(ref), retlen, len);
err = -EIO;
goto free_out;
}
diff --git a/fs/jffs2/scan.c b/fs/jffs2/scan.c
index cf55b22..eca0996 100644
--- a/fs/jffs2/scan.c
+++ b/fs/jffs2/scan.c
@@ -222,9 +222,6 @@
}
}
- if (jffs2_sum_active() && s)
- kfree(s);
-
/* Nextblock dirty is always seen as wasted, because we cannot recycle it now */
if (c->nextblock && (c->nextblock->dirty_size)) {
c->nextblock->wasted_size += c->nextblock->dirty_size;
@@ -266,6 +263,9 @@
else
c->mtd->unpoint(c->mtd, flashbuf, 0, c->mtd->size);
#endif
+ if (s)
+ kfree(s);
+
return ret;
}
diff --git a/fs/jffs2/summary.c b/fs/jffs2/summary.c
index fb9cec6..7b0ed77 100644
--- a/fs/jffs2/summary.c
+++ b/fs/jffs2/summary.c
@@ -581,16 +581,17 @@
wpage = c->summary->sum_buf;
while (c->summary->sum_num) {
+ temp = c->summary->sum_list_head;
- switch (je16_to_cpu(c->summary->sum_list_head->u.nodetype)) {
+ switch (je16_to_cpu(temp->u.nodetype)) {
case JFFS2_NODETYPE_INODE: {
struct jffs2_sum_inode_flash *sino_ptr = wpage;
- sino_ptr->nodetype = c->summary->sum_list_head->i.nodetype;
- sino_ptr->inode = c->summary->sum_list_head->i.inode;
- sino_ptr->version = c->summary->sum_list_head->i.version;
- sino_ptr->offset = c->summary->sum_list_head->i.offset;
- sino_ptr->totlen = c->summary->sum_list_head->i.totlen;
+ sino_ptr->nodetype = temp->i.nodetype;
+ sino_ptr->inode = temp->i.inode;
+ sino_ptr->version = temp->i.version;
+ sino_ptr->offset = temp->i.offset;
+ sino_ptr->totlen = temp->i.totlen;
wpage += JFFS2_SUMMARY_INODE_SIZE;
@@ -600,19 +601,19 @@
case JFFS2_NODETYPE_DIRENT: {
struct jffs2_sum_dirent_flash *sdrnt_ptr = wpage;
- sdrnt_ptr->nodetype = c->summary->sum_list_head->d.nodetype;
- sdrnt_ptr->totlen = c->summary->sum_list_head->d.totlen;
- sdrnt_ptr->offset = c->summary->sum_list_head->d.offset;
- sdrnt_ptr->pino = c->summary->sum_list_head->d.pino;
- sdrnt_ptr->version = c->summary->sum_list_head->d.version;
- sdrnt_ptr->ino = c->summary->sum_list_head->d.ino;
- sdrnt_ptr->nsize = c->summary->sum_list_head->d.nsize;
- sdrnt_ptr->type = c->summary->sum_list_head->d.type;
+ sdrnt_ptr->nodetype = temp->d.nodetype;
+ sdrnt_ptr->totlen = temp->d.totlen;
+ sdrnt_ptr->offset = temp->d.offset;
+ sdrnt_ptr->pino = temp->d.pino;
+ sdrnt_ptr->version = temp->d.version;
+ sdrnt_ptr->ino = temp->d.ino;
+ sdrnt_ptr->nsize = temp->d.nsize;
+ sdrnt_ptr->type = temp->d.type;
- memcpy(sdrnt_ptr->name, c->summary->sum_list_head->d.name,
- c->summary->sum_list_head->d.nsize);
+ memcpy(sdrnt_ptr->name, temp->d.name,
+ temp->d.nsize);
- wpage += JFFS2_SUMMARY_DIRENT_SIZE(c->summary->sum_list_head->d.nsize);
+ wpage += JFFS2_SUMMARY_DIRENT_SIZE(temp->d.nsize);
break;
}
@@ -622,8 +623,7 @@
}
}
- temp = c->summary->sum_list_head;
- c->summary->sum_list_head = c->summary->sum_list_head->u.next;
+ c->summary->sum_list_head = temp->u.next;
kfree(temp);
c->summary->sum_num--;
@@ -655,7 +655,7 @@
if (ret || (retlen != infosize)) {
- JFFS2_WARNING("Write of %zd bytes at 0x%08x failed. returned %d, retlen %zd\n",
+ JFFS2_WARNING("Write of %d bytes at 0x%08x failed. returned %d, retlen %zu\n",
infosize, jeb->offset + c->sector_size - jeb->free_size, ret, retlen);
c->summary->sum_size = JFFS2_SUMMARY_NOSUM_SIZE;
diff --git a/fs/jffs2/super.c b/fs/jffs2/super.c
index ffd8e84..5f73de5 100644
--- a/fs/jffs2/super.c
+++ b/fs/jffs2/super.c
@@ -320,6 +320,18 @@
{
int ret;
+ /* Paranoia checks for on-medium structures. If we ask GCC
+ to pack them with __attribute__((packed)) then it _also_
+ assumes that they're not aligned -- so it emits crappy
+ code on some architectures. Ideally we want an attribute
+ which means just 'no padding', without the alignment
+ thing. But GCC doesn't have that -- we have to just
+ hope the structs are the right sizes, instead. */
+ BUG_ON(sizeof(struct jffs2_unknown_node) != 12);
+ BUG_ON(sizeof(struct jffs2_raw_dirent) != 40);
+ BUG_ON(sizeof(struct jffs2_raw_inode) != 68);
+ BUG_ON(sizeof(struct jffs2_raw_summary) != 32);
+
printk(KERN_INFO "JFFS2 version 2.2."
#ifdef CONFIG_JFFS2_FS_WRITEBUFFER
" (NAND)"
@@ -327,7 +339,7 @@
#ifdef CONFIG_JFFS2_SUMMARY
" (SUMMARY) "
#endif
- " (C) 2001-2003 Red Hat, Inc.\n");
+ " (C) 2001-2006 Red Hat, Inc.\n");
jffs2_inode_cachep = kmem_cache_create("jffs2_i",
sizeof(struct jffs2_inode_info),
diff --git a/include/linux/jffs2.h b/include/linux/jffs2.h
index cf792bb..228ad72f 100644
--- a/include/linux/jffs2.h
+++ b/include/linux/jffs2.h
@@ -82,15 +82,15 @@
typedef struct {
uint32_t v32;
-} __attribute__((packed)) jint32_t;
+} jint32_t;
typedef struct {
uint32_t m;
-} __attribute__((packed)) jmode_t;
+} jmode_t;
typedef struct {
uint16_t v16;
-} __attribute__((packed)) jint16_t;
+} jint16_t;
struct jffs2_unknown_node
{
@@ -99,7 +99,7 @@
jint16_t nodetype;
jint32_t totlen; /* So we can skip over nodes we don't grok */
jint32_t hdr_crc;
-} __attribute__((packed));
+};
struct jffs2_raw_dirent
{
@@ -117,7 +117,7 @@
jint32_t node_crc;
jint32_t name_crc;
uint8_t name[0];
-} __attribute__((packed));
+};
/* The JFFS2 raw inode structure: Used for storage on physical media. */
/* The uid, gid, atime, mtime and ctime members could be longer, but
@@ -149,7 +149,7 @@
jint32_t data_crc; /* CRC for the (compressed) data. */
jint32_t node_crc; /* CRC for the raw inode (excluding data) */
uint8_t data[0];
-} __attribute__((packed));
+};
struct jffs2_raw_summary
{
@@ -163,7 +163,7 @@
jint32_t sum_crc; /* summary information crc */
jint32_t node_crc; /* node crc */
jint32_t sum[0]; /* inode summary info */
-} __attribute__((packed));
+};
union jffs2_node_union
{
diff --git a/include/linux/module.h b/include/linux/module.h
index eaec13d..b0d4413 100644
--- a/include/linux/module.h
+++ b/include/linux/module.h
@@ -557,13 +557,4 @@
#define __MODULE_STRING(x) __stringify(x)
-/* Use symbol_get and symbol_put instead. You'll thank me. */
-#define HAVE_INTER_MODULE
-extern void __deprecated inter_module_register(const char *,
- struct module *, const void *);
-extern void __deprecated inter_module_unregister(const char *);
-extern const void * __deprecated inter_module_get_request(const char *,
- const char *);
-extern void __deprecated inter_module_put(const char *);
-
#endif /* _LINUX_MODULE_H */
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index b6f2fda..73620ef 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -61,7 +61,7 @@
u_int32_t flags;
u_int32_t size; // Total size of the MTD
- /* "Major" erase size for the device. Naïve users may take this
+ /* "Major" erase size for the device. Naïve users may take this
* to be the only erase size available, or may use the more detailed
* information below if they desire
*/
diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h
index 7419b5f..3f5919f 100644
--- a/include/linux/mtd/onenand.h
+++ b/include/linux/mtd/onenand.h
@@ -35,6 +35,8 @@
FL_SYNCING,
FL_UNLOCKING,
FL_LOCKING,
+ FL_RESETING,
+ FL_OTPING,
FL_PM_SUSPENDED,
} onenand_state_t;
@@ -130,6 +132,9 @@
#define ONENAND_SET_SYS_CFG1(v, this) \
(this->write_word(v, this->base + ONENAND_REG_SYS_CFG1))
+/* Check byte access in OneNAND */
+#define ONENAND_CHECK_BYTE_ACCESS(addr) (addr & 0x1)
+
/*
* Options bits
*/
diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h
index d7832ef..4a72818 100644
--- a/include/linux/mtd/onenand_regs.h
+++ b/include/linux/mtd/onenand_regs.h
@@ -112,6 +112,7 @@
#define ONENAND_CMD_LOCK_TIGHT (0x2C)
#define ONENAND_CMD_ERASE (0x94)
#define ONENAND_CMD_RESET (0xF0)
+#define ONENAND_CMD_OTP_ACCESS (0x65)
#define ONENAND_CMD_READID (0x90)
/* NOTE: Those are not *REAL* commands */
@@ -152,6 +153,8 @@
#define ONENAND_CTRL_ERASE (1 << 11)
#define ONENAND_CTRL_ERROR (1 << 10)
#define ONENAND_CTRL_RSTB (1 << 7)
+#define ONENAND_CTRL_OTP_L (1 << 6)
+#define ONENAND_CTRL_OTP_BL (1 << 5)
/*
* Interrupt Status Register F241h (R)
@@ -177,4 +180,9 @@
#define ONENAND_ECC_2BIT (1 << 1)
#define ONENAND_ECC_2BIT_ALL (0xAAAA)
+/*
+ * One-Time Programmable (OTP)
+ */
+#define ONENAND_OTP_LOCK_OFFSET (14)
+
#endif /* __ONENAND_REG_H */
diff --git a/include/linux/mtd/physmap.h b/include/linux/mtd/physmap.h
index c7b8bcd..86831e3 100644
--- a/include/linux/mtd/physmap.h
+++ b/include/linux/mtd/physmap.h
@@ -15,33 +15,26 @@
*/
#ifndef __LINUX_MTD_PHYSMAP__
-
-#include <linux/config.h>
-
-#if defined(CONFIG_MTD_PHYSMAP)
+#define __LINUX_MTD_PHYSMAP__
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/partitions.h>
-/*
- * The map_info for physmap. Board can override size, buswidth, phys,
- * (*set_vpp)(), etc in their initial setup routine.
- */
-extern struct map_info physmap_map;
+struct physmap_flash_data {
+ unsigned int width;
+ void (*set_vpp)(struct map_info *, int);
+ unsigned int nr_parts;
+ struct mtd_partition *parts;
+};
/*
* Board needs to specify the exact mapping during their setup time.
*/
-static inline void physmap_configure(unsigned long addr, unsigned long size, int bankwidth, void (*set_vpp)(struct map_info *, int) )
-{
- physmap_map.phys = addr;
- physmap_map.size = size;
- physmap_map.bankwidth = bankwidth;
- physmap_map.set_vpp = set_vpp;
-}
+void physmap_configure(unsigned long addr, unsigned long size,
+ int bankwidth, void (*set_vpp)(struct map_info *, int) );
-#if defined(CONFIG_MTD_PARTITIONS)
+#ifdef CONFIG_MTD_PARTITIONS
/*
* Machines that wish to do flash partition may want to call this function in
@@ -55,7 +48,5 @@
void physmap_set_partitions(struct mtd_partition *parts, int num_parts);
#endif /* defined(CONFIG_MTD_PARTITIONS) */
-#endif /* defined(CONFIG_MTD) */
#endif /* __LINUX_MTD_PHYSMAP__ */
-
diff --git a/include/mtd/mtd-abi.h b/include/mtd/mtd-abi.h
index b5994ea..fa25241 100644
--- a/include/mtd/mtd-abi.h
+++ b/include/mtd/mtd-abi.h
@@ -28,27 +28,18 @@
#define MTD_ROM 2
#define MTD_NORFLASH 3
#define MTD_NANDFLASH 4
-#define MTD_PEROM 5
#define MTD_DATAFLASH 6
-#define MTD_OTHER 14
-#define MTD_UNKNOWN 15
#define MTD_CLEAR_BITS 1 // Bits can be cleared (flash)
#define MTD_SET_BITS 2 // Bits can be set
-#define MTD_ERASEABLE 4 // Has an erase function
-#define MTD_WRITEB_WRITEABLE 8 // Direct IO is possible
-#define MTD_VOLATILE 16 // Set for RAMs
-#define MTD_XIP 32 // eXecute-In-Place possible
-#define MTD_OOB 64 // Out-of-band data (NAND flash)
#define MTD_ECC 128 // Device capable of automatic ECC
-#define MTD_NO_VIRTBLOCKS 256 // Virtual blocks not allowed
#define MTD_PROGRAM_REGIONS 512 // Configurable Programming Regions
// Some common devices / combinations of capabilities
#define MTD_CAP_ROM 0
-#define MTD_CAP_RAM (MTD_CLEAR_BITS|MTD_SET_BITS|MTD_WRITEB_WRITEABLE)
-#define MTD_CAP_NORFLASH (MTD_CLEAR_BITS|MTD_ERASEABLE)
-#define MTD_CAP_NANDFLASH (MTD_CLEAR_BITS|MTD_ERASEABLE|MTD_OOB)
+#define MTD_CAP_RAM (MTD_CLEAR_BITS|MTD_SET_BITS)
+#define MTD_CAP_NORFLASH (MTD_CLEAR_BITS)
+#define MTD_CAP_NANDFLASH (MTD_CLEAR_BITS)
#define MTD_WRITEABLE (MTD_CLEAR_BITS|MTD_SET_BITS)
diff --git a/init/Kconfig b/init/Kconfig
index 3b36a1d..a7697787 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -389,9 +389,6 @@
default !SLAB
bool
-config OBSOLETE_INTERMODULE
- tristate
-
menu "Loadable module support"
config MODULES
diff --git a/kernel/Makefile b/kernel/Makefile
index 58908f9..f6ef00f 100644
--- a/kernel/Makefile
+++ b/kernel/Makefile
@@ -20,7 +20,6 @@
obj-$(CONFIG_DEBUG_SPINLOCK) += spinlock.o
obj-$(CONFIG_UID16) += uid16.o
obj-$(CONFIG_MODULES) += module.o
-obj-$(CONFIG_OBSOLETE_INTERMODULE) += intermodule.o
obj-$(CONFIG_KALLSYMS) += kallsyms.o
obj-$(CONFIG_PM) += power/
obj-$(CONFIG_BSD_PROCESS_ACCT) += acct.o
diff --git a/kernel/intermodule.c b/kernel/intermodule.c
deleted file mode 100644
index 55b1e5b..0000000
--- a/kernel/intermodule.c
+++ /dev/null
@@ -1,184 +0,0 @@
-/* Deprecated, do not use. Moved from module.c to here. --RR */
-
-/* Written by Keith Owens <kaos@ocs.com.au> Oct 2000 */
-#include <linux/module.h>
-#include <linux/kmod.h>
-#include <linux/spinlock.h>
-#include <linux/list.h>
-#include <linux/slab.h>
-
-/* inter_module functions are always available, even when the kernel is
- * compiled without modules. Consumers of inter_module_xxx routines
- * will always work, even when both are built into the kernel, this
- * approach removes lots of #ifdefs in mainline code.
- */
-
-static struct list_head ime_list = LIST_HEAD_INIT(ime_list);
-static DEFINE_SPINLOCK(ime_lock);
-static int kmalloc_failed;
-
-struct inter_module_entry {
- struct list_head list;
- const char *im_name;
- struct module *owner;
- const void *userdata;
-};
-
-/**
- * inter_module_register - register a new set of inter module data.
- * @im_name: an arbitrary string to identify the data, must be unique
- * @owner: module that is registering the data, always use THIS_MODULE
- * @userdata: pointer to arbitrary userdata to be registered
- *
- * Description: Check that the im_name has not already been registered,
- * complain if it has. For new data, add it to the inter_module_entry
- * list.
- */
-void inter_module_register(const char *im_name, struct module *owner, const void *userdata)
-{
- struct list_head *tmp;
- struct inter_module_entry *ime, *ime_new;
-
- if (!(ime_new = kzalloc(sizeof(*ime), GFP_KERNEL))) {
- /* Overloaded kernel, not fatal */
- printk(KERN_ERR
- "Aiee, inter_module_register: cannot kmalloc entry for '%s'\n",
- im_name);
- kmalloc_failed = 1;
- return;
- }
- ime_new->im_name = im_name;
- ime_new->owner = owner;
- ime_new->userdata = userdata;
-
- spin_lock(&ime_lock);
- list_for_each(tmp, &ime_list) {
- ime = list_entry(tmp, struct inter_module_entry, list);
- if (strcmp(ime->im_name, im_name) == 0) {
- spin_unlock(&ime_lock);
- kfree(ime_new);
- /* Program logic error, fatal */
- printk(KERN_ERR "inter_module_register: duplicate im_name '%s'", im_name);
- BUG();
- }
- }
- list_add(&(ime_new->list), &ime_list);
- spin_unlock(&ime_lock);
-}
-
-/**
- * inter_module_unregister - unregister a set of inter module data.
- * @im_name: an arbitrary string to identify the data, must be unique
- *
- * Description: Check that the im_name has been registered, complain if
- * it has not. For existing data, remove it from the
- * inter_module_entry list.
- */
-void inter_module_unregister(const char *im_name)
-{
- struct list_head *tmp;
- struct inter_module_entry *ime;
-
- spin_lock(&ime_lock);
- list_for_each(tmp, &ime_list) {
- ime = list_entry(tmp, struct inter_module_entry, list);
- if (strcmp(ime->im_name, im_name) == 0) {
- list_del(&(ime->list));
- spin_unlock(&ime_lock);
- kfree(ime);
- return;
- }
- }
- spin_unlock(&ime_lock);
- if (kmalloc_failed) {
- printk(KERN_ERR
- "inter_module_unregister: no entry for '%s', "
- "probably caused by previous kmalloc failure\n",
- im_name);
- return;
- }
- else {
- /* Program logic error, fatal */
- printk(KERN_ERR "inter_module_unregister: no entry for '%s'", im_name);
- BUG();
- }
-}
-
-/**
- * inter_module_get - return arbitrary userdata from another module.
- * @im_name: an arbitrary string to identify the data, must be unique
- *
- * Description: If the im_name has not been registered, return NULL.
- * Try to increment the use count on the owning module, if that fails
- * then return NULL. Otherwise return the userdata.
- */
-static const void *inter_module_get(const char *im_name)
-{
- struct list_head *tmp;
- struct inter_module_entry *ime;
- const void *result = NULL;
-
- spin_lock(&ime_lock);
- list_for_each(tmp, &ime_list) {
- ime = list_entry(tmp, struct inter_module_entry, list);
- if (strcmp(ime->im_name, im_name) == 0) {
- if (try_module_get(ime->owner))
- result = ime->userdata;
- break;
- }
- }
- spin_unlock(&ime_lock);
- return(result);
-}
-
-/**
- * inter_module_get_request - im get with automatic request_module.
- * @im_name: an arbitrary string to identify the data, must be unique
- * @modname: module that is expected to register im_name
- *
- * Description: If inter_module_get fails, do request_module then retry.
- */
-const void *inter_module_get_request(const char *im_name, const char *modname)
-{
- const void *result = inter_module_get(im_name);
- if (!result) {
- request_module("%s", modname);
- result = inter_module_get(im_name);
- }
- return(result);
-}
-
-/**
- * inter_module_put - release use of data from another module.
- * @im_name: an arbitrary string to identify the data, must be unique
- *
- * Description: If the im_name has not been registered, complain,
- * otherwise decrement the use count on the owning module.
- */
-void inter_module_put(const char *im_name)
-{
- struct list_head *tmp;
- struct inter_module_entry *ime;
-
- spin_lock(&ime_lock);
- list_for_each(tmp, &ime_list) {
- ime = list_entry(tmp, struct inter_module_entry, list);
- if (strcmp(ime->im_name, im_name) == 0) {
- if (ime->owner)
- module_put(ime->owner);
- spin_unlock(&ime_lock);
- return;
- }
- }
- spin_unlock(&ime_lock);
- printk(KERN_ERR "inter_module_put: no entry for '%s'", im_name);
- BUG();
-}
-
-EXPORT_SYMBOL(inter_module_register);
-EXPORT_SYMBOL(inter_module_unregister);
-EXPORT_SYMBOL(inter_module_get_request);
-EXPORT_SYMBOL(inter_module_put);
-
-MODULE_LICENSE("GPL");
-
