# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas Reduced Pin Count Interface (RPC-IF)

maintainers:
  - Sergei Shtylyov <sergei.shtylyov@gmail.com>

description: |
  Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to
  be accessed via the external address space read mode or the manual mode.

  The flash chip itself should be represented by a subnode of the RPC-IF node.
  The flash interface is selected based on the "compatible" property of this
  subnode:
  - if it contains "jedec,spi-nor", then SPI is used;
  - if it contains "cfi-flash", then HyperFlash is used.

allOf:
  - $ref: "/schemas/spi/spi-controller.yaml#"

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - renesas,r8a774a1-rpc-if       # RZ/G2M
              - renesas,r8a774b1-rpc-if       # RZ/G2N
              - renesas,r8a774c0-rpc-if       # RZ/G2E
              - renesas,r8a774e1-rpc-if       # RZ/G2H
              - renesas,r8a7795-rpc-if        # R-Car H3
              - renesas,r8a7796-rpc-if        # R-Car M3-W
              - renesas,r8a77961-rpc-if       # R-Car M3-W+
              - renesas,r8a77965-rpc-if       # R-Car M3-N
              - renesas,r8a77970-rpc-if       # R-Car V3M
              - renesas,r8a77980-rpc-if       # R-Car V3H
              - renesas,r8a77990-rpc-if       # R-Car E3
              - renesas,r8a77995-rpc-if       # R-Car D3
              - renesas,r8a779a0-rpc-if       # R-Car V3U
          - const: renesas,rcar-gen3-rpc-if   # a generic R-Car gen3 or RZ/G2{E,H,M,N} device

      - items:
          - enum:
              - renesas,r9a07g043-rpc-if      # RZ/G2UL
              - renesas,r9a07g044-rpc-if      # RZ/G2{L,LC}
              - renesas,r9a07g054-rpc-if      # RZ/V2L
          - const: renesas,rzg2l-rpc-if

  reg:
    items:
      - description: RPC-IF registers
      - description: direct mapping read mode area
      - description: write buffer area

  reg-names:
    items:
      - const: regs
      - const: dirmap
      - const: wbuf

  clocks: true

  interrupts:
    maxItems: 1

  power-domains:
    maxItems: 1

  resets:
    maxItems: 1

patternProperties:
  "flash@[0-9a-f]+$":
    type: object
    properties:
      compatible:
        contains:
          enum:
            - cfi-flash
            - jedec,spi-nor

required:
  - compatible
  - reg
  - reg-names
  - clocks
  - power-domains
  - resets
  - '#address-cells'
  - '#size-cells'

if:
  properties:
    compatible:
      contains:
        enum:
          - renesas,rzg2l-rpc-if
then:
  properties:
    clocks:
      items:
        - description: SPI Multi IO Register access clock (SPI_CLK2)
        - description: SPI Multi IO Main clock (SPI_CLK).

else:
  properties:
    clocks:
      maxItems: 1

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/renesas-cpg-mssr.h>
    #include <dt-bindings/power/r8a77995-sysc.h>

    spi@ee200000 {
      compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if";
      reg = <0xee200000 0x200>,
            <0x08000000 0x4000000>,
            <0xee208000 0x100>;
      reg-names = "regs", "dirmap", "wbuf";
      clocks = <&cpg CPG_MOD 917>;
      power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
      resets = <&cpg 917>;
      #address-cells = <1>;
      #size-cells = <0>;

      flash@0 {
        compatible = "jedec,spi-nor";
        reg = <0>;
        spi-max-frequency = <40000000>;
        spi-tx-bus-width = <1>;
        spi-rx-bus-width = <1>;
      };
    };