commit | 234fcd1484a66158b561b36b421547f0ab85fee9 | [log] [tgz] |
---|---|---|
author | Ralf Baechle <ralf@linux-mips.org> | Sat Mar 08 09:56:28 2008 +0000 |
committer | Ralf Baechle <ralf@linux-mips.org> | Wed Mar 12 14:14:41 2008 +0000 |
tree | b63fbb134fd673e1713f0462e6e0642b418da616 | |
parent | 1af0eea21431bed5d07dffc0fefab57fd72f7e90 [diff] [blame] |
[MIPS] Fix loads of section missmatches Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
diff --git a/arch/mips/mm/sc-r5k.c b/arch/mips/mm/sc-r5k.c index d35b6c1..f330d38 100644 --- a/arch/mips/mm/sc-r5k.c +++ b/arch/mips/mm/sc-r5k.c
@@ -99,7 +99,7 @@ .bc_inv = r5k_dma_cache_inv_sc }; -void __init r5k_sc_init(void) +void __cpuinit r5k_sc_init(void) { if (r5k_sc_probe()) { r5k_sc_enable();