/* SPDX-License-Identifier: GPL-2.0
 *
 * Copyright 2016-2020 HabanaLabs, Ltd.
 * All Rights Reserved.
 *
 */

/************************************
 ** This is an auto-generated file **
 **       DO NOT EDIT BELOW        **
 ************************************/

#ifndef ASIC_REG_PDMA0_CORE_CTX_AXUSER_REGS_H_
#define ASIC_REG_PDMA0_CORE_CTX_AXUSER_REGS_H_

/*
 *****************************************
 *   PDMA0_CORE_CTX_AXUSER
 *   (Prototype: AXUSER)
 *****************************************
 */

#define mmPDMA0_CORE_CTX_AXUSER_HB_ASID 0x4C8B800

#define mmPDMA0_CORE_CTX_AXUSER_HB_MMU_BP 0x4C8B804

#define mmPDMA0_CORE_CTX_AXUSER_HB_STRONG_ORDER 0x4C8B808

#define mmPDMA0_CORE_CTX_AXUSER_HB_NO_SNOOP 0x4C8B80C

#define mmPDMA0_CORE_CTX_AXUSER_HB_WR_REDUCTION 0x4C8B810

#define mmPDMA0_CORE_CTX_AXUSER_HB_RD_ATOMIC 0x4C8B814

#define mmPDMA0_CORE_CTX_AXUSER_HB_QOS 0x4C8B818

#define mmPDMA0_CORE_CTX_AXUSER_HB_RSVD 0x4C8B81C

#define mmPDMA0_CORE_CTX_AXUSER_HB_EMEM_CPAGE 0x4C8B820

#define mmPDMA0_CORE_CTX_AXUSER_HB_CORE 0x4C8B824

#define mmPDMA0_CORE_CTX_AXUSER_E2E_COORD 0x4C8B828

#define mmPDMA0_CORE_CTX_AXUSER_HB_WR_OVRD_LO 0x4C8B830

#define mmPDMA0_CORE_CTX_AXUSER_HB_WR_OVRD_HI 0x4C8B834

#define mmPDMA0_CORE_CTX_AXUSER_HB_RD_OVRD_LO 0x4C8B838

#define mmPDMA0_CORE_CTX_AXUSER_HB_RD_OVRD_HI 0x4C8B83C

#define mmPDMA0_CORE_CTX_AXUSER_LB_COORD 0x4C8B840

#define mmPDMA0_CORE_CTX_AXUSER_LB_LOCK 0x4C8B844

#define mmPDMA0_CORE_CTX_AXUSER_LB_RSVD 0x4C8B848

#define mmPDMA0_CORE_CTX_AXUSER_LB_OVRD 0x4C8B84C

#endif /* ASIC_REG_PDMA0_CORE_CTX_AXUSER_REGS_H_ */