)]}'
{
  "commit": "25d61578daae697c4a0eb817f42a868af9824f82",
  "tree": "ec4ac10132f0b12a822dba6a53d05bab78ec3760",
  "parents": [
    "3e3d32770204ea24cf71919a90d9ccfc2bd407dd"
  ],
  "author": {
    "name": "John Keller",
    "email": "jpk@sgi.com",
    "time": "Thu May 10 22:42:44 2007 -0700"
  },
  "committer": {
    "name": "Tony Luck",
    "email": "tony.luck@intel.com",
    "time": "Fri May 11 09:35:38 2007 -0700"
  },
  "message": "[IA64] SN: validate smp_affinity mask on intr redirect\n\nOn SN, only allow one bit to be set in the smp_affinty mask when\nredirecting an interrupt.  Currently setting multiple bits is allowed, but\nonly the first bit is used in determining the CPU to redirect to.  This has\ncaused confusion among some customers.\n\n[akpm@linux-foundation.org: fixes]\nSigned-off-by: John Keller \u003cjpk@sgi.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "ce49c85c928f5fe44f52501c86211b11926c89d8",
      "old_mode": 33188,
      "old_path": "arch/ia64/kernel/irq.c",
      "new_id": "b4c239685d2eb8f0072d2510573d027ab867d1c3",
      "new_mode": 33188,
      "new_path": "arch/ia64/kernel/irq.c"
    },
    {
      "type": "modify",
      "old_id": "79479e2c6966b0cb468db6f348538e8b0e19d32f",
      "old_mode": 33188,
      "old_path": "include/asm-ia64/irq.h",
      "new_id": "67221615e3173537ac8df7b4ba6de436dd97db3c",
      "new_mode": 33188,
      "new_path": "include/asm-ia64/irq.h"
    },
    {
      "type": "modify",
      "old_id": "ddde0ef9ccdcbb4dbd8834accc5f0264deee8403",
      "old_mode": 33188,
      "old_path": "kernel/irq/proc.c",
      "new_id": "b4f1674fca7987d8f99fa707eb2655cd20f0bc37",
      "new_mode": 33188,
      "new_path": "kernel/irq/proc.c"
    }
  ]
}
