| commit | 28ecca4786bd8af209ae65689faa6aeea80adba2 | [log] [tgz] |
|---|---|---|
| author | Ralf Baechle <ralf@linux-mips.org> | Fri Feb 04 15:19:01 2005 +0000 |
| committer | Ralf Baechle <ralf@linux-mips.org> | Sat Oct 29 19:30:25 2005 +0100 |
| tree | 9a74856c8a4fcdf4568e81952e6ae0af2256a75c | |
| parent | ea7c394492cb56ff0c10ad327157f237d5bbe6b4 [diff] |
Remove old wrong bits of cache code. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 5ea84bc..c08fa36 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c
@@ -1212,9 +1212,6 @@ probe_pcache(); setup_scache(); - if (c->dcache.sets * c->dcache.ways > PAGE_SIZE) - c->dcache.flags |= MIPS_CACHE_ALIASES; - r4k_blast_dcache_page_setup(); r4k_blast_dcache_page_indexed_setup(); r4k_blast_dcache_setup();