commit | 3f9bb601a10dbe3a9b506d9856708a67308bb860 | [log] [tgz] |
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author | Zan Dobersek <zdobersek@igalia.com> | Thu Feb 29 08:49:11 2024 +0100 |
committer | Rob Clark <robdclark@chromium.org> | Sat May 04 09:41:32 2024 -0700 |
tree | 265a571037ac6f40abc36320f2d356063fca09eb | |
parent | 104e548a7c97da24224b375632fca0fc8b64c0db [diff] |
drm/msm/a7xx: allow writing to CP_BV counter selection registers In addition to the CP_PERFCTR_CP_SEL register range, allow writes to the CP_BV_PERFCTR_CP_SEL registers in the 0x8e0-0x8e6 range for profiling purposes of tools like fdperf and perfetto. Signed-off-by: Zan Dobersek <zdobersek@igalia.com> Patchwork: https://patchwork.freedesktop.org/patch/580548/ [fixup a730_protect size] Signed-off-by: Rob Clark <robdclark@chromium.org>