drm/i915: add relative ring register macros
Documentation explicitly mentions that the ring registers are
designed to have the same offsets relative to a base registers.
Use this to fight the code beaurocratic in intel_ringbuffer.c.
No code changes in this patch, just the new definitions.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 8b8ac60..77c9191 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -288,6 +288,14 @@
#define PRB0_HEAD 0x02034
#define PRB0_START 0x02038
#define PRB0_CTL 0x0203c
+#define RENDER_RING_BASE 0x02000
+#define BSD_RING_BASE 0x04000
+#define GEN6_BSD_RING_BASE 0x12000
+#define RING_TAIL(base) (base)+0x30
+#define RING_HEAD(base) (base)+0x34
+#define RING_START(base) (base)+0x38
+#define RING_CTL(base) (base)+0x3c
+#define RING_HWS_PGA(base) (base)+0x80
#define TAIL_ADDR 0x001FFFF8
#define HEAD_WRAP_COUNT 0xFFE00000
#define HEAD_WRAP_ONE 0x00200000
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index f0b44d3..c1517b2 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -801,6 +801,7 @@
.tail = PRB0_TAIL,
.start = PRB0_START
},
+ .mmio_base = RENDER_RING_BASE,
.size = 32 * PAGE_SIZE,
.alignment = PAGE_SIZE,
.virtual_start = NULL,
@@ -839,6 +840,7 @@
.tail = BSD_RING_TAIL,
.start = BSD_RING_START
},
+ .mmio_base = BSD_RING_BASE,
.size = 32 * PAGE_SIZE,
.alignment = PAGE_SIZE,
.virtual_start = NULL,
@@ -957,6 +959,7 @@
.tail = GEN6_BSD_RING_TAIL,
.start = GEN6_BSD_RING_START
},
+ .mmio_base = GEN6_BSD_RING_BASE,
.size = 32 * PAGE_SIZE,
.alignment = PAGE_SIZE,
.virtual_start = NULL,
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index be1fd9b..3917d8b 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -20,6 +20,7 @@
u32 tail;
u32 start;
} regs;
+ u32 mmio_base;
unsigned long size;
unsigned int alignment;
void *virtual_start;
