tree 774f660e0d8d6cebe29a100f126cc2b944e8d962
parent 16775db613c2bdea09705dcb876942c0641a1098
author Qi Liu <liuqi115@huawei.com> 1639579060 +0800
committer Martin K. Petersen <martin.petersen@oracle.com> 1639713598 -0500

scsi: hisi_sas: Fix phyup timeout on FPGA

The OOB interrupt and phyup interrupt handlers may run out-of-order in high
CPU usage scenarios. Since the hisi_sas_phy.timer is added in
hisi_sas_phy_oob_ready() and disarmed in phy_up_v3_hw(), this out-of-order
execution will cause hisi_sas_phy.timer timeout to trigger.

To solve, protect hisi_sas_phy.timer and .attached with a lock, and ensure
that the timer won't be added after phyup handler completes.

Link: https://lore.kernel.org/r/1639579061-179473-8-git-send-email-john.garry@huawei.com
Signed-off-by: Qi Liu <liuqi115@huawei.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>