tree 63bdb4df274f61fa072c481a5ea80ff97bb29a72
parent 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0
author Sia Jee Heng <jeeheng.sia@starfivetech.com> 1714635471 -0700
committer Palmer Dabbelt <palmer@rivosinc.com> 1721831617 -0700
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RISC-V: ACPI: Enable SPCR table for console output on RISC-V

The ACPI SPCR code has been used to enable console output for ARM64 and
X86. The same code can be reused for RISC-V. Furthermore, SPCR table is
mandated for headless system as outlined in the RISC-V BRS
Specification, chapter 6.

Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Link: https://lore.kernel.org/r/20240502073751.102093-2-jeeheng.sia@starfivetech.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>