blob: 54d7a2d56ef6490d0345876e73a6e15263e87210 [file] [log] [blame]
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2024 Amlogic, Inc. All rights reserved.
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
/ {
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
xtal: xtal-clk {
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "xtal";
#clock-cells = <0>;
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
gic: interrupt-controller@fff01000 {
compatible = "arm,gic-400";
reg = <0x0 0xfff01000 0 0x1000>,
<0x0 0xfff02000 0 0x2000>,
<0x0 0xfff04000 0 0x2000>,
<0x0 0xfff06000 0 0x2000>;
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
apb: bus@fe000000 {
compatible = "simple-bus";
reg = <0x0 0xfe000000 0x0 0x480000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
watchdog@2100 {
compatible = "amlogic,a4-wdt", "amlogic,t7-wdt";
reg = <0x0 0x2100 0x0 0x10>;
clocks = <&xtal>;
};
uart_b: serial@7a000 {
compatible = "amlogic,a4-uart",
"amlogic,meson-s4-uart";
reg = <0x0 0x7a000 0x0 0x18>;
interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>, <&xtal>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
status = "disabled";
};
sec_ao: ao-secure@10220 {
compatible = "amlogic,a4-ao-secure",
"amlogic,meson-gx-ao-secure",
"syscon";
reg = <0x0 0x10220 0x0 0x140>;
amlogic,has-chip-id;
};
};
};
};