| // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| /* |
| * Device Tree Source for the RZ/G2UL Type-1 SMARC EVK parts |
| * |
| * Copyright (C) 2022 Renesas Electronics Corp. |
| */ |
| |
| #include <dt-bindings/gpio/gpio.h> |
| #include "rzg2ul-smarc-pinfunction.dtsi" |
| #include "rz-smarc-common.dtsi" |
| |
| #if (!SW_ET0_EN_N) |
| &canfd { |
| /delete-property/ pinctrl-0; |
| /delete-property/ pinctrl-names; |
| status = "disabled"; |
| }; |
| #endif |
| |
| &cpu_dai { |
| sound-dai = <&ssi1>; |
| }; |
| |
| &i2c0 { |
| clock-frequency = <400000>; |
| |
| da9062: pmic@58 { |
| compatible = "dlg,da9062"; |
| reg = <0x58>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| gpio { |
| compatible = "dlg,da9062-gpio"; |
| }; |
| |
| onkey { |
| compatible = "dlg,da9062-onkey"; |
| }; |
| |
| pmic-good-hog { |
| gpio-hog; |
| gpios = <4 GPIO_ACTIVE_HIGH>; |
| output-high; |
| line-name = "PMIC_PGOOD"; |
| }; |
| |
| rtc { |
| compatible = "dlg,da9062-rtc"; |
| }; |
| |
| sd0-pwr-sel-hog { |
| gpio-hog; |
| gpios = <1 GPIO_ACTIVE_HIGH>; |
| input; |
| line-name = "SD0_PWR_SEL"; |
| }; |
| |
| sd1-pwr-sel-hog { |
| gpio-hog; |
| gpios = <2 GPIO_ACTIVE_HIGH>; |
| input; |
| line-name = "SD1_PWR_SEL"; |
| }; |
| |
| sw-et0-en-hog { |
| gpio-hog; |
| gpios = <3 GPIO_ACTIVE_HIGH>; |
| input; |
| line-name = "SW_ET0_EN#"; |
| }; |
| |
| thermal { |
| compatible = "dlg,da9062-thermal"; |
| status = "disabled"; |
| }; |
| |
| watchdog { |
| compatible = "dlg,da9062-watchdog"; |
| status = "disabled"; |
| }; |
| }; |
| |
| versa3: clock-generator@68 { |
| compatible = "renesas,5p35023"; |
| reg = <0x68>; |
| #clock-cells = <1>; |
| clocks = <&x1>; |
| |
| renesas,settings = [ |
| 80 00 11 19 4c 02 23 7f 83 19 08 a9 5f 25 24 bf |
| 00 14 7a e1 00 00 00 00 01 55 59 bb 3f 30 90 b6 |
| 80 b0 45 c4 95 |
| ]; |
| |
| assigned-clocks = <&versa3 0>, <&versa3 1>, |
| <&versa3 2>, <&versa3 3>, |
| <&versa3 4>, <&versa3 5>; |
| assigned-clock-rates = <24000000>, <11289600>, |
| <11289600>, <12000000>, |
| <25000000>, <12288000>; |
| }; |
| }; |
| |
| &i2c1 { |
| wm8978: codec@1a { |
| compatible = "wlf,wm8978"; |
| #sound-dai-cells = <0>; |
| reg = <0x1a>; |
| }; |
| }; |
| |
| #if PMOD_MTU3 |
| &mtu3 { |
| pinctrl-0 = <&mtu3_pins>; |
| pinctrl-names = "default"; |
| |
| status = "okay"; |
| }; |
| |
| &spi1 { |
| status = "disabled"; |
| }; |
| #endif |
| |
| #if (SW_ET0_EN_N) |
| &ssi1 { |
| pinctrl-0 = <&ssi1_pins>; |
| pinctrl-names = "default"; |
| |
| status = "okay"; |
| }; |
| #else |
| &snd_rzg2l { |
| status = "disabled"; |
| }; |
| |
| &spi1 { |
| /delete-property/ pinctrl-0; |
| /delete-property/ pinctrl-names; |
| status = "disabled"; |
| }; |
| |
| &ssi1 { |
| /delete-property/ pinctrl-0; |
| /delete-property/ pinctrl-names; |
| status = "disabled"; |
| }; |
| #endif |
| |
| &vccq_sdhi1 { |
| gpios = <&pinctrl RZG2L_GPIO(6, 1) GPIO_ACTIVE_HIGH>; |
| }; |