tree 8b1796a500d2dd694c924a57ee4502f31b15ef8b
parent c0e01d5d8f15c085236df184e5bc3d79a8b700cd
author Will Deacon <will.deacon@arm.com> 1359979953 +0000
committer Catalin Marinas <catalin.marinas@arm.com> 1360606601 +0000

arm64: atomics: fix grossly inconsistent asm constraints for exclusives

Our uses of inline asm constraints for atomic operations are fairly
wild and varied. We basically need to guarantee the following:

  1. Any instructions with barrier implications
     (load-acquire/store-release) have a "memory" clobber

  2. When performing exclusive accesses, the addresing mode is generated
     using the "Q" constraint

  3. Atomic blocks which use the condition flags, have a "cc" clobber

This patch addresses these concerns which, as well as fixing the
semantics of the code, stops GCC complaining about impossible asm
constraints.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>