tree 95d885366b94eed939670a5e2fa0599fe9ab8232
parent 907f9291f937463c27e5ca9cb5f1d8eedf9a2738
author Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> 1583934074 +0300
committer Stephen Boyd <sboyd@kernel.org> 1590725199 -0700

CLK: HSDK: CGU: support PLL bypassing

Support setting PLL to bypass mode to support output frequency
equal to input one.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Link: https://lkml.kernel.org/r/20200311134115.13257-3-Eugeniy.Paltsev@synopsys.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>