tree 6e99afc5753e68882f714eae6f4a3817d1d87d95
parent 9128b10249543200fbd26758beab2e7dd93addfc
author Madhav Chauhan <madhav.chauhan@intel.com> 1539613680 +0300
committer Jani Nikula <jani.nikula@intel.com> 1540210443 +0300

drm/i915/icl: Define TRANS_DDI_FUNC_CTL DSI registers

This patch defines TRANS_DDI_FUNC_CTL and TRANS_DDI_FUNC_CTL2
registers and their bitfields for DSI. These registers are used
for enabling port sync mode, input pipe select, data lane width
configuration etc.

v2: Changes:
    - Remove redundant extra line
    - Correct some of bitfield definition

v3 by Jani:
 - Move DSI transcoder offsets to GEN11_FEATURES

Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/6b2d87db82660320be10e423742cbf5a31e18037.1539613303.git.jani.nikula@intel.com