/ {
	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu@0 {
			compatible = "arm,cortex-a9";
			reg = <0>;
		};
		cpu@1 {
			compatible = "arm,cortex-a9";
			reg = <1>;
		};
	};

	intc: interrupt-controller@fffe1000 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0xfffe1000 0x1000>,
		      <0xfffe0100 0x100>;
	};

	scu@fffe0000 {
		compatible = "arm,cortex-a9-scu";
		reg = <0xfffe0000 0x1000>;
	};

	timer@fffe0200 {
		interrupt-parent = <&intc>;
		compatible = "arm,cortex-a9-global-timer";
		reg = <0xfffe0200 0x100>;
		interrupts = <1 11 0x04>;
		clocks = <&arm_periph_clk>;
	};
};