| commit | 4ee486274ec1e63f056c991e2523c32780670d08 | [log] [tgz] |
|---|---|---|
| author | Markos Chandras <markos.chandras@imgtec.com> | Tue Dec 02 15:30:19 2014 +0000 |
| committer | Markos Chandras <markos.chandras@imgtec.com> | Tue Feb 17 15:37:31 2015 +0000 |
| tree | 2304dbbb0b303b67d5622cddb95abc62331a1677 | |
| parent | 77f3ee59ee7cfe19e0ee48d9a990c7967fbfcbed [diff] |
MIPS: mm: c-r4k: Set the correct ISA level The local_r4k_flush_cache_sigtramp function uses the 'cache' instruction inside an asm block. However, MIPS R6 changed the opcode for the cache instruction and as a result of which we need to set the correct ISA level. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>