// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2024 Josua Mayer <josua@solid-run.com>
 *
 */

#include <dt-bindings/gpio/gpio.h>

/ {
	model = "SolidRun CN9130 SoM";
	compatible = "solidrun,cn9130-sr-som", "marvell,cn9130";

	aliases {
		ethernet0 = &cp0_eth0;
		ethernet1 = &cp0_eth1;
		ethernet2 = &cp0_eth2;
		i2c0 = &cp0_i2c0;
		mmc0 = &ap_sdhci0;
		rtc0 = &cp0_rtc;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	v_1_8: regulator-1-8 {
		compatible = "regulator-fixed";
		regulator-name = "1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
	};

	/* requires assembly of R9307 */
	vhv: regulator-vhv-1-8 {
		compatible = "regulator-fixed";
		regulator-name = "vhv-1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		pinctrl-0 = <&cp0_reg_vhv_pins>;
		pinctrl-names = "default";
		gpios = <&cp0_gpio2 9 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};
};

&ap_pinctrl {
	ap_mmc0_pins: ap-mmc0-pins {
		marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", "mpp4", "mpp5",
					   "mpp6", "mpp7", "mpp8", "mpp9", "mpp10", "mpp12";
		marvell,function = "sdio";
		/*
		 * mpp12 is emmc reset, function should be sdio (hw_rst),
		 * but pinctrl-mvebu does not support this.
		 *
		 * From pinctrl-mvebu.h:
		 * "The name will be used to switch to this setting in DT description, e.g.
		 * marvell,function = "uart2". subname is only for debugging purposes."
		 */
	};
};

&ap_sdhci0 {
	bus-width = <8>;
	pinctrl-0 = <&ap_mmc0_pins>;
	pinctrl-names = "default";
	vqmmc-supply = <&v_1_8>;
	status = "okay";
};

&cp0_ethernet {
	status = "okay";
};

/* for assembly with phy */
&cp0_eth2 {
	pinctrl-names = "default";
	pinctrl-0 = <&cp0_eth2_pins>;
	phy-mode = "rgmii-id";
	phy = <&cp0_eth2_phy>;
	status = "okay";
};

&cp0_i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&cp0_i2c0_pins>;
	clock-frequency = <100000>;
	status = "okay";

	som_eeprom: eeprom@53 {
		compatible = "atmel,24c02";
		reg = <0x53>;
		pagesize = <8>;
	};
};

&cp0_mdio {
	pinctrl-0 = <&cp0_mdio_pins>;
	status = "okay";

	/* assembly option */
	cp0_eth2_phy: ethernet-phy@0 {
		reg = <0>;
	};
};

&cp0_spi1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&cp0_spi1_pins>;
	/* max speed limited by a mux */
	spi-max-frequency = <1800000000>;

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		/* read command supports max. 50MHz */
		spi-max-frequency = <50000000>;
	};
};

&cp0_syscon0 {
	cp0_pinctrl: pinctrl {
		compatible = "marvell,cp115-standalone-pinctrl";

		cp0_eth2_pins: cp0-ge2-rgmii-pins {
			marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47",
				       "mpp48", "mpp49", "mpp50", "mpp51",
				       "mpp52", "mpp53", "mpp54", "mpp55";
			/* docs call it "ge2", but cp110-pinctrl "ge1" */
			marvell,function = "ge1";
		};

		cp0_i2c0_pins: cp0-i2c0-pins {
			marvell,pins = "mpp37", "mpp38";
			marvell,function = "i2c0";
		};

		cp0_mdio_pins: cp0-mdio-pins {
			marvell,pins = "mpp40", "mpp41";
			marvell,function = "ge";
		};

		cp0_spi1_pins: cp0-spi1-pins {
			marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
			marvell,function = "spi1";
		};

		cp0_reg_vhv_pins: cp0-reg-vhv-pins {
			marvell,pins = "mpp41";
			marvell,function = "gpio";
		};
	};
};

/* AP default console */
&uart0 {
	pinctrl-0 = <&uart0_pins>;
	pinctrl-names = "default";
	status = "okay";
};