commit 5b2fc51576eff811a614e33cbbd0c3cb05022892
author Peter Zijlstra <peterz@infradead.org> Tue Mar 08 16:30:23 2022 +0100
committer Peter Zijlstra <peterz@infradead.org> Tue Mar 15 10:32:35 2022 +0100
tree 7e29a5e6c80c12bdc17ff1b832840f16ffcbb658
parent 8b87d8cec1b31ea710568ae49ba5f5146318da0d

x86/ibt,xen: Sprinkle the ENDBR

Even though Xen currently doesn't advertise IBT, prepare for when it
will eventually do so and sprinkle the ENDBR dust accordingly.

Even though most of the entry points are IRET like, the CPL0
Hypervisor can set WAIT-FOR-ENDBR and demand ENDBR at these sites.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@redhat.com>
Link: https://lore.kernel.org/r/20220308154317.873919996@infradead.org

arch/x86/entry/entry_64.S

diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
index f731393..3fd3828 100644
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -809,6 +809,7 @@
  */
 SYM_CODE_START(xen_failsafe_callback)
 	UNWIND_HINT_EMPTY
+	ENDBR
 	movl	%ds, %ecx
 	cmpw	%cx, 0x10(%rsp)
 	jne	1f