Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/usb-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/usb-2.6:
[PATCH] Driver core: fix locking issues with the devices that are attached to classes
[PATCH] USB: get USB suspend to work again
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index 847e3e6..e1289a2 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -16,3 +16,4 @@
obj-$(CONFIG_SHARPSL_PM) += sharpsl_pm.o
obj-$(CONFIG_SHARP_SCOOP) += scoop.o
obj-$(CONFIG_ARCH_IXP2000) += uengine.o
+obj-$(CONFIG_ARCH_IXP23XX) += uengine.o
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c
index 7971d0d..5b7c263 100644
--- a/arch/arm/common/dmabounce.c
+++ b/arch/arm/common/dmabounce.c
@@ -77,6 +77,8 @@
#endif
struct dmabounce_pool small;
struct dmabounce_pool large;
+
+ rwlock_t lock;
};
static LIST_HEAD(dmabounce_devs);
@@ -116,6 +118,7 @@
struct safe_buffer *buf;
struct dmabounce_pool *pool;
struct device *dev = device_info->dev;
+ unsigned long flags;
dev_dbg(dev, "%s(ptr=%p, size=%d, dir=%d)\n",
__func__, ptr, size, dir);
@@ -163,8 +166,12 @@
print_alloc_stats(device_info);
#endif
+ write_lock_irqsave(&device_info->lock, flags);
+
list_add(&buf->node, &device_info->safe_buffers);
+ write_unlock_irqrestore(&device_info->lock, flags);
+
return buf;
}
@@ -172,22 +179,32 @@
static inline struct safe_buffer *
find_safe_buffer(struct dmabounce_device_info *device_info, dma_addr_t safe_dma_addr)
{
- struct safe_buffer *b;
+ struct safe_buffer *b = NULL;
+ unsigned long flags;
+
+ read_lock_irqsave(&device_info->lock, flags);
list_for_each_entry(b, &device_info->safe_buffers, node)
if (b->safe_dma_addr == safe_dma_addr)
- return b;
+ break;
- return NULL;
+ read_unlock_irqrestore(&device_info->lock, flags);
+ return b;
}
static inline void
free_safe_buffer(struct dmabounce_device_info *device_info, struct safe_buffer *buf)
{
+ unsigned long flags;
+
dev_dbg(device_info->dev, "%s(buf=%p)\n", __func__, buf);
+ write_lock_irqsave(&device_info->lock, flags);
+
list_del(&buf->node);
+ write_unlock_irqrestore(&device_info->lock, flags);
+
if (buf->pool)
dma_pool_free(buf->pool->pool, buf->safe, buf->safe_dma_addr);
else
@@ -396,7 +413,6 @@
dma_map_single(struct device *dev, void *ptr, size_t size,
enum dma_data_direction dir)
{
- unsigned long flags;
dma_addr_t dma_addr;
dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n",
@@ -404,12 +420,8 @@
BUG_ON(dir == DMA_NONE);
- local_irq_save(flags);
-
dma_addr = map_single(dev, ptr, size, dir);
- local_irq_restore(flags);
-
return dma_addr;
}
@@ -424,25 +436,18 @@
dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
enum dma_data_direction dir)
{
- unsigned long flags;
-
dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n",
__func__, (void *) dma_addr, size, dir);
BUG_ON(dir == DMA_NONE);
- local_irq_save(flags);
-
unmap_single(dev, dma_addr, size, dir);
-
- local_irq_restore(flags);
}
int
dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
enum dma_data_direction dir)
{
- unsigned long flags;
int i;
dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n",
@@ -450,8 +455,6 @@
BUG_ON(dir == DMA_NONE);
- local_irq_save(flags);
-
for (i = 0; i < nents; i++, sg++) {
struct page *page = sg->page;
unsigned int offset = sg->offset;
@@ -462,8 +465,6 @@
map_single(dev, ptr, length, dir);
}
- local_irq_restore(flags);
-
return nents;
}
@@ -471,7 +472,6 @@
dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
enum dma_data_direction dir)
{
- unsigned long flags;
int i;
dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n",
@@ -479,55 +479,38 @@
BUG_ON(dir == DMA_NONE);
- local_irq_save(flags);
-
for (i = 0; i < nents; i++, sg++) {
dma_addr_t dma_addr = sg->dma_address;
unsigned int length = sg->length;
unmap_single(dev, dma_addr, length, dir);
}
-
- local_irq_restore(flags);
}
void
dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_addr, size_t size,
enum dma_data_direction dir)
{
- unsigned long flags;
-
dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n",
__func__, (void *) dma_addr, size, dir);
- local_irq_save(flags);
-
sync_single(dev, dma_addr, size, dir);
-
- local_irq_restore(flags);
}
void
dma_sync_single_for_device(struct device *dev, dma_addr_t dma_addr, size_t size,
enum dma_data_direction dir)
{
- unsigned long flags;
-
dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n",
__func__, (void *) dma_addr, size, dir);
- local_irq_save(flags);
-
sync_single(dev, dma_addr, size, dir);
-
- local_irq_restore(flags);
}
void
dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
enum dma_data_direction dir)
{
- unsigned long flags;
int i;
dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n",
@@ -535,23 +518,18 @@
BUG_ON(dir == DMA_NONE);
- local_irq_save(flags);
-
for (i = 0; i < nents; i++, sg++) {
dma_addr_t dma_addr = sg->dma_address;
unsigned int length = sg->length;
sync_single(dev, dma_addr, length, dir);
}
-
- local_irq_restore(flags);
}
void
dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
enum dma_data_direction dir)
{
- unsigned long flags;
int i;
dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n",
@@ -559,16 +537,12 @@
BUG_ON(dir == DMA_NONE);
- local_irq_save(flags);
-
for (i = 0; i < nents; i++, sg++) {
dma_addr_t dma_addr = sg->dma_address;
unsigned int length = sg->length;
sync_single(dev, dma_addr, length, dir);
}
-
- local_irq_restore(flags);
}
static int
@@ -622,6 +596,7 @@
device_info->dev = dev;
INIT_LIST_HEAD(&device_info->safe_buffers);
+ rwlock_init(&device_info->lock);
#ifdef STATS
device_info->total_allocs = 0;
diff --git a/arch/arm/common/uengine.c b/arch/arm/common/uengine.c
index a1310b7..dfca596 100644
--- a/arch/arm/common/uengine.c
+++ b/arch/arm/common/uengine.c
@@ -18,10 +18,26 @@
#include <linux/module.h>
#include <linux/string.h>
#include <asm/hardware.h>
-#include <asm/arch/ixp2000-regs.h>
+#include <asm/arch/hardware.h>
#include <asm/hardware/uengine.h>
#include <asm/io.h>
+#if defined(CONFIG_ARCH_IXP2000)
+#define IXP_UENGINE_CSR_VIRT_BASE IXP2000_UENGINE_CSR_VIRT_BASE
+#define IXP_PRODUCT_ID IXP2000_PRODUCT_ID
+#define IXP_MISC_CONTROL IXP2000_MISC_CONTROL
+#define IXP_RESET1 IXP2000_RESET1
+#else
+#if defined(CONFIG_ARCH_IXP23XX)
+#define IXP_UENGINE_CSR_VIRT_BASE IXP23XX_UENGINE_CSR_VIRT_BASE
+#define IXP_PRODUCT_ID IXP23XX_PRODUCT_ID
+#define IXP_MISC_CONTROL IXP23XX_MISC_CONTROL
+#define IXP_RESET1 IXP23XX_RESET1
+#else
+#error unknown platform
+#endif
+#endif
+
#define USTORE_ADDRESS 0x000
#define USTORE_DATA_LOWER 0x004
#define USTORE_DATA_UPPER 0x008
@@ -43,7 +59,7 @@
static void *ixp2000_uengine_csr_area(int uengine)
{
- return ((void *)IXP2000_UENGINE_CSR_VIRT_BASE) + (uengine << 10);
+ return ((void *)IXP_UENGINE_CSR_VIRT_BASE) + (uengine << 10);
}
/*
@@ -91,8 +107,13 @@
void ixp2000_uengine_reset(u32 uengine_mask)
{
- ixp2000_reg_wrb(IXP2000_RESET1, uengine_mask & ixp2000_uengine_mask);
- ixp2000_reg_wrb(IXP2000_RESET1, 0);
+ u32 value;
+
+ value = ixp2000_reg_read(IXP_RESET1) & ~ixp2000_uengine_mask;
+
+ uengine_mask &= ixp2000_uengine_mask;
+ ixp2000_reg_wrb(IXP_RESET1, value | uengine_mask);
+ ixp2000_reg_wrb(IXP_RESET1, value);
}
EXPORT_SYMBOL(ixp2000_uengine_reset);
@@ -235,11 +256,12 @@
u32 product_id;
u32 rev;
- product_id = ixp2000_reg_read(IXP2000_PRODUCT_ID);
+ product_id = ixp2000_reg_read(IXP_PRODUCT_ID);
if (((product_id >> 16) & 0x1f) != 0)
return 0;
switch ((product_id >> 8) & 0xff) {
+#ifdef CONFIG_ARCH_IXP2000
case 0: /* IXP2800 */
if (!(c->cpu_model_bitmask & 4))
return 0;
@@ -254,6 +276,14 @@
if (!(c->cpu_model_bitmask & 2))
return 0;
break;
+#endif
+
+#ifdef CONFIG_ARCH_IXP23XX
+ case 4: /* IXP23xx */
+ if (!(c->cpu_model_bitmask & 0x3f0))
+ return 0;
+ break;
+#endif
default:
return 0;
@@ -432,7 +462,8 @@
/*
* Determine number of microengines present.
*/
- switch ((ixp2000_reg_read(IXP2000_PRODUCT_ID) >> 8) & 0x1fff) {
+ switch ((ixp2000_reg_read(IXP_PRODUCT_ID) >> 8) & 0x1fff) {
+#ifdef CONFIG_ARCH_IXP2000
case 0: /* IXP2800 */
case 1: /* IXP2850 */
ixp2000_uengine_mask = 0x00ff00ff;
@@ -441,10 +472,17 @@
case 2: /* IXP2400 */
ixp2000_uengine_mask = 0x000f000f;
break;
+#endif
+
+#ifdef CONFIG_ARCH_IXP23XX
+ case 4: /* IXP23xx */
+ ixp2000_uengine_mask = (*IXP23XX_EXP_CFG_FUSE >> 8) & 0xf;
+ break;
+#endif
default:
printk(KERN_INFO "Detected unknown IXP2000 model (%.8x)\n",
- (unsigned int)ixp2000_reg_read(IXP2000_PRODUCT_ID));
+ (unsigned int)ixp2000_reg_read(IXP_PRODUCT_ID));
ixp2000_uengine_mask = 0x00000000;
break;
}
@@ -457,15 +495,15 @@
/*
* Synchronise timestamp counters across all microengines.
*/
- value = ixp2000_reg_read(IXP2000_MISC_CONTROL);
- ixp2000_reg_wrb(IXP2000_MISC_CONTROL, value & ~0x80);
+ value = ixp2000_reg_read(IXP_MISC_CONTROL);
+ ixp2000_reg_wrb(IXP_MISC_CONTROL, value & ~0x80);
for (uengine = 0; uengine < 32; uengine++) {
if (ixp2000_uengine_mask & (1 << uengine)) {
ixp2000_uengine_csr_write(uengine, TIMESTAMP_LOW, 0);
ixp2000_uengine_csr_write(uengine, TIMESTAMP_HIGH, 0);
}
}
- ixp2000_reg_wrb(IXP2000_MISC_CONTROL, value | 0x80);
+ ixp2000_reg_wrb(IXP_MISC_CONTROL, value | 0x80);
return 0;
}
diff --git a/arch/arm/configs/lpd270_defconfig b/arch/arm/configs/lpd270_defconfig
new file mode 100644
index 0000000..d08bbe5
--- /dev/null
+++ b/arch/arm/configs/lpd270_defconfig
@@ -0,0 +1,963 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.17-git2
+# Wed Jun 21 22:20:18 2006
+#
+CONFIG_ARM=y
+CONFIG_MMU=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_VECTORS_BASE=0xffff0000
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+# CONFIG_RELAY is not set
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_UID16=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SHMEM=y
+CONFIG_SLAB=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_SLOB is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+# CONFIG_MODULE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_KMOD is not set
+
+#
+# Block layer
+#
+# CONFIG_BLK_DEV_IO_TRACE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91RM9200 is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP3XX is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_PNX4008 is not set
+CONFIG_ARCH_PXA=y
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_OMAP is not set
+
+#
+# Intel PXA2xx Implementations
+#
+# CONFIG_ARCH_LUBBOCK is not set
+CONFIG_MACH_LOGICPD_PXA270=y
+# CONFIG_MACH_MAINSTONE is not set
+# CONFIG_ARCH_PXA_IDP is not set
+# CONFIG_PXA_SHARPSL is not set
+CONFIG_PXA27x=y
+CONFIG_IWMMXT=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_XSCALE=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+
+#
+# Processor Features
+#
+# CONFIG_ARM_THUMB is not set
+CONFIG_XSCALE_PMU=y
+
+#
+# Bus support
+#
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_PREEMPT is not set
+# CONFIG_NO_IDLE_HZ is not set
+CONFIG_HZ=100
+# CONFIG_AEABI is not set
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="root=/dev/nfs ip=bootp console=ttyS0,115200 mem=64M"
+# CONFIG_XIP_KERNEL is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_ARTHUR is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+# CONFIG_PM_LEGACY is not set
+# CONFIG_PM_DEBUG is not set
+# CONFIG_APM is not set
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_NETDEBUG is not set
+# CONFIG_PACKET is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_BIC=y
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+
+#
+# Connector - unified userspace <-> kernelspace linker
+#
+# CONFIG_CONNECTOR is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+# CONFIG_MTD_CFI_I1 is not set
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+# CONFIG_MTD_XIP is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_SHARP_SL is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+
+#
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+
+#
+# IDE chipset support/bugfixes
+#
+# CONFIG_IDE_GENERIC is not set
+# CONFIG_IDE_ARM is not set
+# CONFIG_BLK_DEV_IDEDMA is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# I2O device support
+#
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# PHY device support
+#
+# CONFIG_PHYLIB is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+CONFIG_SMC91X=y
+# CONFIG_DM9000 is not set
+# CONFIG_SMC911X is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+
+#
+# Token Ring devices
+#
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+# CONFIG_SERIO_SERPORT is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_RAW_DRIVER is not set
+
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
+#
+# Hardware Monitoring support
+#
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Misc devices
+#
+
+#
+# LED devices
+#
+# CONFIG_NEW_LEDS is not set
+
+#
+# LED drivers
+#
+
+#
+# LED Triggers
+#
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+CONFIG_VIDEO_V4L2=y
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+CONFIG_FB=y
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_MACMODES is not set
+CONFIG_FB_FIRMWARE_EDID=y
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_PXA=y
+# CONFIG_FB_PXA_PARAMETERS is not set
+# CONFIG_FB_VIRTUAL is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+
+#
+# Logo configuration
+#
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Sound
+#
+CONFIG_SOUND=y
+
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+# CONFIG_SND_SUPPORT_OLD_API is not set
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+
+#
+# Generic devices
+#
+CONFIG_SND_AC97_CODEC=y
+CONFIG_SND_AC97_BUS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# ALSA ARM devices
+#
+CONFIG_SND_PXA2XX_PCM=y
+CONFIG_SND_PXA2XX_AC97=y
+
+#
+# Open Sound System
+#
+# CONFIG_SOUND_PRIME is not set
+
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# Real Time Clock
+#
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+# CONFIG_VFAT_FS is not set
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_SYSFS=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_VM is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_UNWIND_INFO is not set
+CONFIG_FORCED_INLINING=y
+# CONFIG_RCU_TORTURE_TEST is not set
+CONFIG_DEBUG_USER=y
+# CONFIG_DEBUG_WAITQ is not set
+CONFIG_DEBUG_ERRORS=y
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_ICEDCC is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Hardware crypto devices
+#
+
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index ab8e600..86c9252 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -20,6 +20,7 @@
#include <asm/glue.h>
#include <asm/vfpmacros.h>
#include <asm/arch/entry-macro.S>
+#include <asm/thread_notify.h>
#include "entry-header.S"
@@ -560,10 +561,8 @@
add ip, r1, #TI_CPU_SAVE
ldr r3, [r2, #TI_TP_VALUE]
stmia ip!, {r4 - sl, fp, sp, lr} @ Store most regs on stack
-#ifndef CONFIG_MMU
- add r2, r2, #TI_CPU_DOMAIN
-#else
- ldr r6, [r2, #TI_CPU_DOMAIN]!
+#ifdef CONFIG_MMU
+ ldr r6, [r2, #TI_CPU_DOMAIN]
#endif
#if __LINUX_ARM_ARCH__ >= 6
#ifdef CONFIG_CPU_32v6K
@@ -585,21 +584,20 @@
#ifdef CONFIG_MMU
mcr p15, 0, r6, c3, c0, 0 @ Set domain register
#endif
-#ifdef CONFIG_VFP
- @ Always disable VFP so we can lazily save/restore the old
- @ state. This occurs in the context of the previous thread.
- VFPFMRX r4, FPEXC
- bic r4, r4, #FPEXC_ENABLE
- VFPFMXR FPEXC, r4
-#endif
#if defined(CONFIG_IWMMXT)
bl iwmmxt_task_switch
#elif defined(CONFIG_CPU_XSCALE)
- add r4, r2, #40 @ cpu_context_save->extra
+ add r4, r2, #TI_CPU_DOMAIN + 40 @ cpu_context_save->extra
ldmib r4, {r4, r5}
mar acc0, r4, r5
#endif
- ldmib r2, {r4 - sl, fp, sp, pc} @ Load all regs saved previously
+ mov r5, r0
+ add r4, r2, #TI_CPU_SAVE
+ ldr r0, =thread_notify_head
+ mov r1, #THREAD_NOTIFY_SWITCH
+ bl atomic_notifier_call_chain
+ mov r0, r5
+ ldmia r4, {r4 - sl, fp, sp, pc} @ Load all regs saved previously
__INIT
diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S
index 24c7b04..af9e0ae 100644
--- a/arch/arm/kernel/iwmmxt.S
+++ b/arch/arm/kernel/iwmmxt.S
@@ -285,7 +285,7 @@
bne 1f @ yes: block them for next task
ldr r5, =concan_owner
- add r6, r2, #(TI_IWMMXT_STATE - TI_CPU_DOMAIN) @ get next task Concan save area
+ add r6, r2, #TI_IWMMXT_STATE @ get next task Concan save area
ldr r5, [r5] @ get current Concan owner
teq r5, r6 @ next task owns it?
movne pc, lr @ no: leave Concan disabled
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 17c38db..e1c77ee 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -33,6 +33,7 @@
#include <asm/leds.h>
#include <asm/processor.h>
#include <asm/system.h>
+#include <asm/thread_notify.h>
#include <asm/uaccess.h>
#include <asm/mach/time.h>
@@ -338,13 +339,9 @@
{
}
-static void default_fp_init(union fp_state *fp)
-{
- memset(fp, 0, sizeof(union fp_state));
-}
+ATOMIC_NOTIFIER_HEAD(thread_notify_head);
-void (*fp_init)(union fp_state *) = default_fp_init;
-EXPORT_SYMBOL(fp_init);
+EXPORT_SYMBOL_GPL(thread_notify_head);
void flush_thread(void)
{
@@ -353,22 +350,21 @@
memset(thread->used_cp, 0, sizeof(thread->used_cp));
memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
+ memset(&thread->fpstate, 0, sizeof(union fp_state));
+
+ thread_notify(THREAD_NOTIFY_FLUSH, thread);
#if defined(CONFIG_IWMMXT)
iwmmxt_task_release(thread);
#endif
- fp_init(&thread->fpstate);
-#if defined(CONFIG_VFP)
- vfp_flush_thread(&thread->vfpstate);
-#endif
}
void release_thread(struct task_struct *dead_task)
{
-#if defined(CONFIG_VFP)
- vfp_release_thread(&task_thread_info(dead_task)->vfpstate);
-#endif
+ struct thread_info *thread = task_thread_info(dead_task);
+
+ thread_notify(THREAD_NOTIFY_RELEASE, thread);
#if defined(CONFIG_IWMMXT)
- iwmmxt_task_release(task_thread_info(dead_task));
+ iwmmxt_task_release(thread);
#endif
}
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index a0cd0a9..e9fe780 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -665,17 +665,33 @@
if (syscall) {
if (regs->ARM_r0 == -ERESTART_RESTARTBLOCK) {
if (thumb_mode(regs)) {
- regs->ARM_r7 = __NR_restart_syscall;
+ regs->ARM_r7 = __NR_restart_syscall - __NR_SYSCALL_BASE;
regs->ARM_pc -= 2;
} else {
+#if defined(CONFIG_AEABI) && !defined(CONFIG_OABI_COMPAT)
+ regs->ARM_r7 = __NR_restart_syscall;
+ regs->ARM_pc -= 4;
+#else
u32 __user *usp;
+ u32 swival = __NR_restart_syscall;
regs->ARM_sp -= 12;
usp = (u32 __user *)regs->ARM_sp;
+ /*
+ * Either we supports OABI only, or we have
+ * EABI with the OABI compat layer enabled.
+ * In the later case we don't know if user
+ * space is EABI or not, and if not we must
+ * not clobber r7. Always using the OABI
+ * syscall solves that issue and works for
+ * all those cases.
+ */
+ swival = swival - __NR_SYSCAll_BASE + __NR_OABI_SYSCALL_BASE;
+
put_user(regs->ARM_pc, &usp[0]);
/* swi __NR_restart_syscall */
- put_user(0xef000000 | __NR_restart_syscall, &usp[1]);
+ put_user(0xef000000 | swival, &usp[1]);
/* ldr pc, [sp], #12 */
put_user(0xe49df00c, &usp[2]);
@@ -683,6 +699,7 @@
(unsigned long)(usp + 3));
regs->ARM_pc = regs->ARM_sp + 4;
+#endif
}
}
if (regs->ARM_r0 == -ERESTARTNOHAND ||
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index dcd4176..bf6bd71 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -103,7 +103,8 @@
write_seqlock(&xtime_lock);
__raw_writel(1, EP93XX_TIMER1_CLEAR);
- while (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time
+ while ((signed long)
+ (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
>= TIMER4_TICKS_PER_JIFFY) {
last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
timer_tick(regs);
@@ -124,7 +125,7 @@
{
/* Enable periodic HZ timer. */
__raw_writel(0x48, EP93XX_TIMER1_CONTROL);
- __raw_writel((508000 / HZ) - 1, EP93XX_TIMER1_LOAD);
+ __raw_writel((508469 / HZ) - 1, EP93XX_TIMER1_LOAD);
__raw_writel(0xc8, EP93XX_TIMER1_CONTROL);
/* Enable lost jiffy timer. */
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index d18fcb1..47cc6c8 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -16,16 +16,38 @@
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
+#include <linux/ioport.h>
#include <linux/mtd/physmap.h>
+#include <linux/platform_device.h>
#include <asm/io.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+static struct physmap_flash_data gesbc9312_flash_data = {
+ .width = 4,
+};
+
+static struct resource gesbc9312_flash_resource = {
+ .start = 0x60000000,
+ .end = 0x60800000,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device gesbc9312_flash = {
+ .name = "physmap-flash",
+ .id = 0,
+ .dev = {
+ .platform_data = &gesbc9312_flash_data,
+ },
+ .num_resources = 1,
+ .resource = &gesbc9312_flash_resource,
+};
+
static void __init gesbc9312_init_machine(void)
{
ep93xx_init_devices();
- physmap_configure(0x60000000, 0x00800000, 4, NULL);
+ platform_device_register(&gesbc9312_flash);
}
MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index e24566b..6e5a56c 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -16,6 +16,7 @@
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
+#include <linux/ioport.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/m48t86.h>
@@ -111,6 +112,26 @@
}
}
+static struct physmap_flash_data ts72xx_flash_data = {
+ .width = 1,
+};
+
+static struct resource ts72xx_flash_resource = {
+ .start = TS72XX_NOR_PHYS_BASE,
+ .end = TS72XX_NOR_PHYS_BASE + 0x01000000,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device ts72xx_flash = {
+ .name = "physmap-flash",
+ .id = 0,
+ .dev = {
+ .platform_data = &ts72xx_flash_data,
+ },
+ .num_resources = 1,
+ .resource = &ts72xx_flash_resource,
+};
+
static unsigned char ts72xx_rtc_readbyte(unsigned long addr)
{
__raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE);
@@ -141,7 +162,7 @@
{
ep93xx_init_devices();
if (board_is_ts7200())
- physmap_configure(TS72XX_NOR_PHYS_BASE, 0x01000000, 1, NULL);
+ platform_device_register(&ts72xx_flash);
platform_device_register(&ts72xx_rtc_device);
}
diff --git a/arch/arm/mach-imx/dma.c b/arch/arm/mach-imx/dma.c
index 4ca51dc..3657887 100644
--- a/arch/arm/mach-imx/dma.c
+++ b/arch/arm/mach-imx/dma.c
@@ -15,6 +15,9 @@
* Changed to support scatter gather DMA
* by taking Russell's code from RiscPC
*
+ * 2006-05-31 Pavel Pisa <pisa@cmp.felk.cvut.cz>
+ * Corrected error handling code.
+ *
*/
#undef DEBUG
@@ -277,7 +280,7 @@
int
imx_dma_setup_handlers(imx_dmach_t dma_ch,
void (*irq_handler) (int, void *, struct pt_regs *),
- void (*err_handler) (int, void *, struct pt_regs *),
+ void (*err_handler) (int, void *, struct pt_regs *, int),
void *data)
{
struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch];
@@ -463,43 +466,53 @@
int i, disr = DISR;
struct imx_dma_channel *channel;
unsigned int err_mask = DBTOSR | DRTOSR | DSESR | DBOSR;
+ int errcode;
- DISR = disr;
+ DISR = disr & err_mask;
for (i = 0; i < IMX_DMA_CHANNELS; i++) {
+ if(!(err_mask & (1 << i)))
+ continue;
channel = &imx_dma_channels[i];
+ errcode = 0;
- if ((err_mask & 1 << i) && channel->name
- && channel->err_handler) {
- channel->err_handler(i, channel->data, regs);
+ if (DBTOSR & (1 << i)) {
+ DBTOSR = (1 << i);
+ errcode |= IMX_DMA_ERR_BURST;
+ }
+ if (DRTOSR & (1 << i)) {
+ DRTOSR = (1 << i);
+ errcode |= IMX_DMA_ERR_REQUEST;
+ }
+ if (DSESR & (1 << i)) {
+ DSESR = (1 << i);
+ errcode |= IMX_DMA_ERR_TRANSFER;
+ }
+ if (DBOSR & (1 << i)) {
+ DBOSR = (1 << i);
+ errcode |= IMX_DMA_ERR_BUFFER;
+ }
+
+ /*
+ * The cleaning of @sg field would be questionable
+ * there, because its value can help to compute
+ * remaining/transfered bytes count in the handler
+ */
+ /*imx_dma_channels[i].sg = NULL;*/
+
+ if (channel->name && channel->err_handler) {
+ channel->err_handler(i, channel->data, regs, errcode);
continue;
}
imx_dma_channels[i].sg = NULL;
- if (DBTOSR & (1 << i)) {
- printk(KERN_WARNING
- "Burst timeout on channel %d (%s)\n",
- i, channel->name);
- DBTOSR |= (1 << i);
- }
- if (DRTOSR & (1 << i)) {
- printk(KERN_WARNING
- "Request timeout on channel %d (%s)\n",
- i, channel->name);
- DRTOSR |= (1 << i);
- }
- if (DSESR & (1 << i)) {
- printk(KERN_WARNING
- "Transfer timeout on channel %d (%s)\n",
- i, channel->name);
- DSESR |= (1 << i);
- }
- if (DBOSR & (1 << i)) {
- printk(KERN_WARNING
- "Buffer overflow timeout on channel %d (%s)\n",
- i, channel->name);
- DBOSR |= (1 << i);
- }
+ printk(KERN_WARNING
+ "DMA timeout on channel %d (%s) -%s%s%s%s\n",
+ i, channel->name,
+ errcode&IMX_DMA_ERR_BURST? " burst":"",
+ errcode&IMX_DMA_ERR_REQUEST? " request":"",
+ errcode&IMX_DMA_ERR_TRANSFER? " transfer":"",
+ errcode&IMX_DMA_ERR_BUFFER? " buffer":"");
}
return IRQ_HANDLED;
}
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index 6e8d504..186f632 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -211,7 +211,8 @@
/* clear timer 1 */
ixp2000_reg_wrb(IXP2000_T1_CLR, 1);
- while ((next_jiffy_time - *missing_jiffy_timer_csr) > ticks_per_jiffy) {
+ while ((signed long)(next_jiffy_time - *missing_jiffy_timer_csr)
+ >= ticks_per_jiffy) {
timer_tick(regs);
next_jiffy_time -= ticks_per_jiffy;
}
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index affd1d5..051e3d7 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -334,7 +334,7 @@
/*************************************************************************
* Timer-tick functions for IXP23xx
*************************************************************************/
-#define CLOCK_TICKS_PER_USEC CLOCK_TICK_RATE / (USEC_PER_SEC)
+#define CLOCK_TICKS_PER_USEC (CLOCK_TICK_RATE / USEC_PER_SEC)
static unsigned long next_jiffy_time;
@@ -353,7 +353,7 @@
{
/* Clear Pending Interrupt by writing '1' to it */
*IXP23XX_TIMER_STATUS = IXP23XX_TIMER1_INT_PEND;
- while ((*IXP23XX_TIMER_CONT - next_jiffy_time) > LATCH) {
+ while ((signed long)(*IXP23XX_TIMER_CONT - next_jiffy_time) >= LATCH) {
timer_tick(regs);
next_jiffy_time += LATCH;
}
@@ -439,5 +439,6 @@
void __init ixp23xx_sys_init(void)
{
+ *IXP23XX_EXP_UNIT_FUSE |= 0xf;
platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices));
}
diff --git a/arch/arm/mach-ixp23xx/espresso.c b/arch/arm/mach-ixp23xx/espresso.c
index bf688c1..dc5e489 100644
--- a/arch/arm/mach-ixp23xx/espresso.c
+++ b/arch/arm/mach-ixp23xx/espresso.c
@@ -53,9 +53,29 @@
};
subsys_initcall(espresso_pci_init);
+static struct physmap_flash_data espresso_flash_data = {
+ .width = 2,
+};
+
+static struct resource espresso_flash_resource = {
+ .start = 0x90000000,
+ .end = 0x92000000,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device espresso_flash = {
+ .name = "physmap-flash",
+ .id = 0,
+ .dev = {
+ .platform_data = &espresso_flash_data,
+ },
+ .num_resources = 1,
+ .resource = &espresso_flash_resource,
+};
+
static void __init espresso_init(void)
{
- physmap_configure(0x90000000, 0x02000000, 2, NULL);
+ platform_device_register(&espresso_flash);
/*
* Mark flash as writeable.
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c
index 00146c3..535b334 100644
--- a/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -298,9 +298,29 @@
iotable_init(ixdp2351_io_desc, ARRAY_SIZE(ixdp2351_io_desc));
}
+static struct physmap_flash_data ixdp2351_flash_data = {
+ .width = 1,
+};
+
+static struct resource ixdp2351_flash_resource = {
+ .start = 0x90000000,
+ .end = 0x94000000,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device ixdp2351_flash = {
+ .name = "physmap-flash",
+ .id = 0,
+ .dev = {
+ .platform_data = &ixdp2351_flash_data,
+ },
+ .num_resources = 1,
+ .resource = &ixdp2351_flash_resource,
+};
+
static void __init ixdp2351_init(void)
{
- physmap_configure(0x90000000, 0x04000000, 1, NULL);
+ platform_device_register(&ixdp2351_flash);
/*
* Mark flash as writeable
diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c
index 43c14e7..b9f5d13 100644
--- a/arch/arm/mach-ixp23xx/roadrunner.c
+++ b/arch/arm/mach-ixp23xx/roadrunner.c
@@ -137,9 +137,29 @@
subsys_initcall(roadrunner_pci_init);
+static struct physmap_flash_data roadrunner_flash_data = {
+ .width = 2,
+};
+
+static struct resource roadrunner_flash_resource = {
+ .start = 0x90000000,
+ .end = 0x94000000,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device roadrunner_flash = {
+ .name = "physmap-flash",
+ .id = 0,
+ .dev = {
+ .platform_data = &roadrunner_flash_data,
+ },
+ .num_resources = 1,
+ .resource = &roadrunner_flash_resource,
+};
+
static void __init roadrunner_init(void)
{
- physmap_configure(0x90000000, 0x04000000, 2, NULL);
+ platform_device_register(&roadrunner_flash);
/*
* Mark flash as writeable
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 00b761f..bf25a76 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -276,7 +276,7 @@
/*
* Catch up with the real idea of time
*/
- while ((*IXP4XX_OSTS - last_jiffy_time) > LATCH) {
+ while ((signed long)(*IXP4XX_OSTS - last_jiffy_time) >= LATCH) {
timer_tick(regs);
last_jiffy_time += LATCH;
}
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c
index a3b4c6a..9a31444 100644
--- a/arch/arm/mach-ixp4xx/nas100d-setup.c
+++ b/arch/arm/mach-ixp4xx/nas100d-setup.c
@@ -15,6 +15,7 @@
#include <linux/kernel.h>
#include <linux/serial.h>
#include <linux/serial_8250.h>
+#include <linux/leds.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -37,6 +38,36 @@
.resource = &nas100d_flash_resource,
};
+#ifdef CONFIG_LEDS_IXP4XX
+static struct resource nas100d_led_resources[] = {
+ {
+ .name = "wlan", /* green led */
+ .start = 0,
+ .end = 0,
+ .flags = IXP4XX_GPIO_LOW,
+ },
+ {
+ .name = "ready", /* blue power led (off is flashing!) */
+ .start = 15,
+ .end = 15,
+ .flags = IXP4XX_GPIO_LOW,
+ },
+ {
+ .name = "disk", /* yellow led */
+ .start = 3,
+ .end = 3,
+ .flags = IXP4XX_GPIO_LOW,
+ },
+};
+
+static struct platform_device nas100d_leds = {
+ .name = "IXP4XX-GPIO-LED",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(nas100d_led_resources),
+ .resource = nas100d_led_resources,
+};
+#endif
+
static struct ixp4xx_i2c_pins nas100d_i2c_gpio_pins = {
.sda_pin = NAS100D_SDA_PIN,
.scl_pin = NAS100D_SCL_PIN,
@@ -95,7 +126,9 @@
static struct platform_device *nas100d_devices[] __initdata = {
&nas100d_i2c_controller,
&nas100d_flash,
- &nas100d_uart,
+#ifdef CONFIG_LEDS_IXP4XX
+ &nas100d_leds,
+#endif
};
static void nas100d_power_off(void)
@@ -122,6 +155,12 @@
pm_power_off = nas100d_power_off;
+ /* This is only useful on a modified machine, but it is valuable
+ * to have it first in order to see debug messages, and so that
+ * it does *not* get removed if platform_add_devices fails!
+ */
+ (void)platform_device_register(&nas100d_uart);
+
platform_add_devices(nas100d_devices, ARRAY_SIZE(nas100d_devices));
}
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c
index 55411f2..749a337 100644
--- a/arch/arm/mach-ixp4xx/nslu2-setup.c
+++ b/arch/arm/mach-ixp4xx/nslu2-setup.c
@@ -7,6 +7,7 @@
* Copyright (C) 2003-2004 MontaVista Software, Inc.
*
* Author: Mark Rakes <mrakes at mac.com>
+ * Author: Rod Whitby <rod@whitby.id.au>
* Maintainers: http://www.nslu2-linux.org/
*
* Fixed missing init_time in MACHINE_START kas11 10/22/04
@@ -16,6 +17,7 @@
#include <linux/kernel.h>
#include <linux/serial.h>
#include <linux/serial_8250.h>
+#include <linux/leds.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -43,6 +45,42 @@
.scl_pin = NSLU2_SCL_PIN,
};
+#ifdef CONFIG_LEDS_IXP4XX
+static struct resource nslu2_led_resources[] = {
+ {
+ .name = "ready", /* green led */
+ .start = NSLU2_LED_GRN,
+ .end = NSLU2_LED_GRN,
+ .flags = IXP4XX_GPIO_HIGH,
+ },
+ {
+ .name = "status", /* red led */
+ .start = NSLU2_LED_RED,
+ .end = NSLU2_LED_RED,
+ .flags = IXP4XX_GPIO_HIGH,
+ },
+ {
+ .name = "disk-1",
+ .start = NSLU2_LED_DISK1,
+ .end = NSLU2_LED_DISK1,
+ .flags = IXP4XX_GPIO_LOW,
+ },
+ {
+ .name = "disk-2",
+ .start = NSLU2_LED_DISK2,
+ .end = NSLU2_LED_DISK2,
+ .flags = IXP4XX_GPIO_LOW,
+ },
+};
+
+static struct platform_device nslu2_leds = {
+ .name = "IXP4XX-GPIO-LED",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(nslu2_led_resources),
+ .resource = nslu2_led_resources,
+};
+#endif
+
static struct platform_device nslu2_i2c_controller = {
.name = "IXP4XX-I2C",
.id = 0,
@@ -102,8 +140,10 @@
static struct platform_device *nslu2_devices[] __initdata = {
&nslu2_i2c_controller,
&nslu2_flash,
- &nslu2_uart,
&nslu2_beeper,
+#ifdef CONFIG_LEDS_IXP4XX
+ &nslu2_leds,
+#endif
};
static void nslu2_power_off(void)
@@ -127,6 +167,12 @@
pm_power_off = nslu2_power_off;
+ /* This is only useful on a modified machine, but it is valuable
+ * to have it first in order to see debug messages, and so that
+ * it does *not* get removed if platform_add_devices fails!
+ */
+ (void)platform_device_register(&nslu2_uart);
+
platform_add_devices(nslu2_devices, ARRAY_SIZE(nslu2_devices));
}
diff --git a/arch/arm/mach-pnx4008/clock.c b/arch/arm/mach-pnx4008/clock.c
index 285b22f..f582ed2 100644
--- a/arch/arm/mach-pnx4008/clock.c
+++ b/arch/arm/mach-pnx4008/clock.c
@@ -767,6 +767,54 @@
&uart6_ck,
};
+static int local_clk_enable(struct clk *clk)
+{
+ int ret = 0;
+
+ if (!(clk->flags & FIXED_RATE) && !clk->rate && clk->set_rate
+ && clk->user_rate)
+ ret = clk->set_rate(clk, clk->user_rate);
+ return ret;
+}
+
+static void local_clk_disable(struct clk *clk)
+{
+ if (!(clk->flags & FIXED_RATE) && clk->rate && clk->set_rate)
+ clk->set_rate(clk, 0);
+}
+
+static void local_clk_unuse(struct clk *clk)
+{
+ if (clk->usecount > 0 && !(--clk->usecount)) {
+ local_clk_disable(clk);
+ if (clk->parent)
+ local_clk_unuse(clk->parent);
+ }
+}
+
+static int local_clk_use(struct clk *clk)
+{
+ int ret = 0;
+ if (clk->usecount++ == 0) {
+ if (clk->parent)
+ ret = local_clk_use(clk->parent);
+
+ if (ret != 0) {
+ clk->usecount--;
+ goto out;
+ }
+
+ ret = local_clk_enable(clk);
+
+ if (ret != 0 && clk->parent) {
+ local_clk_unuse(clk->parent);
+ clk->usecount--;
+ }
+ }
+out:
+ return ret;
+}
+
static int local_set_rate(struct clk *clk, u32 rate)
{
int ret = -EINVAL;
@@ -847,28 +895,12 @@
}
EXPORT_SYMBOL(clk_get_rate);
-static int local_clk_enable(struct clk *clk)
-{
- int ret = 0;
-
- if (!(clk->flags & FIXED_RATE) && !clk->rate && clk->set_rate
- && clk->user_rate)
- ret = clk->set_rate(clk, clk->user_rate);
- return ret;
-}
-
-static void local_clk_disable(struct clk *clk)
-{
- if (!(clk->flags & FIXED_RATE) && clk->rate && clk->set_rate)
- clk->set_rate(clk, 0);
-}
-
int clk_enable(struct clk *clk)
{
int ret = 0;
clock_lock();
- ret = local_clk_enable(clk);
+ ret = local_clk_use(clk);
clock_unlock();
return ret;
}
@@ -878,70 +910,11 @@
void clk_disable(struct clk *clk)
{
clock_lock();
- local_clk_disable(clk);
- clock_unlock();
-}
-
-EXPORT_SYMBOL(clk_disable);
-
-static void local_clk_unuse(struct clk *clk)
-{
- if (clk->usecount > 0 && !(--clk->usecount)) {
- local_clk_disable(clk);
- if (clk->parent)
- local_clk_unuse(clk->parent);
- }
-}
-
-static int local_clk_use(struct clk *clk)
-{
- int ret = 0;
- if (clk->usecount++ == 0) {
- if (clk->parent)
- ret = local_clk_use(clk->parent);
-
- if (ret != 0) {
- clk->usecount--;
- goto out;
- }
-
- ret = local_clk_enable(clk);
-
- if (ret != 0 && clk->parent) {
- local_clk_unuse(clk->parent);
- clk->usecount--;
- }
- }
-out:
- return ret;
-}
-
-/* The main purpose of clk_use ans clk_unuse functions
- * is to control switching 13MHz oscillator and PLL1 (13'MHz),
- * so that they are disabled whenever none of PLL2-5 is using them.
- * Although in theory these functions should work with any clock,
- * please use them only on PLL2 - PLL5 to avoid confusion.
- */
-int clk_use(struct clk *clk)
-{
- int ret = 0;
-
- clock_lock();
- ret = local_clk_use(clk);
- clock_unlock();
- return ret;
-}
-EXPORT_SYMBOL(clk_use);
-
-void clk_unuse(struct clk *clk)
-{
-
- clock_lock();
local_clk_unuse(clk);
clock_unlock();
}
-EXPORT_SYMBOL(clk_unuse);
+EXPORT_SYMBOL(clk_disable);
long clk_round_rate(struct clk *clk, unsigned long rate)
{
@@ -995,7 +968,7 @@
__FUNCTION__, (*clkp)->name, (*clkp)->rate);
}
- clk_use(&ck_pll4);
+ local_clk_use(&ck_pll4);
/* if ck_13MHz is not used, disable it. */
if (ck_13MHz.usecount == 0)
diff --git a/arch/arm/mach-pnx4008/serial.c b/arch/arm/mach-pnx4008/serial.c
index 1032238..95a1b3f9 100644
--- a/arch/arm/mach-pnx4008/serial.c
+++ b/arch/arm/mach-pnx4008/serial.c
@@ -20,7 +20,7 @@
#include <linux/serial_core.h>
#include <linux/serial_reg.h>
-#include <asm/arch/pm.h>
+#include <asm/arch/gpio.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index 0c33413..7b786d7 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -114,9 +114,15 @@
endmenu
+config S3C2410_CLOCK
+ bool
+ help
+ Clock code for the S3C2410, and similar processors
+
config CPU_S3C2410
bool
depends on ARCH_S3C2410
+ select S3C2410_CLOCK
help
Support for S3C2410 and S3C2410A family from the S3C24XX line
of Samsung Mobile CPUs.
@@ -130,6 +136,7 @@
config CPU_S3C2440
bool
depends on ARCH_S3C2410
+ select S3C2410_CLOCK
select CPU_S3C244X
help
Support for S3C2440 Samsung Mobile CPU based systems.
@@ -137,6 +144,7 @@
config CPU_S3C2442
bool
depends on ARCH_S3C2420
+ select S3C2410_CLOCK
select CPU_S3C244X
help
Support for S3C2442 Samsung Mobile CPU based systems.
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile
index 5e09355..372dbce 100644
--- a/arch/arm/mach-s3c2410/Makefile
+++ b/arch/arm/mach-s3c2410/Makefile
@@ -29,6 +29,10 @@
obj-$(CONFIG_CPU_S3C244X) += s3c244x.o
obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o
+# Clock control
+
+obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o
+
# S3C2440 support
obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o
diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c
index 99d1746..c5c93c3 100644
--- a/arch/arm/mach-s3c2410/clock.c
+++ b/arch/arm/mach-s3c2410/clock.c
@@ -3,7 +3,7 @@
* Copyright (c) 2004-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
- * S3C2410 Clock control support
+ * S3C24XX Core clock control support
*
* Based on, and code from linux/arch/arm/mach-versatile/clock.c
**
@@ -56,25 +56,6 @@
DEFINE_MUTEX(clocks_mutex);
-/* old functions */
-
-void inline s3c24xx_clk_enable(unsigned int clocks, unsigned int enable)
-{
- unsigned long clkcon;
-
- clkcon = __raw_readl(S3C2410_CLKCON);
-
- if (enable)
- clkcon |= clocks;
- else
- clkcon &= ~clocks;
-
- /* ensure none of the special function bits set */
- clkcon &= ~(S3C2410_CLKCON_IDLE|S3C2410_CLKCON_POWER | 3);
-
- __raw_writel(clkcon, S3C2410_CLKCON);
-}
-
/* enable and disable calls for use with the clk struct */
static int clk_null_enable(struct clk *clk, int enable)
@@ -82,12 +63,6 @@
return 0;
}
-int s3c24xx_clkcon_enable(struct clk *clk, int enable)
-{
- s3c24xx_clk_enable(clk->ctrlbit, enable);
- return 0;
-}
-
/* Clock API calls */
struct clk *clk_get(struct device *dev, const char *id)
@@ -173,8 +148,11 @@
if (clk->rate != 0)
return clk->rate;
- while (clk->parent != NULL && clk->rate == 0)
- clk = clk->parent;
+ if (clk->get_rate != NULL)
+ return (clk->get_rate)(clk);
+
+ if (clk->parent != NULL)
+ return clk_get_rate(clk->parent);
return clk->rate;
}
@@ -233,28 +211,6 @@
EXPORT_SYMBOL(clk_get_parent);
EXPORT_SYMBOL(clk_set_parent);
-/* base clock enable */
-
-static int s3c24xx_upll_enable(struct clk *clk, int enable)
-{
- unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW);
- unsigned long orig = clkslow;
-
- if (enable)
- clkslow &= ~S3C2410_CLKSLOW_UCLK_OFF;
- else
- clkslow |= S3C2410_CLKSLOW_UCLK_OFF;
-
- __raw_writel(clkslow, S3C2410_CLKSLOW);
-
- /* if we started the UPLL, then allow to settle */
-
- if (enable && (orig & S3C2410_CLKSLOW_UCLK_OFF))
- udelay(200);
-
- return 0;
-}
-
/* base clocks */
static struct clk clk_xtal = {
@@ -265,15 +221,14 @@
.ctrlbit = 0,
};
-static struct clk clk_upll = {
+struct clk clk_upll = {
.name = "upll",
.id = -1,
.parent = NULL,
- .enable = s3c24xx_upll_enable,
.ctrlbit = 0,
};
-static struct clk clk_f = {
+struct clk clk_f = {
.name = "fclk",
.id = -1,
.rate = 0,
@@ -281,7 +236,7 @@
.ctrlbit = 0,
};
-static struct clk clk_h = {
+struct clk clk_h = {
.name = "hclk",
.id = -1,
.rate = 0,
@@ -289,7 +244,7 @@
.ctrlbit = 0,
};
-static struct clk clk_p = {
+struct clk clk_p = {
.name = "pclk",
.id = -1,
.rate = 0,
@@ -426,108 +381,6 @@
.id = -1,
};
-
-/* standard clock definitions */
-
-static struct clk init_clocks[] = {
- {
- .name = "nand",
- .id = -1,
- .parent = &clk_h,
- .enable = s3c24xx_clkcon_enable,
- .ctrlbit = S3C2410_CLKCON_NAND,
- }, {
- .name = "lcd",
- .id = -1,
- .parent = &clk_h,
- .enable = s3c24xx_clkcon_enable,
- .ctrlbit = S3C2410_CLKCON_LCDC,
- }, {
- .name = "usb-host",
- .id = -1,
- .parent = &clk_h,
- .enable = s3c24xx_clkcon_enable,
- .ctrlbit = S3C2410_CLKCON_USBH,
- }, {
- .name = "usb-device",
- .id = -1,
- .parent = &clk_h,
- .enable = s3c24xx_clkcon_enable,
- .ctrlbit = S3C2410_CLKCON_USBD,
- }, {
- .name = "timers",
- .id = -1,
- .parent = &clk_p,
- .enable = s3c24xx_clkcon_enable,
- .ctrlbit = S3C2410_CLKCON_PWMT,
- }, {
- .name = "sdi",
- .id = -1,
- .parent = &clk_p,
- .enable = s3c24xx_clkcon_enable,
- .ctrlbit = S3C2410_CLKCON_SDI,
- }, {
- .name = "uart",
- .id = 0,
- .parent = &clk_p,
- .enable = s3c24xx_clkcon_enable,
- .ctrlbit = S3C2410_CLKCON_UART0,
- }, {
- .name = "uart",
- .id = 1,
- .parent = &clk_p,
- .enable = s3c24xx_clkcon_enable,
- .ctrlbit = S3C2410_CLKCON_UART1,
- }, {
- .name = "uart",
- .id = 2,
- .parent = &clk_p,
- .enable = s3c24xx_clkcon_enable,
- .ctrlbit = S3C2410_CLKCON_UART2,
- }, {
- .name = "gpio",
- .id = -1,
- .parent = &clk_p,
- .enable = s3c24xx_clkcon_enable,
- .ctrlbit = S3C2410_CLKCON_GPIO,
- }, {
- .name = "rtc",
- .id = -1,
- .parent = &clk_p,
- .enable = s3c24xx_clkcon_enable,
- .ctrlbit = S3C2410_CLKCON_RTC,
- }, {
- .name = "adc",
- .id = -1,
- .parent = &clk_p,
- .enable = s3c24xx_clkcon_enable,
- .ctrlbit = S3C2410_CLKCON_ADC,
- }, {
- .name = "i2c",
- .id = -1,
- .parent = &clk_p,
- .enable = s3c24xx_clkcon_enable,
- .ctrlbit = S3C2410_CLKCON_IIC,
- }, {
- .name = "iis",
- .id = -1,
- .parent = &clk_p,
- .enable = s3c24xx_clkcon_enable,
- .ctrlbit = S3C2410_CLKCON_IIS,
- }, {
- .name = "spi",
- .id = -1,
- .parent = &clk_p,
- .enable = s3c24xx_clkcon_enable,
- .ctrlbit = S3C2410_CLKCON_SPI,
- }, {
- .name = "watchdog",
- .id = -1,
- .parent = &clk_p,
- .ctrlbit = 0,
- }
-};
-
/* initialise the clock system */
int s3c24xx_register_clock(struct clk *clk)
@@ -537,14 +390,6 @@
if (clk->enable == NULL)
clk->enable = clk_null_enable;
- /* if this is a standard clock, set the usage state */
-
- if (clk->ctrlbit && clk->enable == s3c24xx_clkcon_enable) {
- unsigned long clkcon = __raw_readl(S3C2410_CLKCON);
-
- clk->usage = (clkcon & clk->ctrlbit) ? 1 : 0;
- }
-
/* add to the list of available clocks */
mutex_lock(&clocks_mutex);
@@ -561,44 +406,17 @@
unsigned long hclk,
unsigned long pclk)
{
- unsigned long upllcon = __raw_readl(S3C2410_UPLLCON);
- unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW);
- struct clk *clkp = init_clocks;
- int ptr;
- int ret;
-
- printk(KERN_INFO "S3C2410 Clocks, (c) 2004 Simtec Electronics\n");
+ printk(KERN_INFO "S3C24XX Clocks, (c) 2004 Simtec Electronics\n");
/* initialise the main system clocks */
clk_xtal.rate = xtal;
- clk_upll.rate = s3c2410_get_pll(upllcon, xtal);
+ clk_upll.rate = s3c2410_get_pll(__raw_readl(S3C2410_UPLLCON), xtal);
clk_h.rate = hclk;
clk_p.rate = pclk;
clk_f.rate = fclk;
- /* We must be careful disabling the clocks we are not intending to
- * be using at boot time, as subsytems such as the LCD which do
- * their own DMA requests to the bus can cause the system to lockup
- * if they where in the middle of requesting bus access.
- *
- * Disabling the LCD clock if the LCD is active is very dangerous,
- * and therefore the bootloader should be careful to not enable
- * the LCD clock if it is not needed.
- */
-
- mutex_lock(&clocks_mutex);
-
- s3c24xx_clk_enable(S3C2410_CLKCON_NAND, 0);
- s3c24xx_clk_enable(S3C2410_CLKCON_USBH, 0);
- s3c24xx_clk_enable(S3C2410_CLKCON_USBD, 0);
- s3c24xx_clk_enable(S3C2410_CLKCON_ADC, 0);
- s3c24xx_clk_enable(S3C2410_CLKCON_IIC, 0);
- s3c24xx_clk_enable(S3C2410_CLKCON_SPI, 0);
-
- mutex_unlock(&clocks_mutex);
-
/* assume uart clocks are correctly setup */
/* register our clocks */
@@ -618,27 +436,5 @@
if (s3c24xx_register_clock(&clk_p) < 0)
printk(KERN_ERR "failed to register cpu pclk\n");
-
- if (s3c24xx_register_clock(&clk_usb_bus) < 0)
- printk(KERN_ERR "failed to register usb bus clock\n");
-
- /* register clocks from clock array */
-
- for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) {
- ret = s3c24xx_register_clock(clkp);
- if (ret < 0) {
- printk(KERN_ERR "Failed to register clock %s (%d)\n",
- clkp->name, ret);
- }
- }
-
- /* show the clock-slow value */
-
- printk("CLOCK: Slow mode (%ld.%ld MHz), %s, MPLL %s, UPLL %s\n",
- print_mhz(xtal / ( 2 * S3C2410_CLKSLOW_GET_SLOWVAL(clkslow))),
- (clkslow & S3C2410_CLKSLOW_SLOW) ? "slow" : "fast",
- (clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on",
- (clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on");
-
return 0;
}
diff --git a/arch/arm/mach-s3c2410/clock.h b/arch/arm/mach-s3c2410/clock.h
index 01bb458..9456c81 100644
--- a/arch/arm/mach-s3c2410/clock.h
+++ b/arch/arm/mach-s3c2410/clock.h
@@ -22,6 +22,7 @@
int (*enable)(struct clk *, int enable);
int (*set_rate)(struct clk *c, unsigned long rate);
+ unsigned long (*get_rate)(struct clk *c);
unsigned long (*round_rate)(struct clk *c, unsigned long rate);
int (*set_parent)(struct clk *c, struct clk *parent);
};
@@ -36,6 +37,13 @@
extern struct clk clk_usb_bus;
+/* core clock support */
+
+extern struct clk clk_f;
+extern struct clk clk_h;
+extern struct clk clk_p;
+extern struct clk clk_upll;
+
/* exports for arch/arm/mach-s3c2410
*
* Please DO NOT use these outside of arch/arm/mach-s3c2410
@@ -43,7 +51,8 @@
extern struct mutex clocks_mutex;
-extern int s3c24xx_clkcon_enable(struct clk *clk, int enable);
+extern int s3c2410_clkcon_enable(struct clk *clk, int enable);
+
extern int s3c24xx_register_clock(struct clk *clk);
extern int s3c24xx_setup_clocks(unsigned long xtal,
diff --git a/arch/arm/mach-s3c2410/cpu.h b/arch/arm/mach-s3c2410/cpu.h
index 4086289..21c62dc 100644
--- a/arch/arm/mach-s3c2410/cpu.h
+++ b/arch/arm/mach-s3c2410/cpu.h
@@ -73,5 +73,6 @@
/* system device classes */
+extern struct sysdev_class s3c2410_sysclass;
extern struct sysdev_class s3c2440_sysclass;
extern struct sysdev_class s3c2442_sysclass;
diff --git a/arch/arm/mach-s3c2410/s3c2410-clock.c b/arch/arm/mach-s3c2410/s3c2410-clock.c
new file mode 100644
index 0000000..fd17c60
--- /dev/null
+++ b/arch/arm/mach-s3c2410/s3c2410-clock.c
@@ -0,0 +1,263 @@
+/* linux/arch/arm/mach-s3c2410/clock.c
+ *
+ * Copyright (c) 2006 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C2410,S3C2440,S3C2442 Clock control support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/sysdev.h>
+#include <linux/clk.h>
+#include <linux/mutex.h>
+#include <linux/delay.h>
+
+#include <asm/hardware.h>
+#include <asm/io.h>
+
+#include <asm/arch/regs-clock.h>
+#include <asm/arch/regs-gpio.h>
+
+#include "clock.h"
+#include "cpu.h"
+
+int s3c2410_clkcon_enable(struct clk *clk, int enable)
+{
+ unsigned int clocks = clk->ctrlbit;
+ unsigned long clkcon;
+
+ clkcon = __raw_readl(S3C2410_CLKCON);
+
+ if (enable)
+ clkcon |= clocks;
+ else
+ clkcon &= ~clocks;
+
+ /* ensure none of the special function bits set */
+ clkcon &= ~(S3C2410_CLKCON_IDLE|S3C2410_CLKCON_POWER);
+
+ __raw_writel(clkcon, S3C2410_CLKCON);
+
+ return 0;
+}
+
+static int s3c2410_upll_enable(struct clk *clk, int enable)
+{
+ unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW);
+ unsigned long orig = clkslow;
+
+ if (enable)
+ clkslow &= ~S3C2410_CLKSLOW_UCLK_OFF;
+ else
+ clkslow |= S3C2410_CLKSLOW_UCLK_OFF;
+
+ __raw_writel(clkslow, S3C2410_CLKSLOW);
+
+ /* if we started the UPLL, then allow to settle */
+
+ if (enable && (orig & S3C2410_CLKSLOW_UCLK_OFF))
+ udelay(200);
+
+ return 0;
+}
+
+/* standard clock definitions */
+
+static struct clk init_clocks_disable[] = {
+ {
+ .name = "nand",
+ .id = -1,
+ .parent = &clk_h,
+ .enable = s3c2410_clkcon_enable,
+ .ctrlbit = S3C2410_CLKCON_NAND,
+ }, {
+ .name = "sdi",
+ .id = -1,
+ .parent = &clk_p,
+ .enable = s3c2410_clkcon_enable,
+ .ctrlbit = S3C2410_CLKCON_SDI,
+ }, {
+ .name = "adc",
+ .id = -1,
+ .parent = &clk_p,
+ .enable = s3c2410_clkcon_enable,
+ .ctrlbit = S3C2410_CLKCON_ADC,
+ }, {
+ .name = "i2c",
+ .id = -1,
+ .parent = &clk_p,
+ .enable = s3c2410_clkcon_enable,
+ .ctrlbit = S3C2410_CLKCON_IIC,
+ }, {
+ .name = "iis",
+ .id = -1,
+ .parent = &clk_p,
+ .enable = s3c2410_clkcon_enable,
+ .ctrlbit = S3C2410_CLKCON_IIS,
+ }, {
+ .name = "spi",
+ .id = -1,
+ .parent = &clk_p,
+ .enable = s3c2410_clkcon_enable,
+ .ctrlbit = S3C2410_CLKCON_SPI,
+ }
+};
+
+static struct clk init_clocks[] = {
+ {
+ .name = "lcd",
+ .id = -1,
+ .parent = &clk_h,
+ .enable = s3c2410_clkcon_enable,
+ .ctrlbit = S3C2410_CLKCON_LCDC,
+ }, {
+ .name = "gpio",
+ .id = -1,
+ .parent = &clk_p,
+ .enable = s3c2410_clkcon_enable,
+ .ctrlbit = S3C2410_CLKCON_GPIO,
+ }, {
+ .name = "usb-host",
+ .id = -1,
+ .parent = &clk_h,
+ .enable = s3c2410_clkcon_enable,
+ .ctrlbit = S3C2410_CLKCON_USBH,
+ }, {
+ .name = "usb-device",
+ .id = -1,
+ .parent = &clk_h,
+ .enable = s3c2410_clkcon_enable,
+ .ctrlbit = S3C2410_CLKCON_USBD,
+ }, {
+ .name = "timers",
+ .id = -1,
+ .parent = &clk_p,
+ .enable = s3c2410_clkcon_enable,
+ .ctrlbit = S3C2410_CLKCON_PWMT,
+ }, {
+ .name = "uart",
+ .id = 0,
+ .parent = &clk_p,
+ .enable = s3c2410_clkcon_enable,
+ .ctrlbit = S3C2410_CLKCON_UART0,
+ }, {
+ .name = "uart",
+ .id = 1,
+ .parent = &clk_p,
+ .enable = s3c2410_clkcon_enable,
+ .ctrlbit = S3C2410_CLKCON_UART1,
+ }, {
+ .name = "uart",
+ .id = 2,
+ .parent = &clk_p,
+ .enable = s3c2410_clkcon_enable,
+ .ctrlbit = S3C2410_CLKCON_UART2,
+ }, {
+ .name = "rtc",
+ .id = -1,
+ .parent = &clk_p,
+ .enable = s3c2410_clkcon_enable,
+ .ctrlbit = S3C2410_CLKCON_RTC,
+ }, {
+ .name = "watchdog",
+ .id = -1,
+ .parent = &clk_p,
+ .ctrlbit = 0,
+ }
+};
+
+/* s3c2410_baseclk_add()
+ *
+ * Add all the clocks used by the s3c2410 or compatible CPUs
+ * such as the S3C2440 and S3C2442.
+ *
+ * We cannot use a system device as we are needed before any
+ * of the init-calls that initialise the devices are actually
+ * done.
+*/
+
+int __init s3c2410_baseclk_add(void)
+{
+ unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW);
+ unsigned long clkcon = __raw_readl(S3C2410_CLKCON);
+ struct clk *clkp;
+ struct clk *xtal;
+ int ret;
+ int ptr;
+
+ clk_upll.enable = s3c2410_upll_enable;
+
+ if (s3c24xx_register_clock(&clk_usb_bus) < 0)
+ printk(KERN_ERR "failed to register usb bus clock\n");
+
+ /* register clocks from clock array */
+
+ clkp = init_clocks;
+ for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) {
+ /* ensure that we note the clock state */
+
+ clkp->usage = clkcon & clkp->ctrlbit ? 1 : 0;
+
+ ret = s3c24xx_register_clock(clkp);
+ if (ret < 0) {
+ printk(KERN_ERR "Failed to register clock %s (%d)\n",
+ clkp->name, ret);
+ }
+ }
+
+ /* We must be careful disabling the clocks we are not intending to
+ * be using at boot time, as subsytems such as the LCD which do
+ * their own DMA requests to the bus can cause the system to lockup
+ * if they where in the middle of requesting bus access.
+ *
+ * Disabling the LCD clock if the LCD is active is very dangerous,
+ * and therefore the bootloader should be careful to not enable
+ * the LCD clock if it is not needed.
+ */
+
+ /* install (and disable) the clocks we do not need immediately */
+
+ clkp = init_clocks_disable;
+ for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
+
+ ret = s3c24xx_register_clock(clkp);
+ if (ret < 0) {
+ printk(KERN_ERR "Failed to register clock %s (%d)\n",
+ clkp->name, ret);
+ }
+
+ s3c2410_clkcon_enable(clkp, 0);
+ }
+
+ /* show the clock-slow value */
+
+ xtal = clk_get(NULL, "xtal");
+
+ printk("CLOCK: Slow mode (%ld.%ld MHz), %s, MPLL %s, UPLL %s\n",
+ print_mhz(clk_get_rate(xtal) /
+ ( 2 * S3C2410_CLKSLOW_GET_SLOWVAL(clkslow))),
+ (clkslow & S3C2410_CLKSLOW_SLOW) ? "slow" : "fast",
+ (clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on",
+ (clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on");
+
+ return 0;
+}
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
index 0852e87..a110cff 100644
--- a/arch/arm/mach-s3c2410/s3c2410.c
+++ b/arch/arm/mach-s3c2410/s3c2410.c
@@ -27,6 +27,7 @@
#include <linux/list.h>
#include <linux/timer.h>
#include <linux/init.h>
+#include <linux/sysdev.h>
#include <linux/platform_device.h>
#include <asm/mach/arch.h>
@@ -108,11 +109,33 @@
*/
s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
+ s3c2410_baseclk_add();
}
+struct sysdev_class s3c2410_sysclass = {
+ set_kset_name("s3c2410-core"),
+};
+
+static struct sys_device s3c2410_sysdev = {
+ .cls = &s3c2410_sysclass,
+};
+
+/* need to register class before we actually register the device, and
+ * we also need to ensure that it has been initialised before any of the
+ * drivers even try to use it (even if not on an s3c2440 based system)
+ * as a driver which may support both 2410 and 2440 may try and use it.
+*/
+
+static int __init s3c2410_core_init(void)
+{
+ return sysdev_class_register(&s3c2410_sysclass);
+}
+
+core_initcall(s3c2410_core_init);
+
int __init s3c2410_init(void)
{
printk("S3C2410: Initialising architecture\n");
- return 0;
+ return sysdev_register(&s3c2410_sysdev);
}
diff --git a/arch/arm/mach-s3c2410/s3c2410.h b/arch/arm/mach-s3c2410/s3c2410.h
index 4d5312a..73f1a247 100644
--- a/arch/arm/mach-s3c2410/s3c2410.h
+++ b/arch/arm/mach-s3c2410/s3c2410.h
@@ -29,6 +29,8 @@
extern void s3c2410_init_clocks(int xtal);
+extern int s3c2410_baseclk_add(void);
+
#else
#define s3c2410_init_clocks NULL
#define s3c2410_init_uarts NULL
diff --git a/arch/arm/mach-s3c2410/s3c2440-clock.c b/arch/arm/mach-s3c2410/s3c2440-clock.c
index d7a30ed..1579686 100644
--- a/arch/arm/mach-s3c2410/s3c2440-clock.c
+++ b/arch/arm/mach-s3c2410/s3c2440-clock.c
@@ -91,7 +91,7 @@
static struct clk s3c2440_clk_cam = {
.name = "camif",
.id = -1,
- .enable = s3c24xx_clkcon_enable,
+ .enable = s3c2410_clkcon_enable,
.ctrlbit = S3C2440_CLKCON_CAMERA,
};
@@ -105,7 +105,7 @@
static struct clk s3c2440_clk_ac97 = {
.name = "ac97",
.id = -1,
- .enable = s3c24xx_clkcon_enable,
+ .enable = s3c2410_clkcon_enable,
.ctrlbit = S3C2440_CLKCON_CAMERA,
};
diff --git a/arch/arm/mach-s3c2410/s3c2442-clock.c b/arch/arm/mach-s3c2410/s3c2442-clock.c
index 5b7b301..d9f54b5 100644
--- a/arch/arm/mach-s3c2410/s3c2442-clock.c
+++ b/arch/arm/mach-s3c2410/s3c2442-clock.c
@@ -102,7 +102,7 @@
static struct clk s3c2442_clk_cam = {
.name = "camif",
.id = -1,
- .enable = s3c24xx_clkcon_enable,
+ .enable = s3c2410_clkcon_enable,
.ctrlbit = S3C2440_CLKCON_CAMERA,
};
diff --git a/arch/arm/mach-s3c2410/s3c244x.c b/arch/arm/mach-s3c2410/s3c244x.c
index 96852a7..838bc52 100644
--- a/arch/arm/mach-s3c2410/s3c244x.c
+++ b/arch/arm/mach-s3c2410/s3c244x.c
@@ -34,6 +34,7 @@
#include <asm/arch/regs-gpioj.h>
#include <asm/arch/regs-dsc.h>
+#include "s3c2410.h"
#include "s3c2440.h"
#include "s3c244x.h"
#include "clock.h"
@@ -118,6 +119,7 @@
*/
s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
+ s3c2410_baseclk_add();
}
#ifdef CONFIG_PM
diff --git a/arch/arm/nwfpe/fpmodule.c b/arch/arm/nwfpe/fpmodule.c
index 2dfe1ac..7d977d2 100644
--- a/arch/arm/nwfpe/fpmodule.c
+++ b/arch/arm/nwfpe/fpmodule.c
@@ -33,7 +33,8 @@
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/init.h>
-/* XXX */
+
+#include <asm/thread_notify.h>
#include "softfloat.h"
#include "fpopcode.h"
@@ -56,16 +57,28 @@
extern char fpe_type[];
#endif
+static int nwfpe_notify(struct notifier_block *self, unsigned long cmd, void *v)
+{
+ struct thread_info *thread = v;
+
+ if (cmd == THREAD_NOTIFY_FLUSH)
+ nwfpe_init_fpa(&thread->fpstate);
+
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block nwfpe_notifier_block = {
+ .notifier_call = nwfpe_notify,
+};
+
/* kernel function prototypes required */
void fp_setup(void);
/* external declarations for saved kernel symbols */
extern void (*kern_fp_enter)(void);
-extern void (*fp_init)(union fp_state *);
/* Original value of fp_enter from kernel before patched by fpe_init. */
static void (*orig_fp_enter)(void);
-static void (*orig_fp_init)(union fp_state *);
/* forward declarations */
extern void nwfpe_enter(void);
@@ -88,20 +101,20 @@
printk(KERN_WARNING "NetWinder Floating Point Emulator V0.97 ("
NWFPE_BITS " precision)\n");
+ thread_register_notifier(&nwfpe_notifier_block);
+
/* Save pointer to the old FP handler and then patch ourselves in */
orig_fp_enter = kern_fp_enter;
- orig_fp_init = fp_init;
kern_fp_enter = nwfpe_enter;
- fp_init = nwfpe_init_fpa;
return 0;
}
static void __exit fpe_exit(void)
{
+ thread_unregister_notifier(&nwfpe_notifier_block);
/* Restore the values we saved earlier. */
kern_fp_enter = orig_fp_enter;
- fp_init = orig_fp_init;
}
/*
diff --git a/arch/arm/plat-omap/timer32k.c b/arch/arm/plat-omap/timer32k.c
index b2a943b..3461a6c 100644
--- a/arch/arm/plat-omap/timer32k.c
+++ b/arch/arm/plat-omap/timer32k.c
@@ -210,7 +210,8 @@
now = omap_32k_sync_timer_read();
- while (now - omap_32k_last_tick >= OMAP_32K_TICKS_PER_HZ) {
+ while ((signed long)(now - omap_32k_last_tick)
+ >= OMAP_32K_TICKS_PER_HZ) {
omap_32k_last_tick += OMAP_32K_TICKS_PER_HZ;
timer_tick(regs);
}
diff --git a/arch/arm/vfp/Makefile b/arch/arm/vfp/Makefile
index afabac3..7e136e7 100644
--- a/arch/arm/vfp/Makefile
+++ b/arch/arm/vfp/Makefile
@@ -7,6 +7,9 @@
# EXTRA_CFLAGS := -DDEBUG
# EXTRA_AFLAGS := -DDEBUG
+AFLAGS :=$(AFLAGS:-msoft-float=-Wa,-mfpu=softvfp+vfp)
+LDFLAGS +=--no-warn-mismatch
+
obj-y += vfp.o
-vfp-$(CONFIG_VFP) += entry.o vfpmodule.o vfphw.o vfpsingle.o vfpdouble.o
+vfp-$(CONFIG_VFP) += vfpmodule.o entry.o vfphw.o vfpsingle.o vfpdouble.o
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S
index a3f65b4..eb683cd 100644
--- a/arch/arm/vfp/vfphw.S
+++ b/arch/arm/vfp/vfphw.S
@@ -192,7 +192,7 @@
add pc, pc, r0, lsl #3
mov r0, r0
.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
- mrrc p11, 1, r0, r1, c\dr @ fmrrd r0, r1, d\dr
+ fmrrd r0, r1, d\dr
mov pc, lr
.endr
@@ -206,6 +206,6 @@
add pc, pc, r0, lsl #3
mov r0, r0
.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
- mcrr p11, 1, r1, r2, c\dr @ fmdrr r1, r2, d\dr
+ fmdrr d\dr, r1, r2
mov pc, lr
.endr
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index 03486be0..2476f4c 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -15,6 +15,8 @@
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/init.h>
+
+#include <asm/thread_notify.h>
#include <asm/vfp.h>
#include "vfpinstr.h"
@@ -36,37 +38,54 @@
*/
unsigned int VFP_arch;
-/*
- * Per-thread VFP initialisation.
- */
-void vfp_flush_thread(union vfp_state *vfp)
+static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v)
{
- memset(vfp, 0, sizeof(union vfp_state));
+ struct thread_info *thread = v;
+ union vfp_state *vfp = &thread->vfpstate;
- vfp->hard.fpexc = FPEXC_ENABLE;
- vfp->hard.fpscr = FPSCR_ROUND_NEAREST;
+ switch (cmd) {
+ case THREAD_NOTIFY_FLUSH:
+ /*
+ * Per-thread VFP initialisation.
+ */
+ memset(vfp, 0, sizeof(union vfp_state));
- /*
- * Disable VFP to ensure we initialise it first.
- */
- fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_ENABLE);
+ vfp->hard.fpexc = FPEXC_ENABLE;
+ vfp->hard.fpscr = FPSCR_ROUND_NEAREST;
- /*
- * Ensure we don't try to overwrite our newly initialised
- * state information on the first fault.
- */
- if (last_VFP_context == vfp)
- last_VFP_context = NULL;
+ /*
+ * Disable VFP to ensure we initialise it first.
+ */
+ fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_ENABLE);
+
+ /*
+ * FALLTHROUGH: Ensure we don't try to overwrite our newly
+ * initialised state information on the first fault.
+ */
+
+ case THREAD_NOTIFY_RELEASE:
+ /*
+ * Per-thread VFP cleanup.
+ */
+ if (last_VFP_context == vfp)
+ last_VFP_context = NULL;
+ break;
+
+ case THREAD_NOTIFY_SWITCH:
+ /*
+ * Always disable VFP so we can lazily save/restore the
+ * old state.
+ */
+ fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_ENABLE);
+ break;
+ }
+
+ return NOTIFY_DONE;
}
-/*
- * Per-thread VFP cleanup.
- */
-void vfp_release_thread(union vfp_state *vfp)
-{
- if (last_VFP_context == vfp)
- last_VFP_context = NULL;
-}
+static struct notifier_block vfp_notifier_block = {
+ .notifier_call = vfp_notifier,
+};
/*
* Raise a SIGFPE for the current process.
@@ -281,6 +300,8 @@
(vfpsid & FPSID_VARIANT_MASK) >> FPSID_VARIANT_BIT,
(vfpsid & FPSID_REV_MASK) >> FPSID_REV_BIT);
vfp_vector = vfp_support_entry;
+
+ thread_register_notifier(&vfp_notifier_block);
}
return 0;
}
diff --git a/drivers/mmc/at91_mci.c b/drivers/mmc/at91_mci.c
index 88f0eef..3228516 100644
--- a/drivers/mmc/at91_mci.c
+++ b/drivers/mmc/at91_mci.c
@@ -81,13 +81,6 @@
#undef SUPPORT_4WIRE
-#ifdef CONFIG_MMC_DEBUG
-#define DBG(fmt...) \
- printk(fmt)
-#else
-#define DBG(fmt...) do { } while (0)
-#endif
-
static struct clk *mci_clk;
#define FL_SENT_COMMAND (1 << 0)
@@ -202,50 +195,50 @@
struct mmc_command *cmd;
struct mmc_data *data;
- DBG("pre dma read\n");
+ pr_debug("pre dma read\n");
cmd = host->cmd;
if (!cmd) {
- DBG("no command\n");
+ pr_debug("no command\n");
return;
}
data = cmd->data;
if (!data) {
- DBG("no data\n");
+ pr_debug("no data\n");
return;
}
for (i = 0; i < 2; i++) {
/* nothing left to transfer */
if (host->transfer_index >= data->sg_len) {
- DBG("Nothing left to transfer (index = %d)\n", host->transfer_index);
+ pr_debug("Nothing left to transfer (index = %d)\n", host->transfer_index);
break;
}
/* Check to see if this needs filling */
if (i == 0) {
if (at91_mci_read(AT91_PDC_RCR) != 0) {
- DBG("Transfer active in current\n");
+ pr_debug("Transfer active in current\n");
continue;
}
}
else {
if (at91_mci_read(AT91_PDC_RNCR) != 0) {
- DBG("Transfer active in next\n");
+ pr_debug("Transfer active in next\n");
continue;
}
}
/* Setup the next transfer */
- DBG("Using transfer index %d\n", host->transfer_index);
+ pr_debug("Using transfer index %d\n", host->transfer_index);
sg = &data->sg[host->transfer_index++];
- DBG("sg = %p\n", sg);
+ pr_debug("sg = %p\n", sg);
sg->dma_address = dma_map_page(NULL, sg->page, sg->offset, sg->length, DMA_FROM_DEVICE);
- DBG("dma address = %08X, length = %d\n", sg->dma_address, sg->length);
+ pr_debug("dma address = %08X, length = %d\n", sg->dma_address, sg->length);
if (i == 0) {
at91_mci_write(AT91_PDC_RPR, sg->dma_address);
@@ -257,7 +250,7 @@
}
}
- DBG("pre dma read done\n");
+ pr_debug("pre dma read done\n");
}
/*
@@ -268,17 +261,17 @@
struct mmc_command *cmd;
struct mmc_data *data;
- DBG("post dma read\n");
+ pr_debug("post dma read\n");
cmd = host->cmd;
if (!cmd) {
- DBG("no command\n");
+ pr_debug("no command\n");
return;
}
data = cmd->data;
if (!data) {
- DBG("no data\n");
+ pr_debug("no data\n");
return;
}
@@ -289,17 +282,17 @@
struct scatterlist *sg;
- DBG("finishing index %d\n", host->in_use_index);
+ pr_debug("finishing index %d\n", host->in_use_index);
sg = &data->sg[host->in_use_index++];
- DBG("Unmapping page %08X\n", sg->dma_address);
+ pr_debug("Unmapping page %08X\n", sg->dma_address);
dma_unmap_page(NULL, sg->dma_address, sg->length, DMA_FROM_DEVICE);
/* Swap the contents of the buffer */
buffer = kmap_atomic(sg->page, KM_BIO_SRC_IRQ) + sg->offset;
- DBG("buffer = %p, length = %d\n", buffer, sg->length);
+ pr_debug("buffer = %p, length = %d\n", buffer, sg->length);
data->bytes_xfered += sg->length;
@@ -320,7 +313,7 @@
at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS);
}
- DBG("post dma read done\n");
+ pr_debug("post dma read done\n");
}
/*
@@ -331,7 +324,7 @@
struct mmc_command *cmd;
struct mmc_data *data;
- DBG("Handling the transmit\n");
+ pr_debug("Handling the transmit\n");
/* Disable the transfer */
at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS);
@@ -387,12 +380,12 @@
/* Not sure if this is needed */
#if 0
if ((at91_mci_read(AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) {
- DBG("Clearing timeout\n");
+ pr_debug("Clearing timeout\n");
at91_mci_write(AT91_MCI_ARGR, 0);
at91_mci_write(AT91_MCI_CMDR, AT91_MCI_OPDCMD);
while (!(at91_mci_read(AT91_MCI_SR) & AT91_MCI_CMDRDY)) {
/* spin */
- DBG("Clearing: SR = %08X\n", at91_mci_read(AT91_MCI_SR));
+ pr_debug("Clearing: SR = %08X\n", at91_mci_read(AT91_MCI_SR));
}
}
#endif
@@ -411,7 +404,7 @@
}
if (data) {
- block_length = 1 << data->blksz_bits;
+ block_length = data->blksz;
blocks = data->blocks;
/* always set data start - also set direction flag for read */
@@ -439,7 +432,7 @@
/*
* Set the arguments and send the command
*/
- DBG("Sending command %d as %08X, arg = %08X, blocks = %d, length = %d (MR = %08lX)\n",
+ pr_debug("Sending command %d as %08X, arg = %08X, blocks = %d, length = %d (MR = %08lX)\n",
cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(AT91_MCI_MR));
if (!data) {
@@ -491,7 +484,7 @@
at91mci_sg_to_dma(host, data);
- DBG("Transmitting %d bytes\n", host->total_length);
+ pr_debug("Transmitting %d bytes\n", host->total_length);
at91_mci_write(AT91_PDC_TPR, host->physical_address);
at91_mci_write(AT91_PDC_TCR, host->total_length / 4);
@@ -525,7 +518,7 @@
ier = at91_mci_send_command(host, cmd);
- DBG("setting ier to %08X\n", ier);
+ pr_debug("setting ier to %08X\n", ier);
/* Stop on errors or the required value */
at91_mci_write(AT91_MCI_IER, 0xffff0000 | ier);
@@ -570,7 +563,7 @@
status = at91_mci_read(AT91_MCI_SR);
- DBG("Status = %08X [%08X %08X %08X %08X]\n",
+ pr_debug("Status = %08X [%08X %08X %08X %08X]\n",
status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
if (status & (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE |
@@ -590,7 +583,7 @@
else
cmd->error = MMC_ERR_FAILED;
- DBG("Error detected and set to %d (cmd = %d, retries = %d)\n",
+ pr_debug("Error detected and set to %d (cmd = %d, retries = %d)\n",
cmd->error, cmd->opcode, cmd->retries);
}
}
@@ -621,10 +614,7 @@
struct at91mci_host *host = mmc_priv(mmc);
unsigned long at91_master_clock = clk_get_rate(mci_clk);
- if (host)
- host->bus_mode = ios->bus_mode;
- else
- printk("MMC: No host for bus_mode\n");
+ host->bus_mode = ios->bus_mode;
if (ios->clock == 0) {
/* Disable the MCI controller */
@@ -640,15 +630,15 @@
else
clkdiv = (at91_master_clock / ios->clock) / 2;
- DBG("clkdiv = %d. mcck = %ld\n", clkdiv,
+ pr_debug("clkdiv = %d. mcck = %ld\n", clkdiv,
at91_master_clock / (2 * (clkdiv + 1)));
}
if (ios->bus_width == MMC_BUS_WIDTH_4 && host->board->wire4) {
- DBG("MMC: Setting controller bus width to 4\n");
+ pr_debug("MMC: Setting controller bus width to 4\n");
at91_mci_write(AT91_MCI_SDCR, at91_mci_read(AT91_MCI_SDCR) | AT91_MCI_SDCBUS);
}
else {
- DBG("MMC: Setting controller bus width to 1\n");
+ pr_debug("MMC: Setting controller bus width to 1\n");
at91_mci_write(AT91_MCI_SDCR, at91_mci_read(AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);
}
@@ -656,7 +646,7 @@
at91_mci_write(AT91_MCI_MR, (at91_mci_read(AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv);
/* maybe switch power to the card */
- if (host && host->board->vcc_pin) {
+ if (host->board->vcc_pin) {
switch (ios->power_mode) {
case MMC_POWER_OFF:
at91_set_gpio_output(host->board->vcc_pin, 0);
@@ -679,11 +669,8 @@
unsigned int int_status;
- if (host == NULL)
- return IRQ_HANDLED;
-
int_status = at91_mci_read(AT91_MCI_SR);
- DBG("MCI irq: status = %08X, %08lX, %08lX\n", int_status, at91_mci_read(AT91_MCI_IMR),
+ pr_debug("MCI irq: status = %08X, %08lX, %08lX\n", int_status, at91_mci_read(AT91_MCI_IMR),
int_status & at91_mci_read(AT91_MCI_IMR));
if ((int_status & at91_mci_read(AT91_MCI_IMR)) & 0xffff0000)
@@ -692,75 +679,75 @@
int_status &= at91_mci_read(AT91_MCI_IMR);
if (int_status & AT91_MCI_UNRE)
- DBG("MMC: Underrun error\n");
+ pr_debug("MMC: Underrun error\n");
if (int_status & AT91_MCI_OVRE)
- DBG("MMC: Overrun error\n");
+ pr_debug("MMC: Overrun error\n");
if (int_status & AT91_MCI_DTOE)
- DBG("MMC: Data timeout\n");
+ pr_debug("MMC: Data timeout\n");
if (int_status & AT91_MCI_DCRCE)
- DBG("MMC: CRC error in data\n");
+ pr_debug("MMC: CRC error in data\n");
if (int_status & AT91_MCI_RTOE)
- DBG("MMC: Response timeout\n");
+ pr_debug("MMC: Response timeout\n");
if (int_status & AT91_MCI_RENDE)
- DBG("MMC: Response end bit error\n");
+ pr_debug("MMC: Response end bit error\n");
if (int_status & AT91_MCI_RCRCE)
- DBG("MMC: Response CRC error\n");
+ pr_debug("MMC: Response CRC error\n");
if (int_status & AT91_MCI_RDIRE)
- DBG("MMC: Response direction error\n");
+ pr_debug("MMC: Response direction error\n");
if (int_status & AT91_MCI_RINDE)
- DBG("MMC: Response index error\n");
+ pr_debug("MMC: Response index error\n");
/* Only continue processing if no errors */
if (!completed) {
if (int_status & AT91_MCI_TXBUFE) {
- DBG("TX buffer empty\n");
+ pr_debug("TX buffer empty\n");
at91_mci_handle_transmitted(host);
}
if (int_status & AT91_MCI_RXBUFF) {
- DBG("RX buffer full\n");
+ pr_debug("RX buffer full\n");
at91_mci_write(AT91_MCI_IER, AT91_MCI_CMDRDY);
}
if (int_status & AT91_MCI_ENDTX) {
- DBG("Transmit has ended\n");
+ pr_debug("Transmit has ended\n");
}
if (int_status & AT91_MCI_ENDRX) {
- DBG("Receive has ended\n");
+ pr_debug("Receive has ended\n");
at91mci_post_dma_read(host);
}
if (int_status & AT91_MCI_NOTBUSY) {
- DBG("Card is ready\n");
+ pr_debug("Card is ready\n");
at91_mci_write(AT91_MCI_IER, AT91_MCI_CMDRDY);
}
if (int_status & AT91_MCI_DTIP) {
- DBG("Data transfer in progress\n");
+ pr_debug("Data transfer in progress\n");
}
if (int_status & AT91_MCI_BLKE) {
- DBG("Block transfer has ended\n");
+ pr_debug("Block transfer has ended\n");
}
if (int_status & AT91_MCI_TXRDY) {
- DBG("Ready to transmit\n");
+ pr_debug("Ready to transmit\n");
}
if (int_status & AT91_MCI_RXRDY) {
- DBG("Ready to receive\n");
+ pr_debug("Ready to receive\n");
}
if (int_status & AT91_MCI_CMDRDY) {
- DBG("Command ready\n");
+ pr_debug("Command ready\n");
completed = 1;
}
}
at91_mci_write(AT91_MCI_IDR, int_status);
if (completed) {
- DBG("Completed command\n");
+ pr_debug("Completed command\n");
at91_mci_write(AT91_MCI_IDR, 0xffffffff);
at91mci_completed_command(host);
}
@@ -779,10 +766,10 @@
*/
if (present != host->present) {
host->present = present;
- DBG("%s: card %s\n", mmc_hostname(host->mmc),
+ pr_debug("%s: card %s\n", mmc_hostname(host->mmc),
present ? "insert" : "remove");
if (!present) {
- DBG("****** Resetting SD-card bus width ******\n");
+ pr_debug("****** Resetting SD-card bus width ******\n");
at91_mci_write(AT91_MCI_SDCR, 0);
}
mmc_detect_change(host->mmc, msecs_to_jiffies(100));
@@ -822,13 +809,13 @@
struct at91mci_host *host;
int ret;
- DBG("Probe MCI devices\n");
+ pr_debug("Probe MCI devices\n");
at91_mci_disable();
at91_mci_enable();
mmc = mmc_alloc_host(sizeof(struct at91mci_host), &pdev->dev);
if (!mmc) {
- DBG("Failed to allocate mmc host\n");
+ pr_debug("Failed to allocate mmc host\n");
return -ENOMEM;
}
@@ -854,8 +841,9 @@
* Get Clock
*/
mci_clk = clk_get(&pdev->dev, "mci_clk");
- if (!mci_clk) {
+ if (IS_ERR(mci_clk)) {
printk(KERN_ERR "AT91 MMC: no clock defined.\n");
+ mmc_free_host(mmc);
return -ENODEV;
}
clk_enable(mci_clk); /* Enable the peripheral clock */
@@ -865,7 +853,10 @@
*/
ret = request_irq(AT91_ID_MCI, at91_mci_irq, SA_SHIRQ, DRIVER_NAME, host);
if (ret) {
- DBG("Failed to request MCI interrupt\n");
+ printk(KERN_ERR "Failed to request MCI interrupt\n");
+ clk_disable(mci_clk);
+ clk_put(mci_clk);
+ mmc_free_host(mmc);
return ret;
}
@@ -886,12 +877,12 @@
*/
if (host->board->det_pin) {
ret = request_irq(host->board->det_pin, at91_mmc_det_irq,
- SA_SAMPLE_RANDOM, DRIVER_NAME, host);
+ 0, DRIVER_NAME, host);
if (ret)
- DBG("couldn't allocate MMC detect irq\n");
+ printk(KERN_ERR "couldn't allocate MMC detect irq\n");
}
- DBG(KERN_INFO "Added MCI driver\n");
+ pr_debug(KERN_INFO "Added MCI driver\n");
return 0;
}
@@ -924,7 +915,7 @@
platform_set_drvdata(pdev, NULL);
- DBG("Removed\n");
+ pr_debug("MCI Removed\n");
return 0;
}
diff --git a/drivers/mmc/imxmmc.c b/drivers/mmc/imxmmc.c
index a4eb1d0..5c62f4e 100644
--- a/drivers/mmc/imxmmc.c
+++ b/drivers/mmc/imxmmc.c
@@ -228,7 +228,7 @@
static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data)
{
unsigned int nob = data->blocks;
- unsigned int blksz = 1 << data->blksz_bits;
+ unsigned int blksz = data->blksz;
unsigned int datasz = nob * blksz;
int i;
diff --git a/drivers/mmc/omap.c b/drivers/mmc/omap.c
index becb3c6..c25244b 100644
--- a/drivers/mmc/omap.c
+++ b/drivers/mmc/omap.c
@@ -584,10 +584,10 @@
int sync_dev = 0;
data_addr = io_v2p((u32) host->base) + OMAP_MMC_REG_DATA;
- frame = 1 << data->blksz_bits;
+ frame = data->blksz;
count = sg_dma_len(sg);
- if ((data->blocks == 1) && (count > (1 << data->blksz_bits)))
+ if ((data->blocks == 1) && (count > data->blksz))
count = frame;
host->dma_len = count;
@@ -776,7 +776,7 @@
}
- block_size = 1 << data->blksz_bits;
+ block_size = data->blksz;
OMAP_MMC_WRITE(host->base, NBLK, data->blocks - 1);
OMAP_MMC_WRITE(host->base, BLEN, block_size - 1);
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 6bfcdbc..8e9100b 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -268,7 +268,7 @@
}
DBG("blksz %04x blks %04x flags %08x\n",
- 1 << data->blksz_bits, data->blocks, data->flags);
+ data->blksz, data->blocks, data->flags);
DBG("tsac %d ms nsac %d clk\n",
data->timeout_ns / 1000000, data->timeout_clks);
@@ -282,7 +282,7 @@
writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
- writew(1 << data->blksz_bits, host->ioaddr + SDHCI_BLOCK_SIZE);
+ writew(data->blksz, host->ioaddr + SDHCI_BLOCK_SIZE);
writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
if (host->flags & SDHCI_USE_DMA) {
@@ -294,7 +294,7 @@
writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS);
} else {
- host->size = (1 << data->blksz_bits) * data->blocks;
+ host->size = data->blksz * data->blocks;
host->cur_sg = data->sg;
host->num_sg = data->sg_len;
@@ -335,7 +335,7 @@
blocks = 0;
else
blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
- data->bytes_xfered = (1 << data->blksz_bits) * (data->blocks - blocks);
+ data->bytes_xfered = data->blksz * (data->blocks - blocks);
if ((data->error == MMC_ERR_NONE) && blocks) {
printk(KERN_ERR "%s: Controller signalled completion even "
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 5ea778f..bef4a96 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -937,4 +937,23 @@
If you have an SGI Altix with an IOC3 serial card,
say Y or M. Otherwise, say N.
+config SERIAL_NETX
+ bool "NetX serial port support"
+ depends on ARM && ARCH_NETX
+ select SERIAL_CORE
+ help
+ If you have a machine based on a Hilscher NetX SoC you
+ can enable its onboard serial port by enabling this option.
+
+ To compile this driver as a module, choose M here: the
+ module will be called netx-serial.
+
+config SERIAL_NETX_CONSOLE
+ bool "Console on NetX serial port"
+ depends on SERIAL_NETX
+ select SERIAL_CORE_CONSOLE
+ help
+ If you have enabled the serial port on the Motorola IMX
+ CPU you can make it the console by answering Y to this option.
+
endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 0a71bf6..927faee 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -55,3 +55,4 @@
obj-$(CONFIG_SERIAL_SGI_IOC4) += ioc4_serial.o
obj-$(CONFIG_SERIAL_SGI_IOC3) += ioc3_serial.o
obj-$(CONFIG_SERIAL_AT91) += at91_serial.o
+obj-$(CONFIG_SERIAL_NETX) += netx-serial.o
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c
index 1631414..e920d19 100644
--- a/drivers/serial/amba-pl010.c
+++ b/drivers/serial/amba-pl010.c
@@ -52,7 +52,7 @@
#include <asm/io.h>
-#define UART_NR 2
+#define UART_NR 8
#define SERIAL_AMBA_MAJOR 204
#define SERIAL_AMBA_MINOR 16
diff --git a/drivers/serial/netx-serial.c b/drivers/serial/netx-serial.c
new file mode 100644
index 0000000..c1adc9e
--- /dev/null
+++ b/drivers/serial/netx-serial.c
@@ -0,0 +1,749 @@
+/*
+ * drivers/serial/netx-serial.c
+ *
+ * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/config.h>
+
+#if defined(CONFIG_SERIAL_NETX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+#define SUPPORT_SYSRQ
+#endif
+
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/console.h>
+#include <linux/sysrq.h>
+#include <linux/platform_device.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+#include <linux/serial_core.h>
+#include <linux/serial.h>
+
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/hardware.h>
+#include <asm/arch/netx-regs.h>
+
+/* We've been assigned a range on the "Low-density serial ports" major */
+#define SERIAL_NX_MAJOR 204
+#define MINOR_START 170
+
+#ifdef CONFIG_SERIAL_NETX_CONSOLE
+
+enum uart_regs {
+ UART_DR = 0x00,
+ UART_SR = 0x04,
+ UART_LINE_CR = 0x08,
+ UART_BAUDDIV_MSB = 0x0c,
+ UART_BAUDDIV_LSB = 0x10,
+ UART_CR = 0x14,
+ UART_FR = 0x18,
+ UART_IIR = 0x1c,
+ UART_ILPR = 0x20,
+ UART_RTS_CR = 0x24,
+ UART_RTS_LEAD = 0x28,
+ UART_RTS_TRAIL = 0x2c,
+ UART_DRV_ENABLE = 0x30,
+ UART_BRM_CR = 0x34,
+ UART_RXFIFO_IRQLEVEL = 0x38,
+ UART_TXFIFO_IRQLEVEL = 0x3c,
+};
+
+#define SR_FE (1<<0)
+#define SR_PE (1<<1)
+#define SR_BE (1<<2)
+#define SR_OE (1<<3)
+
+#define LINE_CR_BRK (1<<0)
+#define LINE_CR_PEN (1<<1)
+#define LINE_CR_EPS (1<<2)
+#define LINE_CR_STP2 (1<<3)
+#define LINE_CR_FEN (1<<4)
+#define LINE_CR_5BIT (0<<5)
+#define LINE_CR_6BIT (1<<5)
+#define LINE_CR_7BIT (2<<5)
+#define LINE_CR_8BIT (3<<5)
+#define LINE_CR_BITS_MASK (3<<5)
+
+#define CR_UART_EN (1<<0)
+#define CR_SIREN (1<<1)
+#define CR_SIRLP (1<<2)
+#define CR_MSIE (1<<3)
+#define CR_RIE (1<<4)
+#define CR_TIE (1<<5)
+#define CR_RTIE (1<<6)
+#define CR_LBE (1<<7)
+
+#define FR_CTS (1<<0)
+#define FR_DSR (1<<1)
+#define FR_DCD (1<<2)
+#define FR_BUSY (1<<3)
+#define FR_RXFE (1<<4)
+#define FR_TXFF (1<<5)
+#define FR_RXFF (1<<6)
+#define FR_TXFE (1<<7)
+
+#define IIR_MIS (1<<0)
+#define IIR_RIS (1<<1)
+#define IIR_TIS (1<<2)
+#define IIR_RTIS (1<<3)
+#define IIR_MASK 0xf
+
+#define RTS_CR_AUTO (1<<0)
+#define RTS_CR_RTS (1<<1)
+#define RTS_CR_COUNT (1<<2)
+#define RTS_CR_MOD2 (1<<3)
+#define RTS_CR_RTS_POL (1<<4)
+#define RTS_CR_CTS_CTR (1<<5)
+#define RTS_CR_CTS_POL (1<<6)
+#define RTS_CR_STICK (1<<7)
+
+#define UART_PORT_SIZE 0x40
+#define DRIVER_NAME "netx-uart"
+
+struct netx_port {
+ struct uart_port port;
+};
+
+static void netx_stop_tx(struct uart_port *port)
+{
+ unsigned int val;
+ val = readl(port->membase + UART_CR);
+ writel(val & ~CR_TIE, port->membase + UART_CR);
+}
+
+static void netx_stop_rx(struct uart_port *port)
+{
+ unsigned int val;
+ val = readl(port->membase + UART_CR);
+ writel(val & ~CR_RIE, port->membase + UART_CR);
+}
+
+static void netx_enable_ms(struct uart_port *port)
+{
+ unsigned int val;
+ val = readl(port->membase + UART_CR);
+ writel(val | CR_MSIE, port->membase + UART_CR);
+}
+
+static inline void netx_transmit_buffer(struct uart_port *port)
+{
+ struct circ_buf *xmit = &port->info->xmit;
+
+ if (port->x_char) {
+ writel(port->x_char, port->membase + UART_DR);
+ port->icount.tx++;
+ port->x_char = 0;
+ return;
+ }
+
+ if (uart_tx_stopped(port) || uart_circ_empty(xmit)) {
+ netx_stop_tx(port);
+ return;
+ }
+
+ do {
+ /* send xmit->buf[xmit->tail]
+ * out the port here */
+ writel(xmit->buf[xmit->tail], port->membase + UART_DR);
+ xmit->tail = (xmit->tail + 1) &
+ (UART_XMIT_SIZE - 1);
+ port->icount.tx++;
+ if (uart_circ_empty(xmit))
+ break;
+ } while (!(readl(port->membase + UART_FR) & FR_TXFF));
+
+ if (uart_circ_empty(xmit))
+ netx_stop_tx(port);
+}
+
+static void netx_start_tx(struct uart_port *port)
+{
+ writel(
+ readl(port->membase + UART_CR) | CR_TIE, port->membase + UART_CR);
+
+ if (!(readl(port->membase + UART_FR) & FR_TXFF))
+ netx_transmit_buffer(port);
+}
+
+static unsigned int netx_tx_empty(struct uart_port *port)
+{
+ return readl(port->membase + UART_FR) & FR_BUSY ? 0 : TIOCSER_TEMT;
+}
+
+static void netx_txint(struct uart_port *port)
+{
+ struct circ_buf *xmit = &port->info->xmit;
+
+ if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
+ netx_stop_tx(port);
+ return;
+ }
+
+ netx_transmit_buffer(port);
+
+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+ uart_write_wakeup(port);
+}
+
+static void netx_rxint(struct uart_port *port, struct pt_regs *regs)
+{
+ unsigned char rx, flg, status;
+ struct tty_struct *tty = port->info->tty;
+
+ while (!(readl(port->membase + UART_FR) & FR_RXFE)) {
+ rx = readl(port->membase + UART_DR);
+ flg = TTY_NORMAL;
+ port->icount.rx++;
+ status = readl(port->membase + UART_SR);
+ if (status & SR_BE) {
+ writel(0, port->membase + UART_SR);
+ if (uart_handle_break(port))
+ continue;
+ }
+
+ if (unlikely(status & (SR_FE | SR_PE | SR_OE))) {
+
+ if (status & SR_PE)
+ port->icount.parity++;
+ else if (status & SR_FE)
+ port->icount.frame++;
+ if (status & SR_OE)
+ port->icount.overrun++;
+
+ status &= port->read_status_mask;
+
+ if (status & SR_BE)
+ flg = TTY_BREAK;
+ else if (status & SR_PE)
+ flg = TTY_PARITY;
+ else if (status & SR_FE)
+ flg = TTY_FRAME;
+ }
+
+ if (uart_handle_sysrq_char(port, rx, regs))
+ continue;
+
+ uart_insert_char(port, status, SR_OE, rx, flg);
+ }
+
+ tty_flip_buffer_push(tty);
+ return;
+}
+
+static irqreturn_t netx_int(int irq, void *dev_id, struct pt_regs *regs)
+{
+ struct uart_port *port = (struct uart_port *)dev_id;
+ unsigned long flags;
+ unsigned char status;
+
+ spin_lock_irqsave(&port->lock,flags);
+
+ status = readl(port->membase + UART_IIR) & IIR_MASK;
+ while (status) {
+ if (status & IIR_RIS)
+ netx_rxint(port, regs);
+ if (status & IIR_TIS)
+ netx_txint(port);
+ if (status & IIR_MIS) {
+ if (readl(port->membase + UART_FR) & FR_CTS)
+ uart_handle_cts_change(port, 1);
+ else
+ uart_handle_cts_change(port, 0);
+ }
+ writel(0, port->membase + UART_IIR);
+ status = readl(port->membase + UART_IIR) & IIR_MASK;
+ }
+
+ spin_unlock_irqrestore(&port->lock,flags);
+ return IRQ_HANDLED;
+}
+
+static unsigned int netx_get_mctrl(struct uart_port *port)
+{
+ unsigned int ret = TIOCM_DSR | TIOCM_CAR;
+
+ if (readl(port->membase + UART_FR) & FR_CTS)
+ ret |= TIOCM_CTS;
+
+ return ret;
+}
+
+static void netx_set_mctrl(struct uart_port *port, unsigned int mctrl)
+{
+ unsigned int val;
+
+ if (mctrl & TIOCM_RTS) {
+ val = readl(port->membase + UART_RTS_CR);
+ writel(val | RTS_CR_RTS, port->membase + UART_RTS_CR);
+ }
+}
+
+static void netx_break_ctl(struct uart_port *port, int break_state)
+{
+ unsigned int line_cr;
+ spin_lock_irq(&port->lock);
+
+ line_cr = readl(port->membase + UART_LINE_CR);
+ if (break_state != 0)
+ line_cr |= LINE_CR_BRK;
+ else
+ line_cr &= ~LINE_CR_BRK;
+ writel(line_cr, port->membase + UART_LINE_CR);
+
+ spin_unlock_irq(&port->lock);
+}
+
+static int netx_startup(struct uart_port *port)
+{
+ int ret;
+
+ ret = request_irq(port->irq, netx_int, 0,
+ DRIVER_NAME, port);
+ if (ret) {
+ dev_err(port->dev, "unable to grab irq%d\n",port->irq);
+ goto exit;
+ }
+
+ writel(readl(port->membase + UART_LINE_CR) | LINE_CR_FEN,
+ port->membase + UART_LINE_CR);
+
+ writel(CR_MSIE | CR_RIE | CR_TIE | CR_RTIE | CR_UART_EN,
+ port->membase + UART_CR);
+
+exit:
+ return ret;
+}
+
+static void netx_shutdown(struct uart_port *port)
+{
+ writel(0, port->membase + UART_CR) ;
+
+ free_irq(port->irq, port);
+}
+
+static void
+netx_set_termios(struct uart_port *port, struct termios *termios,
+ struct termios *old)
+{
+ unsigned int baud, quot;
+ unsigned char old_cr;
+ unsigned char line_cr = LINE_CR_FEN;
+ unsigned char rts_cr = 0;
+
+ switch (termios->c_cflag & CSIZE) {
+ case CS5:
+ line_cr |= LINE_CR_5BIT;
+ break;
+ case CS6:
+ line_cr |= LINE_CR_6BIT;
+ break;
+ case CS7:
+ line_cr |= LINE_CR_7BIT;
+ break;
+ case CS8:
+ line_cr |= LINE_CR_8BIT;
+ break;
+ }
+
+ if (termios->c_cflag & CSTOPB)
+ line_cr |= LINE_CR_STP2;
+
+ if (termios->c_cflag & PARENB) {
+ line_cr |= LINE_CR_PEN;
+ if (!(termios->c_cflag & PARODD))
+ line_cr |= LINE_CR_EPS;
+ }
+
+ if (termios->c_cflag & CRTSCTS)
+ rts_cr = RTS_CR_AUTO | RTS_CR_CTS_CTR | RTS_CR_RTS_POL;
+
+ baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
+ quot = baud * 4096;
+ quot /= 1000;
+ quot *= 256;
+ quot /= 100000;
+
+ spin_lock_irq(&port->lock);
+
+ uart_update_timeout(port, termios->c_cflag, baud);
+
+ old_cr = readl(port->membase + UART_CR);
+
+ /* disable interrupts */
+ writel(old_cr & ~(CR_MSIE | CR_RIE | CR_TIE | CR_RTIE),
+ port->membase + UART_CR);
+
+ /* drain transmitter */
+ while (readl(port->membase + UART_FR) & FR_BUSY);
+
+ /* disable UART */
+ writel(old_cr & ~CR_UART_EN, port->membase + UART_CR);
+
+ /* modem status interrupts */
+ old_cr &= ~CR_MSIE;
+ if (UART_ENABLE_MS(port, termios->c_cflag))
+ old_cr |= CR_MSIE;
+
+ writel((quot>>8) & 0xff, port->membase + UART_BAUDDIV_MSB);
+ writel(quot & 0xff, port->membase + UART_BAUDDIV_LSB);
+ writel(line_cr, port->membase + UART_LINE_CR);
+
+ writel(rts_cr, port->membase + UART_RTS_CR);
+
+ /*
+ * Characters to ignore
+ */
+ port->ignore_status_mask = 0;
+ if (termios->c_iflag & IGNPAR)
+ port->ignore_status_mask |= SR_PE;
+ if (termios->c_iflag & IGNBRK) {
+ port->ignore_status_mask |= SR_BE;
+ /*
+ * If we're ignoring parity and break indicators,
+ * ignore overruns too (for real raw support).
+ */
+ if (termios->c_iflag & IGNPAR)
+ port->ignore_status_mask |= SR_PE;
+ }
+
+ port->read_status_mask = 0;
+ if (termios->c_iflag & (BRKINT | PARMRK))
+ port->read_status_mask |= SR_BE;
+ if (termios->c_iflag & INPCK)
+ port->read_status_mask |= SR_PE | SR_FE;
+
+ writel(old_cr, port->membase + UART_CR);
+
+ spin_unlock_irq(&port->lock);
+}
+
+static const char *netx_type(struct uart_port *port)
+{
+ return port->type == PORT_NETX ? "NETX" : NULL;
+}
+
+static void netx_release_port(struct uart_port *port)
+{
+ release_mem_region(port->mapbase, UART_PORT_SIZE);
+}
+
+static int netx_request_port(struct uart_port *port)
+{
+ return request_mem_region(port->mapbase, UART_PORT_SIZE,
+ DRIVER_NAME) != NULL ? 0 : -EBUSY;
+}
+
+static void netx_config_port(struct uart_port *port, int flags)
+{
+ if (flags & UART_CONFIG_TYPE && netx_request_port(port) == 0)
+ port->type = PORT_NETX;
+}
+
+static int
+netx_verify_port(struct uart_port *port, struct serial_struct *ser)
+{
+ int ret = 0;
+
+ if (ser->type != PORT_UNKNOWN && ser->type != PORT_NETX)
+ ret = -EINVAL;
+
+ return ret;
+}
+
+static struct uart_ops netx_pops = {
+ .tx_empty = netx_tx_empty,
+ .set_mctrl = netx_set_mctrl,
+ .get_mctrl = netx_get_mctrl,
+ .stop_tx = netx_stop_tx,
+ .start_tx = netx_start_tx,
+ .stop_rx = netx_stop_rx,
+ .enable_ms = netx_enable_ms,
+ .break_ctl = netx_break_ctl,
+ .startup = netx_startup,
+ .shutdown = netx_shutdown,
+ .set_termios = netx_set_termios,
+ .type = netx_type,
+ .release_port = netx_release_port,
+ .request_port = netx_request_port,
+ .config_port = netx_config_port,
+ .verify_port = netx_verify_port,
+};
+
+static struct netx_port netx_ports[] = {
+ {
+ .port = {
+ .type = PORT_NETX,
+ .iotype = UPIO_MEM,
+ .membase = (char __iomem *)io_p2v(NETX_PA_UART0),
+ .mapbase = NETX_PA_UART0,
+ .irq = NETX_IRQ_UART0,
+ .uartclk = 100000000,
+ .fifosize = 16,
+ .flags = UPF_BOOT_AUTOCONF,
+ .ops = &netx_pops,
+ .line = 0,
+ },
+ }, {
+ .port = {
+ .type = PORT_NETX,
+ .iotype = UPIO_MEM,
+ .membase = (char __iomem *)io_p2v(NETX_PA_UART1),
+ .mapbase = NETX_PA_UART1,
+ .irq = NETX_IRQ_UART1,
+ .uartclk = 100000000,
+ .fifosize = 16,
+ .flags = UPF_BOOT_AUTOCONF,
+ .ops = &netx_pops,
+ .line = 1,
+ },
+ }, {
+ .port = {
+ .type = PORT_NETX,
+ .iotype = UPIO_MEM,
+ .membase = (char __iomem *)io_p2v(NETX_PA_UART2),
+ .mapbase = NETX_PA_UART2,
+ .irq = NETX_IRQ_UART2,
+ .uartclk = 100000000,
+ .fifosize = 16,
+ .flags = UPF_BOOT_AUTOCONF,
+ .ops = &netx_pops,
+ .line = 2,
+ },
+ }
+};
+
+static void netx_console_putchar(struct uart_port *port, int ch)
+{
+ while (readl(port->membase + UART_FR) & FR_BUSY);
+ writel(ch, port->membase + UART_DR);
+}
+
+static void
+netx_console_write(struct console *co, const char *s, unsigned int count)
+{
+ struct uart_port *port = &netx_ports[co->index].port;
+ unsigned char cr_save;
+
+ cr_save = readl(port->membase + UART_CR);
+ writel(cr_save | CR_UART_EN, port->membase + UART_CR);
+
+ uart_console_write(port, s, count, netx_console_putchar);
+
+ while (readl(port->membase + UART_FR) & FR_BUSY);
+ writel(cr_save, port->membase + UART_CR);
+}
+
+static void __init
+netx_console_get_options(struct uart_port *port, int *baud,
+ int *parity, int *bits, int *flow)
+{
+ unsigned char line_cr;
+
+ *baud = (readl(port->membase + UART_BAUDDIV_MSB) << 8) |
+ readl(port->membase + UART_BAUDDIV_LSB);
+ *baud *= 1000;
+ *baud /= 4096;
+ *baud *= 1000;
+ *baud /= 256;
+ *baud *= 100;
+
+ line_cr = readl(port->membase + UART_LINE_CR);
+ *parity = 'n';
+ if (line_cr & LINE_CR_PEN) {
+ if (line_cr & LINE_CR_EPS)
+ *parity = 'e';
+ else
+ *parity = 'o';
+ }
+
+ switch (line_cr & LINE_CR_BITS_MASK) {
+ case LINE_CR_8BIT:
+ *bits = 8;
+ break;
+ case LINE_CR_7BIT:
+ *bits = 7;
+ break;
+ case LINE_CR_6BIT:
+ *bits = 6;
+ break;
+ case LINE_CR_5BIT:
+ *bits = 5;
+ break;
+ }
+
+ if (readl(port->membase + UART_RTS_CR) & RTS_CR_AUTO)
+ *flow = 'r';
+}
+
+static int __init
+netx_console_setup(struct console *co, char *options)
+{
+ struct netx_port *sport;
+ int baud = 9600;
+ int bits = 8;
+ int parity = 'n';
+ int flow = 'n';
+
+ /*
+ * Check whether an invalid uart number has been specified, and
+ * if so, search for the first available port that does have
+ * console support.
+ */
+ if (co->index == -1 || co->index >= ARRAY_SIZE(netx_ports))
+ co->index = 0;
+ sport = &netx_ports[co->index];
+
+ if (options) {
+ uart_parse_options(options, &baud, &parity, &bits, &flow);
+ } else {
+ /* if the UART is enabled, assume it has been correctly setup
+ * by the bootloader and get the options
+ */
+ if (readl(sport->port.membase + UART_CR) & CR_UART_EN) {
+ netx_console_get_options(&sport->port, &baud,
+ &parity, &bits, &flow);
+ }
+
+ }
+
+ return uart_set_options(&sport->port, co, baud, parity, bits, flow);
+}
+
+static struct uart_driver netx_reg;
+static struct console netx_console = {
+ .name = "ttyNX",
+ .write = netx_console_write,
+ .device = uart_console_device,
+ .setup = netx_console_setup,
+ .flags = CON_PRINTBUFFER,
+ .index = -1,
+ .data = &netx_reg,
+};
+
+static int __init netx_console_init(void)
+{
+ register_console(&netx_console);
+ return 0;
+}
+console_initcall(netx_console_init);
+
+#define NETX_CONSOLE &netx_console
+#else
+#define NETX_CONSOLE NULL
+#endif
+
+static struct uart_driver netx_reg = {
+ .owner = THIS_MODULE,
+ .driver_name = DRIVER_NAME,
+ .dev_name = "ttyNX",
+ .major = SERIAL_NX_MAJOR,
+ .minor = MINOR_START,
+ .nr = ARRAY_SIZE(netx_ports),
+ .cons = NETX_CONSOLE,
+};
+
+static int serial_netx_suspend(struct platform_device *pdev, pm_message_t state)
+{
+ struct netx_port *sport = platform_get_drvdata(pdev);
+
+ if (sport)
+ uart_suspend_port(&netx_reg, &sport->port);
+
+ return 0;
+}
+
+static int serial_netx_resume(struct platform_device *pdev)
+{
+ struct netx_port *sport = platform_get_drvdata(pdev);
+
+ if (sport)
+ uart_resume_port(&netx_reg, &sport->port);
+
+ return 0;
+}
+
+static int serial_netx_probe(struct platform_device *pdev)
+{
+ struct uart_port *port = &netx_ports[pdev->id].port;
+
+ dev_info(&pdev->dev, "initialising\n");
+
+ port->dev = &pdev->dev;
+
+ writel(1, port->membase + UART_RXFIFO_IRQLEVEL);
+ uart_add_one_port(&netx_reg, &netx_ports[pdev->id].port);
+ platform_set_drvdata(pdev, &netx_ports[pdev->id]);
+
+ return 0;
+}
+
+static int serial_netx_remove(struct platform_device *pdev)
+{
+ struct netx_port *sport = platform_get_drvdata(pdev);
+
+ platform_set_drvdata(pdev, NULL);
+
+ if (sport)
+ uart_remove_one_port(&netx_reg, &sport->port);
+
+ return 0;
+}
+
+static struct platform_driver serial_netx_driver = {
+ .probe = serial_netx_probe,
+ .remove = serial_netx_remove,
+
+ .suspend = serial_netx_suspend,
+ .resume = serial_netx_resume,
+
+ .driver = {
+ .name = DRIVER_NAME,
+ },
+};
+
+static int __init netx_serial_init(void)
+{
+ int ret;
+
+ printk(KERN_INFO "Serial: NetX driver\n");
+
+ ret = uart_register_driver(&netx_reg);
+ if (ret)
+ return ret;
+
+ ret = platform_driver_register(&serial_netx_driver);
+ if (ret != 0)
+ uart_unregister_driver(&netx_reg);
+
+ return 0;
+}
+
+static void __exit netx_serial_exit(void)
+{
+ platform_driver_unregister(&serial_netx_driver);
+ uart_unregister_driver(&netx_reg);
+}
+
+module_init(netx_serial_init);
+module_exit(netx_serial_exit);
+
+MODULE_AUTHOR("Sascha Hauer");
+MODULE_DESCRIPTION("NetX serial port driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/serial/pxa.c b/drivers/serial/pxa.c
index 77d4568..ae36495 100644
--- a/drivers/serial/pxa.c
+++ b/drivers/serial/pxa.c
@@ -269,7 +269,6 @@
unsigned char status;
unsigned int ret;
-return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
status = serial_in(up, UART_MSR);
ret = 0;
diff --git a/include/asm-arm/arch-imx/imx-dma.h b/include/asm-arm/arch-imx/imx-dma.h
index f2063c1..599f03e 100644
--- a/include/asm-arm/arch-imx/imx-dma.h
+++ b/include/asm-arm/arch-imx/imx-dma.h
@@ -46,7 +46,7 @@
struct imx_dma_channel {
const char *name;
void (*irq_handler) (int, void *, struct pt_regs *);
- void (*err_handler) (int, void *, struct pt_regs *);
+ void (*err_handler) (int, void *, struct pt_regs *, int errcode);
void *data;
dmamode_t dma_mode;
struct scatterlist *sg;
@@ -58,6 +58,10 @@
extern struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS];
+#define IMX_DMA_ERR_BURST 1
+#define IMX_DMA_ERR_REQUEST 2
+#define IMX_DMA_ERR_TRANSFER 4
+#define IMX_DMA_ERR_BUFFER 8
/* The type to distinguish channel numbers parameter from ordinal int type */
typedef int imx_dmach_t;
@@ -74,7 +78,7 @@
int
imx_dma_setup_handlers(imx_dmach_t dma_ch,
void (*irq_handler) (int, void *, struct pt_regs *),
- void (*err_handler) (int, void *, struct pt_regs *), void *data);
+ void (*err_handler) (int, void *, struct pt_regs *, int), void *data);
void imx_dma_enable(imx_dmach_t dma_ch);
diff --git a/include/asm-arm/arch-ixp23xx/ixp23xx.h b/include/asm-arm/arch-ixp23xx/ixp23xx.h
index 01efdbd..d0a7220 100644
--- a/include/asm-arm/arch-ixp23xx/ixp23xx.h
+++ b/include/asm-arm/arch-ixp23xx/ixp23xx.h
@@ -124,6 +124,7 @@
#define IXP23XX_EXP_UNIT_FUSE IXP23XX_EXP_CFG_REG(0x28)
#define IXP23XX_EXP_MSF_MUX IXP23XX_EXP_CFG_REG(0x30)
+#define IXP23XX_EXP_CFG_FUSE IXP23XX_EXP_CFG_REG(0x34)
#define IXP23XX_EXP_BUS_PHYS 0x90000000
#define IXP23XX_EXP_BUS_WINDOW_SIZE 0x01000000
@@ -265,6 +266,8 @@
#define IXP23XX_PCI_UNIT_RESET (1 << 1)
#define IXP23XX_XSCALE_RESET (1 << 0)
+#define IXP23XX_UENGINE_CSR_VIRT_BASE (IXP23XX_CAP_CSR_VIRT + 0x18000)
+
/****************************************************************************
* PCI CSRs.
diff --git a/include/asm-arm/arch-ixp23xx/platform.h b/include/asm-arm/arch-ixp23xx/platform.h
index e4d9906..19a73b3 100644
--- a/include/asm-arm/arch-ixp23xx/platform.h
+++ b/include/asm-arm/arch-ixp23xx/platform.h
@@ -14,6 +14,21 @@
#ifndef __ASSEMBLY__
+extern inline unsigned long ixp2000_reg_read(volatile void *reg)
+{
+ return *((volatile unsigned long *)reg);
+}
+
+extern inline void ixp2000_reg_write(volatile void *reg, unsigned long val)
+{
+ *((volatile unsigned long *)reg) = val;
+}
+
+extern inline void ixp2000_reg_wrb(volatile void *reg, unsigned long val)
+{
+ *((volatile unsigned long *)reg) = val;
+}
+
struct pci_sys_data;
void ixp23xx_map_io(void);
diff --git a/include/asm-arm/arch-pnx4008/debug-macro.S b/include/asm-arm/arch-pnx4008/debug-macro.S
index eb3839d..67d18a2 100644
--- a/include/asm-arm/arch-pnx4008/debug-macro.S
+++ b/include/asm-arm/arch-pnx4008/debug-macro.S
@@ -19,9 +19,5 @@
addne \rx, \rx, #0xf4000000
.endm
- .macro senduart,rd,rx
- strb \rd, [\rx, #0x0]
- .endm
-
#define UART_SHIFT 2
#include <asm/hardware/debug-8250.S>
diff --git a/include/asm-arm/arch-pnx4008/gpio.h b/include/asm-arm/arch-pnx4008/gpio.h
index 1fa5a77..d01bf83 100644
--- a/include/asm-arm/arch-pnx4008/gpio.h
+++ b/include/asm-arm/arch-pnx4008/gpio.h
@@ -127,6 +127,79 @@
#define GPIO_ISOUT(K) ((GPIO_TYPE_MASK(K) == GPIO_OUT) && (GPIO_BIT(K) & GPIO_OUT_MASK))
#define GPIO_ISIN(K) ((GPIO_TYPE_MASK(K) == GPIO_IN) && (GPIO_BIT(K) & GPIO_IN_MASK))
+/* Start Enable Pin Interrupts - table 58 page 66 */
+
+#define SE_PIN_BASE_INT 32
+
+#define SE_U7_RX_INT 63
+#define SE_U7_HCTS_INT 62
+#define SE_BT_CLKREQ_INT 61
+#define SE_U6_IRRX_INT 60
+/*59 unused*/
+#define SE_U5_RX_INT 58
+#define SE_GPI_11_INT 57
+#define SE_U3_RX_INT 56
+#define SE_U2_HCTS_INT 55
+#define SE_U2_RX_INT 54
+#define SE_U1_RX_INT 53
+#define SE_DISP_SYNC_INT 52
+/*51 unused*/
+#define SE_SDIO_INT_N 50
+#define SE_MSDIO_START_INT 49
+#define SE_GPI_06_INT 48
+#define SE_GPI_05_INT 47
+#define SE_GPI_04_INT 46
+#define SE_GPI_03_INT 45
+#define SE_GPI_02_INT 44
+#define SE_GPI_01_INT 43
+#define SE_GPI_00_INT 42
+#define SE_SYSCLKEN_PIN_INT 41
+#define SE_SPI1_DATAIN_INT 40
+#define SE_GPI_07_INT 39
+#define SE_SPI2_DATAIN_INT 38
+#define SE_GPI_10_INT 37
+#define SE_GPI_09_INT 36
+#define SE_GPI_08_INT 35
+/*34-32 unused*/
+
+/* Start Enable Internal Interrupts - table 57 page 65 */
+
+#define SE_INT_BASE_INT 0
+
+#define SE_TS_IRQ 31
+#define SE_TS_P_INT 30
+#define SE_TS_AUX_INT 29
+/*27-28 unused*/
+#define SE_USB_AHB_NEED_CLK_INT 26
+#define SE_MSTIMER_INT 25
+#define SE_RTC_INT 24
+#define SE_USB_NEED_CLK_INT 23
+#define SE_USB_INT 22
+#define SE_USB_I2C_INT 21
+#define SE_USB_OTG_TIMER_INT 20
+#define SE_USB_OTG_ATX_INT_N 19
+/*18 unused*/
+#define SE_DSP_GPIO4_INT 17
+#define SE_KEY_IRQ 16
+#define SE_DSP_SLAVEPORT_INT 15
+#define SE_DSP_GPIO1_INT 14
+#define SE_DSP_GPIO0_INT 13
+#define SE_DSP_AHB_INT 12
+/*11-6 unused*/
+#define SE_GPIO_05_INT 5
+#define SE_GPIO_04_INT 4
+#define SE_GPIO_03_INT 3
+#define SE_GPIO_02_INT 2
+#define SE_GPIO_01_INT 1
+#define SE_GPIO_00_INT 0
+
+#define START_INT_REG_BIT(irq) (1<<((irq)&0x1F))
+
+#define START_INT_ER_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x20 + (((irq)&(0x1<<5))>>1)))
+#define START_INT_RSR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x24 + (((irq)&(0x1<<5))>>1)))
+#define START_INT_SR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x28 + (((irq)&(0x1<<5))>>1)))
+#define START_INT_APR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x2C + (((irq)&(0x1<<5))>>1)))
+
extern int pnx4008_gpio_register_pin(unsigned short pin);
extern int pnx4008_gpio_unregister_pin(unsigned short pin);
extern unsigned long pnx4008_gpio_read_pin(unsigned short pin);
@@ -136,4 +209,33 @@
extern int pnx4008_gpio_set_pin_mux(unsigned short pin, int output);
extern int pnx4008_gpio_read_pin_mux(unsigned short pin);
+static inline void start_int_umask(u8 irq)
+{
+ __raw_writel(__raw_readl(START_INT_ER_REG(irq)) |
+ START_INT_REG_BIT(irq), START_INT_ER_REG(irq));
+}
+
+static inline void start_int_mask(u8 irq)
+{
+ __raw_writel(__raw_readl(START_INT_ER_REG(irq)) &
+ ~START_INT_REG_BIT(irq), START_INT_ER_REG(irq));
+}
+
+static inline void start_int_ack(u8 irq)
+{
+ __raw_writel(START_INT_REG_BIT(irq), START_INT_RSR_REG(irq));
+}
+
+static inline void start_int_set_falling_edge(u8 irq)
+{
+ __raw_writel(__raw_readl(START_INT_APR_REG(irq)) &
+ ~START_INT_REG_BIT(irq), START_INT_APR_REG(irq));
+}
+
+static inline void start_int_set_rising_edge(u8 irq)
+{
+ __raw_writel(__raw_readl(START_INT_APR_REG(irq)) |
+ START_INT_REG_BIT(irq), START_INT_APR_REG(irq));
+}
+
#endif /* _PNX4008_GPIO_H_ */
diff --git a/include/asm-arm/arch-pnx4008/pm.h b/include/asm-arm/arch-pnx4008/pm.h
index c660486..bac1634c 100644
--- a/include/asm-arm/arch-pnx4008/pm.h
+++ b/include/asm-arm/arch-pnx4008/pm.h
@@ -29,34 +29,5 @@
extern int pnx4008_startup_pll(struct clk *);
extern int pnx4008_shutdown_pll(struct clk *);
-static inline void start_int_umask(u8 irq)
-{
- __raw_writel(__raw_readl(START_INT_ER_REG(irq)) |
- START_INT_REG_BIT(irq), START_INT_ER_REG(irq));
-}
-
-static inline void start_int_mask(u8 irq)
-{
- __raw_writel(__raw_readl(START_INT_ER_REG(irq)) &
- ~START_INT_REG_BIT(irq), START_INT_ER_REG(irq));
-}
-
-static inline void start_int_ack(u8 irq)
-{
- __raw_writel(START_INT_REG_BIT(irq), START_INT_RSR_REG(irq));
-}
-
-static inline void start_int_set_falling_edge(u8 irq)
-{
- __raw_writel(__raw_readl(START_INT_APR_REG(irq)) &
- ~START_INT_REG_BIT(irq), START_INT_APR_REG(irq));
-}
-
-static inline void start_int_set_rising_edge(u8 irq)
-{
- __raw_writel(__raw_readl(START_INT_APR_REG(irq)) |
- START_INT_REG_BIT(irq), START_INT_APR_REG(irq));
-}
-
#endif /* ASSEMBLER */
#endif /* __ASM_ARCH_PNX4008_PM_H */
diff --git a/include/asm-arm/arch-s3c2410/regs-dsc.h b/include/asm-arm/arch-s3c2410/regs-dsc.h
index a023b04..ba13a2c 100644
--- a/include/asm-arm/arch-s3c2410/regs-dsc.h
+++ b/include/asm-arm/arch-s3c2410/regs-dsc.h
@@ -170,7 +170,7 @@
#define S3C2440_DSC1_CS1_4mA (3<<2)
#define S3C2440_DSC1_CS1_MASK (3<<2)
-#define S3C2440_DSC1_CS0 (S3C2440_SELECT_DSC1 | 0
+#define S3C2440_DSC1_CS0 (S3C2440_SELECT_DSC1 | 0)
#define S3C2440_DSC1_CS0_10mA (0<<0)
#define S3C2440_DSC1_CS0_8mA (1<<0)
#define S3C2440_DSC1_CS0_6mA (2<<0)
diff --git a/include/asm-arm/thread_notify.h b/include/asm-arm/thread_notify.h
new file mode 100644
index 0000000..8866e52
--- /dev/null
+++ b/include/asm-arm/thread_notify.h
@@ -0,0 +1,48 @@
+/*
+ * linux/include/asm-arm/thread_notify.h
+ *
+ * Copyright (C) 2006 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef ASMARM_THREAD_NOTIFY_H
+#define ASMARM_THREAD_NOTIFY_H
+
+#ifdef __KERNEL__
+
+#ifndef __ASSEMBLY__
+
+#include <linux/notifier.h>
+#include <asm/thread_info.h>
+
+static inline int thread_register_notifier(struct notifier_block *n)
+{
+ extern struct atomic_notifier_head thread_notify_head;
+ return atomic_notifier_chain_register(&thread_notify_head, n);
+}
+
+static inline void thread_unregister_notifier(struct notifier_block *n)
+{
+ extern struct atomic_notifier_head thread_notify_head;
+ atomic_notifier_chain_unregister(&thread_notify_head, n);
+}
+
+static inline void thread_notify(unsigned long rc, struct thread_info *thread)
+{
+ extern struct atomic_notifier_head thread_notify_head;
+ atomic_notifier_call_chain(&thread_notify_head, rc, thread);
+}
+
+#endif
+
+/*
+ * These are the reason codes for the thread notifier.
+ */
+#define THREAD_NOTIFY_FLUSH 0
+#define THREAD_NOTIFY_RELEASE 1
+#define THREAD_NOTIFY_SWITCH 2
+
+#endif
+#endif
