// SPDX-License-Identifier: GPL-2.0
/*
 * Device Tree Source for AM6 SoC Family Main Domain peripherals
 *
 * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
 */

&cbass_main {
	msmc_ram: sram@70000000 {
		compatible = "mmio-sram";
		reg = <0x0 0x70000000 0x0 0x200000>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x0 0x70000000 0x200000>;

		atf-sram@0 {
			reg = <0x0 0x20000>;
		};

		sysfw-sram@f0000 {
			reg = <0xf0000 0x10000>;
		};

		l3cache-sram@100000 {
			reg = <0x100000 0x100000>;
		};
	};

	gic500: interrupt-controller@1800000 {
		compatible = "arm,gic-v3";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0x00 0x01800000 0x00 0x10000>,	/* GICD */
		      <0x00 0x01880000 0x00 0x90000>;	/* GICR */
		/*
		 * vcpumntirq:
		 * virtual CPU interface maintenance interrupt
		 */
		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;

		gic_its: gic-its@18200000 {
			compatible = "arm,gic-v3-its";
			reg = <0x00 0x01820000 0x00 0x10000>;
			msi-controller;
			#msi-cells = <1>;
		};
	};

	secure_proxy_main: mailbox@32c00000 {
		compatible = "ti,am654-secure-proxy";
		#mbox-cells = <1>;
		reg-names = "target_data", "rt", "scfg";
		reg = <0x00 0x32c00000 0x00 0x100000>,
		      <0x00 0x32400000 0x00 0x100000>,
		      <0x00 0x32800000 0x00 0x100000>;
		interrupt-names = "rx_011";
		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
	};

	main_uart0: serial@2800000 {
		compatible = "ti,am654-uart";
		reg = <0x00 0x02800000 0x00 0x100>;
		reg-shift = <2>;
		reg-io-width = <4>;
		interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
		clock-frequency = <48000000>;
		current-speed = <115200>;
		power-domains = <&k3_pds 146>;
	};

	main_uart1: serial@2810000 {
		compatible = "ti,am654-uart";
		reg = <0x00 0x02810000 0x00 0x100>;
		reg-shift = <2>;
		reg-io-width = <4>;
		interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
		clock-frequency = <48000000>;
		power-domains = <&k3_pds 147>;
	};

	main_uart2: serial@2820000 {
		compatible = "ti,am654-uart";
		reg = <0x00 0x02820000 0x00 0x100>;
		reg-shift = <2>;
		reg-io-width = <4>;
		interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
		clock-frequency = <48000000>;
		power-domains = <&k3_pds 148>;
	};

	main_pmx0: pinmux@11c000 {
		compatible = "pinctrl-single";
		reg = <0x0 0x11c000 0x0 0x2e4>;
		#pinctrl-cells = <1>;
		pinctrl-single,register-width = <32>;
		pinctrl-single,function-mask = <0xffffffff>;
	};

	main_pmx1: pinmux@11c2e8 {
		compatible = "pinctrl-single";
		reg = <0x0 0x11c2e8 0x0 0x24>;
		#pinctrl-cells = <1>;
		pinctrl-single,register-width = <32>;
		pinctrl-single,function-mask = <0xffffffff>;
	};

	main_i2c0: i2c@2000000 {
		compatible = "ti,am654-i2c", "ti,omap4-i2c";
		reg = <0x0 0x2000000 0x0 0x100>;
		interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clock-names = "fck";
		clocks = <&k3_clks 110 1>;
		power-domains = <&k3_pds 110>;
	};

	main_i2c1: i2c@2010000 {
		compatible = "ti,am654-i2c", "ti,omap4-i2c";
		reg = <0x0 0x2010000 0x0 0x100>;
		interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clock-names = "fck";
		clocks = <&k3_clks 111 1>;
		power-domains = <&k3_pds 111>;
	};

	main_i2c2: i2c@2020000 {
		compatible = "ti,am654-i2c", "ti,omap4-i2c";
		reg = <0x0 0x2020000 0x0 0x100>;
		interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clock-names = "fck";
		clocks = <&k3_clks 112 1>;
		power-domains = <&k3_pds 112>;
	};

	main_i2c3: i2c@2030000 {
		compatible = "ti,am654-i2c", "ti,omap4-i2c";
		reg = <0x0 0x2030000 0x0 0x100>;
		interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clock-names = "fck";
		clocks = <&k3_clks 113 1>;
		power-domains = <&k3_pds 113>;
	};

	ecap0: pwm@3100000 {
		compatible = "ti,am654-ecap", "ti,am3352-ecap";
		#pwm-cells = <3>;
		reg = <0x0 0x03100000 0x0 0x60>;
		power-domains = <&k3_pds 39>;
		clocks = <&k3_clks 39 0>;
		clock-names = "fck";
	};

	main_spi0: spi@2100000 {
		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
		reg = <0x0 0x2100000 0x0 0x400>;
		interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&k3_clks 137 1>;
		power-domains = <&k3_pds 137>;
		#address-cells = <1>;
		#size-cells = <0>;
	};

	main_spi1: spi@2110000 {
		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
		reg = <0x0 0x2110000 0x0 0x400>;
		interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&k3_clks 138 1>;
		power-domains = <&k3_pds 138>;
		#address-cells = <1>;
		#size-cells = <0>;
		assigned-clocks = <&k3_clks 137 1>;
		assigned-clock-rates = <48000000>;
	};

	main_spi2: spi@2120000 {
		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
		reg = <0x0 0x2120000 0x0 0x400>;
		interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&k3_clks 139 1>;
		power-domains = <&k3_pds 139>;
		#address-cells = <1>;
		#size-cells = <0>;
	};

	main_spi3: spi@2130000 {
		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
		reg = <0x0 0x2130000 0x0 0x400>;
		interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&k3_clks 140 1>;
		power-domains = <&k3_pds 140>;
		#address-cells = <1>;
		#size-cells = <0>;
	};

	main_spi4: spi@2140000 {
		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
		reg = <0x0 0x2140000 0x0 0x400>;
		interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&k3_clks 141 1>;
		power-domains = <&k3_pds 141>;
		#address-cells = <1>;
		#size-cells = <0>;
	};

	sdhci0: sdhci@4f80000 {
		compatible = "ti,am654-sdhci-5.1";
		reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>;
		power-domains = <&k3_pds 47>;
		clocks = <&k3_clks 47 0>, <&k3_clks 47 1>;
		clock-names = "clk_ahb", "clk_xin";
		interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
		mmc-ddr-1_8v;
		mmc-hs200-1_8v;
		ti,otap-del-sel = <0x2>;
		ti,trm-icp = <0x8>;
		dma-coherent;
	};

	scm_conf: scm_conf@100000 {
		compatible = "syscon", "simple-mfd";
		reg = <0 0x00100000 0 0x1c000>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x0 0x00100000 0x1c000>;
	};

	dwc3_0: dwc3@4000000 {
		compatible = "ti,am654-dwc3";
		reg = <0x0 0x4000000 0x0 0x4000>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x0 0x4000000 0x20000>;
		interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
		dma-coherent;
		power-domains = <&k3_pds 151>;
		assigned-clocks = <&k3_clks 151 2>, <&k3_clks 151 7>;
		assigned-clock-parents = <&k3_clks 151 4>,	/* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
					 <&k3_clks 151 9>;	/* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */

		usb0: usb@10000 {
			compatible = "snps,dwc3";
			reg = <0x10000 0x10000>;
			interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "peripheral",
					  "host",
					  "otg";
			maximum-speed = "high-speed";
			dr_mode = "otg";
			phys = <&usb0_phy>;
			phy-names = "usb2-phy";
			snps,dis_u3_susphy_quirk;
		};
	};

	usb0_phy: phy@4100000 {
		compatible = "ti,am654-usb2", "ti,omap-usb2";
		reg = <0x0 0x4100000 0x0 0x54>;
		syscon-phy-power = <&scm_conf 0x4000>;
		clocks = <&k3_clks 151 0>, <&k3_clks 151 1>;
		clock-names = "wkupclk", "refclk";
		#phy-cells = <0>;
	};

	dwc3_1: dwc3@4020000 {
		compatible = "ti,am654-dwc3";
		reg = <0x0 0x4020000 0x0 0x4000>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x0 0x4020000 0x20000>;
		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
		dma-coherent;
		power-domains = <&k3_pds 152>;
		assigned-clocks = <&k3_clks 152 2>;
		assigned-clock-parents = <&k3_clks 152 4>;	/* set REF_CLK to 20MHz i.e. PER0_PLL/48 */

		usb1: usb@10000 {
			compatible = "snps,dwc3";
			reg = <0x10000 0x10000>;
			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "peripheral",
					  "host",
					  "otg";
			maximum-speed = "high-speed";
			dr_mode = "otg";
			phys = <&usb1_phy>;
			phy-names = "usb2-phy";
		};
	};

	usb1_phy: phy@4110000 {
		compatible = "ti,am654-usb2", "ti,omap-usb2";
		reg = <0x0 0x4110000 0x0 0x54>;
		syscon-phy-power = <&scm_conf 0x4020>;
		clocks = <&k3_clks 152 0>, <&k3_clks 152 1>;
		clock-names = "wkupclk", "refclk";
		#phy-cells = <0>;
	};
};