| /* SPDX-License-Identifier: GPL-2.0 */ |
| #ifndef _ASM_X86_SPINLOCK_H |
| #define _ASM_X86_SPINLOCK_H |
| |
| #include <linux/jump_label.h> |
| #include <linux/atomic.h> |
| #include <asm/page.h> |
| #include <asm/processor.h> |
| #include <linux/compiler.h> |
| #include <asm/paravirt.h> |
| #include <asm/bitops.h> |
| |
| /* |
| * Your basic SMP spinlocks, allowing only a single CPU anywhere |
| * |
| * Simple spin lock operations. There are two variants, one clears IRQ's |
| * on the local processor, one does not. |
| * |
| * These are fair FIFO ticket locks, which support up to 2^16 CPUs. |
| * |
| * (the type definitions are in asm/spinlock_types.h) |
| */ |
| |
| /* How long a lock should spin before we consider blocking */ |
| #define SPIN_THRESHOLD (1 << 15) |
| |
| #include <asm/qspinlock.h> |
| |
| /* |
| * Read-write spinlocks, allowing multiple readers |
| * but only one writer. |
| * |
| * NOTE! it is quite common to have readers in interrupts |
| * but no interrupt writers. For those circumstances we |
| * can "mix" irq-safe locks - any writer needs to get a |
| * irq-safe write-lock, but readers can get non-irqsafe |
| * read-locks. |
| * |
| * On x86, we implement read-write locks using the generic qrwlock with |
| * x86 specific optimization. |
| */ |
| |
| #include <asm/qrwlock.h> |
| |
| #endif /* _ASM_X86_SPINLOCK_H */ |
