| # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) |
| # Copyright (C) 2019 Texas Instruments Incorporated |
| %YAML 1.2 |
| --- |
| $id: "http://devicetree.org/schemas/net/ti,dp83869.yaml#" |
| $schema: "http://devicetree.org/meta-schemas/core.yaml#" |
| |
| title: TI DP83869 ethernet PHY |
| |
| allOf: |
| - $ref: "ethernet-phy.yaml#" |
| |
| maintainers: |
| - Dan Murphy <dmurphy@ti.com> |
| |
| description: | |
| The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver |
| with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and |
| 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and |
| 100BASE-FX Fiber protocols. |
| This device interfaces to the MAC layer through Reduced GMII (RGMII) and |
| SGMII The DP83869HM supports Media Conversion in Managed mode. In this mode, |
| the DP83869HM can run 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX |
| conversions. The DP83869HM can also support Bridge Conversion from RGMII to |
| SGMII and SGMII to RGMII. |
| |
| Specifications about the Ethernet PHY can be found at: |
| http://www.ti.com/lit/ds/symlink/dp83869hm.pdf |
| |
| properties: |
| reg: |
| maxItems: 1 |
| |
| ti,min-output-impedance: |
| type: boolean |
| description: | |
| MAC Interface Impedance control to set the programmable output impedance |
| to a minimum value (35 ohms). |
| |
| ti,max-output-impedance: |
| type: boolean |
| description: | |
| MAC Interface Impedance control to set the programmable output impedance |
| to a maximum value (70 ohms). |
| |
| tx-fifo-depth: |
| $ref: /schemas/types.yaml#definitions/uint32 |
| description: | |
| Transmitt FIFO depth see dt-bindings/net/ti-dp83869.h for values |
| |
| rx-fifo-depth: |
| $ref: /schemas/types.yaml#definitions/uint32 |
| description: | |
| Receive FIFO depth see dt-bindings/net/ti-dp83869.h for values |
| |
| ti,clk-output-sel: |
| $ref: /schemas/types.yaml#definitions/uint32 |
| description: | |
| Muxing option for CLK_OUT pin see dt-bindings/net/ti-dp83869.h for values. |
| |
| ti,op-mode: |
| $ref: /schemas/types.yaml#definitions/uint32 |
| description: | |
| Operational mode for the PHY. If this is not set then the operational |
| mode is set by the straps. see dt-bindings/net/ti-dp83869.h for values |
| |
| rx-internal-delay-ps: |
| description: Delay is in pico seconds |
| enum: [ 250, 500, 750, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000, |
| 3250, 3500, 3750, 4000 ] |
| default: 2000 |
| |
| tx-internal-delay-ps: |
| description: Delay is in pico seconds |
| enum: [ 250, 500, 750, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000, |
| 3250, 3500, 3750, 4000 ] |
| default: 2000 |
| |
| required: |
| - reg |
| |
| unevaluatedProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/net/ti-dp83869.h> |
| mdio0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| ethphy0: ethernet-phy@0 { |
| reg = <0>; |
| tx-fifo-depth = <DP83869_PHYCR_FIFO_DEPTH_4_B_NIB>; |
| rx-fifo-depth = <DP83869_PHYCR_FIFO_DEPTH_4_B_NIB>; |
| ti,op-mode = <DP83869_RGMII_COPPER_ETHERNET>; |
| ti,max-output-impedance = "true"; |
| ti,clk-output-sel = <DP83869_CLK_O_SEL_CHN_A_RCLK>; |
| rx-internal-delay-ps = <2000>; |
| tx-internal-delay-ps = <2000>; |
| }; |
| }; |