tree 7994b9f41bdc822aec2be715546affd60e6d5609
parent 91a290c4573679a70e242495ac3dbf12b39fb108
author Rajendra Nayak <rnayak@ti.com> 1333556401 -0600
committer Paul Walmsley <paul@pwsan.com> 1333572769 -0600

ARM: OMAP4: clock data: Force a DPLL clkdm/pwrdm ON before a relock

All DPLLs except USB are in ALWON powerdomain. Make sure the
clkdm/pwrdm for USB DPLL (l3init) is turned on before attempting
a DPLL relock. So, mark the database accordingly.

Without this fix, it was seen that DPLL relock fails while testing
relock in a loop of USB DPLL.

Cc: Nishanth Menon <nm@ti.com>
Tested-by: Ameya Palande <ameya.palande@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>