| commit | cd8869f4cb257f22b89495ca40f5281e58ba359c | [log] [tgz] |
|---|---|---|
| author | Max Filippov <jcmvbkbc@gmail.com> | Mon Aug 12 15:01:30 2019 -0700 |
| committer | Max Filippov <jcmvbkbc@gmail.com> | Mon Aug 12 15:05:48 2019 -0700 |
| tree | 3b5759dd18c3adf1974e5ee191ed42f75b283673 | |
| parent | d45331b00ddb179e291766617259261c112db872 [diff] |
xtensa: add missing isync to the cpu_reset TLB code ITLB entry modifications must be followed by the isync instruction before the new entries are possibly used. cpu_reset lacks one isync between ITLB way 6 initialization and jump to the identity mapping. Add missing isync to xtensa cpu_reset. Cc: stable@vger.kernel.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>