)]}'
{
  "commit": "6edd94db250038c8fdf176f23ca4017d2f312509",
  "tree": "1b84937950d769ef4b5d23c61b55b5a63f26104d",
  "parents": [
    "d48b97b403d23f6df0b990cee652bdf9a52337a3"
  ],
  "author": {
    "name": "Tarun Kanti DebBarma",
    "email": "tarun.kanti@ti.com",
    "time": "Mon Apr 30 12:50:12 2012 +0530"
  },
  "committer": {
    "name": "Kevin Hilman",
    "email": "khilman@ti.com",
    "time": "Thu May 10 07:16:15 2012 -0700"
  },
  "message": "gpio/omap: fix incorrect initialization of omap_gpio_mod_init\n\nInitialization of irqenable, irqstatus registers is the common\noperation done in this function for all OMAP platforms, viz. OMAP1,\nOMAP2+. The latter _gpio_rmw()\u0027s which supposedly got introduced\nwrongly to take care of OMAP2+ platforms were overwriting initially\nprogrammed OMAP1 value breaking functionality on OMAP1.\nSomehow incorrect assumption was made that each _gpio_rmw()\u0027s were\nmutually exclusive. On close observation it is found that the first\n_gpio_rmw() which is supposedly done to take care of OMAP1 platform\nis generic enough and takes care of OMAP2+ platform as well.\nTherefore remove the latter _gpio_rmw() to irqenable as they are\nredundant now.\n\nWriting to ctrl and debounce_en registers for OMAP2+ platforms are\nmodified to match the original(pre-cleanup) code where the registers\nare initialized with 0. In the cleanup series since we are using\n_gpio_rmw(reg, 0, 1), instead of __raw_writel(), we are just reading\nand writing the same values to ctrl and debounce_en. This is not an\nissue for debounce_en register because it has 0x0 as the default value.\nBut in the case of ctrl register the default value is 0x2 (GATINGRATIO\n \u003d 0x1) so that we end up writing 0x2 instead of intended 0 value.\nTherefore changing back to __raw_writel() as this is sufficient for\nthis case besides simpler to understand.\n\nAlso, change irqstatus initalization logic that avoids comparison\nwith bool, besides making it fit in a single line.\n\nCc: stable@vger.kernel.org\nCc: Tony Lindgren \u003ctony@atomide.com\u003e\nCc: Kevin Hilman \u003ckhilman@ti.com\u003e\nCc: Santosh Shilimkar \u003csantosh.shilimkar@ti.com\u003e\nCc: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\nReported-by: Janusz Krzysztofik \u003cjkrzyszt@tis.icnet.pl\u003e\nTested-by: Janusz Krzysztofik \u003cjkrzyszt@tis.icnet.pl\u003e\nSigned-off-by: Tarun Kanti DebBarma \u003ctarun.kanti@ti.com\u003e\nSigned-off-by: Kevin Hilman \u003ckhilman@ti.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "1adc2ec1e3835ae98e230b160b63264eb0afb3bc",
      "old_mode": 33188,
      "old_path": "drivers/gpio/gpio-omap.c",
      "new_id": "4461540653a89526896d61adb0c364f2fa21d6fc",
      "new_mode": 33188,
      "new_path": "drivers/gpio/gpio-omap.c"
    }
  ]
}