)]}'
{
  "commit": "6f09a9250a5d76c0765cd51a33e0a042e9761cfc",
  "tree": "764db1dcd196fc1c272a8c6930924a5bc60623bc",
  "parents": [
    "647fb47dfabeffd2f1706013ebf5cfc92b70d273"
  ],
  "author": {
    "name": "John Keller",
    "email": "jpk@sgi.com",
    "time": "Tue Jan 30 01:17:37 2007 -0500"
  },
  "committer": {
    "name": "Len Brown",
    "email": "len.brown@intel.com",
    "time": "Fri Feb 02 22:14:35 2007 -0500"
  },
  "message": "Altix: ACPI SSDT PCI device support\n\nAdd SN platform support for running with an ACPI\ncapable PROM that defines PCI devices in SSDT\ntables. There is a SSDT table for every occupied\nslot on a root bus, containing info for every\nPPB and/or device on the bus. The SSDTs will be\ndynamically loaded/unloaded at hotplug enable/disable.\n\nPlatform specific information that is currently\npassed via a SAL call, will now be passed via the\nVendor resource in the ACPI Device object(s) defined\nin each SSDT.\n\nSigned-off-by: John Keller \u003cjpk@sgi.com\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Len Brown \u003clen.brown@intel.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "cb96b4ea7df6970825151bf3b5f0dd014a43c063",
      "old_mode": 33188,
      "old_path": "arch/ia64/sn/kernel/io_acpi_init.c",
      "new_id": "8c331ca6e5c9088a8a8542ebae195306f4d9a6bc",
      "new_mode": 33188,
      "new_path": "arch/ia64/sn/kernel/io_acpi_init.c"
    },
    {
      "type": "modify",
      "old_id": "75f0379958f903f6d600826150593f18b2f1fa33",
      "old_mode": 33188,
      "old_path": "arch/ia64/sn/kernel/io_common.c",
      "new_id": "d48bcd83253c28073050377cbd5f937882a3f6a5",
      "new_mode": 33188,
      "new_path": "arch/ia64/sn/kernel/io_common.c"
    },
    {
      "type": "modify",
      "old_id": "9ad843e0383b53a1745591defbf2497461a73471",
      "old_mode": 33188,
      "old_path": "arch/ia64/sn/kernel/io_init.c",
      "new_id": "600be3ebae05b660247050b2393057f22b49eda3",
      "new_mode": 33188,
      "new_path": "arch/ia64/sn/kernel/io_init.c"
    },
    {
      "type": "modify",
      "old_id": "6846dc9b432dc7a2582cf451a7a68c7c8bb2bb2b",
      "old_mode": 33188,
      "old_path": "arch/ia64/sn/pci/pcibr/pcibr_provider.c",
      "new_id": "04a8256017eb6ab8c0294580c52b12b584c15102",
      "new_mode": 33188,
      "new_path": "arch/ia64/sn/pci/pcibr/pcibr_provider.c"
    },
    {
      "type": "modify",
      "old_id": "7d6cb3b686e7313cfb586afdd5597f95bab6fae6",
      "old_mode": 33188,
      "old_path": "include/asm-ia64/sn/acpi.h",
      "new_id": "9ce2801cbd5725a87fa19953d3eed714889febe6",
      "new_mode": 33188,
      "new_path": "include/asm-ia64/sn/acpi.h"
    },
    {
      "type": "modify",
      "old_id": "da3eade0cae2cbbfdfca830403cf0889be10b58e",
      "old_mode": 33188,
      "old_path": "include/asm-ia64/sn/pcibr_provider.h",
      "new_id": "17cb6cc3f21a8dc8899b55aaaa115436a2d2fa9a",
      "new_mode": 33188,
      "new_path": "include/asm-ia64/sn/pcibr_provider.h"
    },
    {
      "type": "modify",
      "old_id": "9fe89a93d880b1bfcfd06ea84b9b5d5c35862a93",
      "old_mode": 33188,
      "old_path": "include/asm-ia64/sn/pcidev.h",
      "new_id": "1c2382cea807b5431d638b23451a1994bad7e50e",
      "new_mode": 33188,
      "new_path": "include/asm-ia64/sn/pcidev.h"
    }
  ]
}