blob: 75e8712e903a6ce9381e4cc0576bbcde32fb08e9 [file] [log] [blame]
# SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
# Copyright (C) 2020 Texas Instruments Incorporated
%YAML 1.2
---
$id: "http://devicetree.org/schemas/net/ti,dp83822.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: TI DP83822 ethernet PHY
maintainers:
- Dan Murphy <dmurphy@ti.com>
description: |
The DP83822 is a low-power, single-port, 10/100 Mbps Ethernet PHY. It
provides all of the physical layer functions needed to transmit and receive
data over standard, twisted-pair cables or to connect to an external,
fiber-optic transceiver. Additionally, the DP83822 provides flexibility to
connect to a MAC through a standard MII, RMII, or RGMII interface
Specifications about the Ethernet PHY can be found at:
http://www.ti.com/lit/ds/symlink/dp83822i.pdf
allOf:
- $ref: "ethernet-phy.yaml#"
properties:
reg:
maxItems: 1
ti,link-loss-low:
type: boolean
description: |
DP83822 PHY in Fiber mode only.
Sets the DP83822 to detect a link drop condition when the signal goes
high. If not set then link drop will occur when the signal goes low.
This property is only applicable if the fiber mode support is strapped
to on.
ti,fiber-mode:
type: boolean
description: |
DP83822 PHY only.
If present the DP83822 PHY is configured to operate in fiber mode
Fiber mode support can also be strapped. If the strap pin is not set
correctly or not set at all then this boolean can be used to enable it.
If the fiber mode is not strapped then signal detection for the PHY
is disabled.
In fiber mode, auto-negotiation is disabled and the PHY can only work in
100base-fx (full and half duplex) modes.
rx-internal-delay-ps:
description: |
DP83822 PHY only.
Setting this property to a non-zero number sets the RX internal delay
for the PHY. The internal delay for the PHY is fixed to 3.5ns relative
to receive data.
tx-internal-delay-ps:
description: |
DP83822 PHY only.
Setting this property to a non-zero number sets the TX internal delay
for the PHY. The internal delay for the PHY is fixed to 3.5ns relative
to transmit data.
required:
- reg
unevaluatedProperties: false
examples:
- |
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@0 {
reg = <0>;
rx-internal-delay-ps = <1>;
tx-internal-delay-ps = <1>;
};
};
...