| /* |
| * Copyright 2012 Red Hat Inc. |
| * |
| * Permission is hereby granted, free of charge, to any person obtaining a |
| * copy of this software and associated documentation files (the "Software"), |
| * to deal in the Software without restriction, including without limitation |
| * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| * and/or sell copies of the Software, and to permit persons to whom the |
| * Software is furnished to do so, subject to the following conditions: |
| * |
| * The above copyright notice and this permission notice shall be included in |
| * all copies or substantial portions of the Software. |
| * |
| * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| * OTHER DEALINGS IN THE SOFTWARE. |
| * |
| * Authors: Ben Skeggs |
| */ |
| #include "priv.h" |
| #include "acpi.h" |
| |
| #include <core/notify.h> |
| #include <core/option.h> |
| |
| #include <subdev/bios.h> |
| #include <subdev/therm.h> |
| |
| static DEFINE_MUTEX(nv_devices_mutex); |
| static LIST_HEAD(nv_devices); |
| |
| static struct nvkm_device * |
| nvkm_device_find_locked(u64 handle) |
| { |
| struct nvkm_device *device; |
| list_for_each_entry(device, &nv_devices, head) { |
| if (device->handle == handle) |
| return device; |
| } |
| return NULL; |
| } |
| |
| struct nvkm_device * |
| nvkm_device_find(u64 handle) |
| { |
| struct nvkm_device *device; |
| mutex_lock(&nv_devices_mutex); |
| device = nvkm_device_find_locked(handle); |
| mutex_unlock(&nv_devices_mutex); |
| return device; |
| } |
| |
| int |
| nvkm_device_list(u64 *name, int size) |
| { |
| struct nvkm_device *device; |
| int nr = 0; |
| mutex_lock(&nv_devices_mutex); |
| list_for_each_entry(device, &nv_devices, head) { |
| if (nr++ < size) |
| name[nr - 1] = device->handle; |
| } |
| mutex_unlock(&nv_devices_mutex); |
| return nr; |
| } |
| |
| static const struct nvkm_device_chip |
| null_chipset = { |
| .name = "NULL", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv4_chipset = { |
| .name = "NV04", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv04_bus_new }, |
| .clk = { 0x00000001, nv04_clk_new }, |
| .devinit = { 0x00000001, nv04_devinit_new }, |
| .fb = { 0x00000001, nv04_fb_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv04_instmem_new }, |
| .mc = { 0x00000001, nv04_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv04_pci_new }, |
| .timer = { 0x00000001, nv04_timer_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv04_fifo_new }, |
| .gr = { 0x00000001, nv04_gr_new }, |
| .sw = { 0x00000001, nv04_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv5_chipset = { |
| .name = "NV05", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv04_bus_new }, |
| .clk = { 0x00000001, nv04_clk_new }, |
| .devinit = { 0x00000001, nv05_devinit_new }, |
| .fb = { 0x00000001, nv04_fb_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv04_instmem_new }, |
| .mc = { 0x00000001, nv04_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv04_pci_new }, |
| .timer = { 0x00000001, nv04_timer_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv04_fifo_new }, |
| .gr = { 0x00000001, nv04_gr_new }, |
| .sw = { 0x00000001, nv04_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv10_chipset = { |
| .name = "NV10", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv04_bus_new }, |
| .clk = { 0x00000001, nv04_clk_new }, |
| .devinit = { 0x00000001, nv10_devinit_new }, |
| .fb = { 0x00000001, nv10_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv04_instmem_new }, |
| .mc = { 0x00000001, nv04_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv04_pci_new }, |
| .timer = { 0x00000001, nv04_timer_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .gr = { 0x00000001, nv10_gr_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv11_chipset = { |
| .name = "NV11", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv04_bus_new }, |
| .clk = { 0x00000001, nv04_clk_new }, |
| .devinit = { 0x00000001, nv10_devinit_new }, |
| .fb = { 0x00000001, nv10_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv04_instmem_new }, |
| .mc = { 0x00000001, nv11_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv04_pci_new }, |
| .timer = { 0x00000001, nv04_timer_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv10_fifo_new }, |
| .gr = { 0x00000001, nv15_gr_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv15_chipset = { |
| .name = "NV15", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv04_bus_new }, |
| .clk = { 0x00000001, nv04_clk_new }, |
| .devinit = { 0x00000001, nv10_devinit_new }, |
| .fb = { 0x00000001, nv10_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv04_instmem_new }, |
| .mc = { 0x00000001, nv04_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv04_pci_new }, |
| .timer = { 0x00000001, nv04_timer_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv10_fifo_new }, |
| .gr = { 0x00000001, nv15_gr_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv17_chipset = { |
| .name = "NV17", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv04_bus_new }, |
| .clk = { 0x00000001, nv04_clk_new }, |
| .devinit = { 0x00000001, nv10_devinit_new }, |
| .fb = { 0x00000001, nv10_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv04_instmem_new }, |
| .mc = { 0x00000001, nv17_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv04_pci_new }, |
| .timer = { 0x00000001, nv04_timer_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv17_fifo_new }, |
| .gr = { 0x00000001, nv17_gr_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv18_chipset = { |
| .name = "NV18", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv04_bus_new }, |
| .clk = { 0x00000001, nv04_clk_new }, |
| .devinit = { 0x00000001, nv10_devinit_new }, |
| .fb = { 0x00000001, nv10_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv04_instmem_new }, |
| .mc = { 0x00000001, nv17_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv04_pci_new }, |
| .timer = { 0x00000001, nv04_timer_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv17_fifo_new }, |
| .gr = { 0x00000001, nv17_gr_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv1a_chipset = { |
| .name = "nForce", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv04_bus_new }, |
| .clk = { 0x00000001, nv04_clk_new }, |
| .devinit = { 0x00000001, nv1a_devinit_new }, |
| .fb = { 0x00000001, nv1a_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv04_instmem_new }, |
| .mc = { 0x00000001, nv04_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv04_pci_new }, |
| .timer = { 0x00000001, nv04_timer_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv10_fifo_new }, |
| .gr = { 0x00000001, nv15_gr_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv1f_chipset = { |
| .name = "nForce2", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv04_bus_new }, |
| .clk = { 0x00000001, nv04_clk_new }, |
| .devinit = { 0x00000001, nv1a_devinit_new }, |
| .fb = { 0x00000001, nv1a_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv04_instmem_new }, |
| .mc = { 0x00000001, nv17_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv04_pci_new }, |
| .timer = { 0x00000001, nv04_timer_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv17_fifo_new }, |
| .gr = { 0x00000001, nv17_gr_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv20_chipset = { |
| .name = "NV20", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv04_bus_new }, |
| .clk = { 0x00000001, nv04_clk_new }, |
| .devinit = { 0x00000001, nv20_devinit_new }, |
| .fb = { 0x00000001, nv20_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv04_instmem_new }, |
| .mc = { 0x00000001, nv17_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv04_pci_new }, |
| .timer = { 0x00000001, nv04_timer_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv17_fifo_new }, |
| .gr = { 0x00000001, nv20_gr_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv25_chipset = { |
| .name = "NV25", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv04_bus_new }, |
| .clk = { 0x00000001, nv04_clk_new }, |
| .devinit = { 0x00000001, nv20_devinit_new }, |
| .fb = { 0x00000001, nv25_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv04_instmem_new }, |
| .mc = { 0x00000001, nv17_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv04_pci_new }, |
| .timer = { 0x00000001, nv04_timer_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv17_fifo_new }, |
| .gr = { 0x00000001, nv25_gr_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv28_chipset = { |
| .name = "NV28", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv04_bus_new }, |
| .clk = { 0x00000001, nv04_clk_new }, |
| .devinit = { 0x00000001, nv20_devinit_new }, |
| .fb = { 0x00000001, nv25_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv04_instmem_new }, |
| .mc = { 0x00000001, nv17_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv04_pci_new }, |
| .timer = { 0x00000001, nv04_timer_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv17_fifo_new }, |
| .gr = { 0x00000001, nv25_gr_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv2a_chipset = { |
| .name = "NV2A", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv04_bus_new }, |
| .clk = { 0x00000001, nv04_clk_new }, |
| .devinit = { 0x00000001, nv20_devinit_new }, |
| .fb = { 0x00000001, nv25_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv04_instmem_new }, |
| .mc = { 0x00000001, nv17_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv04_pci_new }, |
| .timer = { 0x00000001, nv04_timer_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv17_fifo_new }, |
| .gr = { 0x00000001, nv2a_gr_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv30_chipset = { |
| .name = "NV30", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv04_bus_new }, |
| .clk = { 0x00000001, nv04_clk_new }, |
| .devinit = { 0x00000001, nv20_devinit_new }, |
| .fb = { 0x00000001, nv30_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv04_instmem_new }, |
| .mc = { 0x00000001, nv17_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv04_pci_new }, |
| .timer = { 0x00000001, nv04_timer_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv17_fifo_new }, |
| .gr = { 0x00000001, nv30_gr_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv31_chipset = { |
| .name = "NV31", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv31_bus_new }, |
| .clk = { 0x00000001, nv04_clk_new }, |
| .devinit = { 0x00000001, nv20_devinit_new }, |
| .fb = { 0x00000001, nv30_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv04_instmem_new }, |
| .mc = { 0x00000001, nv17_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv04_pci_new }, |
| .timer = { 0x00000001, nv04_timer_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv17_fifo_new }, |
| .gr = { 0x00000001, nv30_gr_new }, |
| .mpeg = { 0x00000001, nv31_mpeg_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv34_chipset = { |
| .name = "NV34", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv31_bus_new }, |
| .clk = { 0x00000001, nv04_clk_new }, |
| .devinit = { 0x00000001, nv10_devinit_new }, |
| .fb = { 0x00000001, nv10_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv04_instmem_new }, |
| .mc = { 0x00000001, nv17_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv04_pci_new }, |
| .timer = { 0x00000001, nv04_timer_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv17_fifo_new }, |
| .gr = { 0x00000001, nv34_gr_new }, |
| .mpeg = { 0x00000001, nv31_mpeg_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv35_chipset = { |
| .name = "NV35", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv04_bus_new }, |
| .clk = { 0x00000001, nv04_clk_new }, |
| .devinit = { 0x00000001, nv20_devinit_new }, |
| .fb = { 0x00000001, nv35_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv04_instmem_new }, |
| .mc = { 0x00000001, nv17_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv04_pci_new }, |
| .timer = { 0x00000001, nv04_timer_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv17_fifo_new }, |
| .gr = { 0x00000001, nv35_gr_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv36_chipset = { |
| .name = "NV36", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv31_bus_new }, |
| .clk = { 0x00000001, nv04_clk_new }, |
| .devinit = { 0x00000001, nv20_devinit_new }, |
| .fb = { 0x00000001, nv36_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv04_instmem_new }, |
| .mc = { 0x00000001, nv17_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv04_pci_new }, |
| .timer = { 0x00000001, nv04_timer_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv17_fifo_new }, |
| .gr = { 0x00000001, nv35_gr_new }, |
| .mpeg = { 0x00000001, nv31_mpeg_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv40_chipset = { |
| .name = "NV40", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv31_bus_new }, |
| .clk = { 0x00000001, nv40_clk_new }, |
| .devinit = { 0x00000001, nv1a_devinit_new }, |
| .fb = { 0x00000001, nv40_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv40_instmem_new }, |
| .mc = { 0x00000001, nv17_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv40_pci_new }, |
| .therm = { 0x00000001, nv40_therm_new }, |
| .timer = { 0x00000001, nv40_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv40_fifo_new }, |
| .gr = { 0x00000001, nv40_gr_new }, |
| .mpeg = { 0x00000001, nv40_mpeg_new }, |
| .pm = { 0x00000001, nv40_pm_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv41_chipset = { |
| .name = "NV41", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv31_bus_new }, |
| .clk = { 0x00000001, nv40_clk_new }, |
| .devinit = { 0x00000001, nv1a_devinit_new }, |
| .fb = { 0x00000001, nv41_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv40_instmem_new }, |
| .mc = { 0x00000001, nv17_mc_new }, |
| .mmu = { 0x00000001, nv41_mmu_new }, |
| .pci = { 0x00000001, nv40_pci_new }, |
| .therm = { 0x00000001, nv40_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv40_fifo_new }, |
| .gr = { 0x00000001, nv40_gr_new }, |
| .mpeg = { 0x00000001, nv40_mpeg_new }, |
| .pm = { 0x00000001, nv40_pm_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv42_chipset = { |
| .name = "NV42", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv31_bus_new }, |
| .clk = { 0x00000001, nv40_clk_new }, |
| .devinit = { 0x00000001, nv1a_devinit_new }, |
| .fb = { 0x00000001, nv41_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv40_instmem_new }, |
| .mc = { 0x00000001, nv17_mc_new }, |
| .mmu = { 0x00000001, nv41_mmu_new }, |
| .pci = { 0x00000001, nv40_pci_new }, |
| .therm = { 0x00000001, nv40_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv40_fifo_new }, |
| .gr = { 0x00000001, nv40_gr_new }, |
| .mpeg = { 0x00000001, nv40_mpeg_new }, |
| .pm = { 0x00000001, nv40_pm_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv43_chipset = { |
| .name = "NV43", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv31_bus_new }, |
| .clk = { 0x00000001, nv40_clk_new }, |
| .devinit = { 0x00000001, nv1a_devinit_new }, |
| .fb = { 0x00000001, nv41_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv40_instmem_new }, |
| .mc = { 0x00000001, nv17_mc_new }, |
| .mmu = { 0x00000001, nv41_mmu_new }, |
| .pci = { 0x00000001, nv40_pci_new }, |
| .therm = { 0x00000001, nv40_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv40_fifo_new }, |
| .gr = { 0x00000001, nv40_gr_new }, |
| .mpeg = { 0x00000001, nv40_mpeg_new }, |
| .pm = { 0x00000001, nv40_pm_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv44_chipset = { |
| .name = "NV44", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv31_bus_new }, |
| .clk = { 0x00000001, nv40_clk_new }, |
| .devinit = { 0x00000001, nv1a_devinit_new }, |
| .fb = { 0x00000001, nv44_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv40_instmem_new }, |
| .mc = { 0x00000001, nv44_mc_new }, |
| .mmu = { 0x00000001, nv44_mmu_new }, |
| .pci = { 0x00000001, nv40_pci_new }, |
| .therm = { 0x00000001, nv40_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv40_fifo_new }, |
| .gr = { 0x00000001, nv44_gr_new }, |
| .mpeg = { 0x00000001, nv44_mpeg_new }, |
| .pm = { 0x00000001, nv40_pm_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv45_chipset = { |
| .name = "NV45", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv31_bus_new }, |
| .clk = { 0x00000001, nv40_clk_new }, |
| .devinit = { 0x00000001, nv1a_devinit_new }, |
| .fb = { 0x00000001, nv40_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv40_instmem_new }, |
| .mc = { 0x00000001, nv17_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv40_pci_new }, |
| .therm = { 0x00000001, nv40_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv40_fifo_new }, |
| .gr = { 0x00000001, nv40_gr_new }, |
| .mpeg = { 0x00000001, nv44_mpeg_new }, |
| .pm = { 0x00000001, nv40_pm_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv46_chipset = { |
| .name = "G72", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv31_bus_new }, |
| .clk = { 0x00000001, nv40_clk_new }, |
| .devinit = { 0x00000001, nv1a_devinit_new }, |
| .fb = { 0x00000001, nv46_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv40_instmem_new }, |
| .mc = { 0x00000001, nv44_mc_new }, |
| .mmu = { 0x00000001, nv44_mmu_new }, |
| .pci = { 0x00000001, nv46_pci_new }, |
| .therm = { 0x00000001, nv40_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv40_fifo_new }, |
| .gr = { 0x00000001, nv44_gr_new }, |
| .mpeg = { 0x00000001, nv44_mpeg_new }, |
| .pm = { 0x00000001, nv40_pm_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv47_chipset = { |
| .name = "G70", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv31_bus_new }, |
| .clk = { 0x00000001, nv40_clk_new }, |
| .devinit = { 0x00000001, nv1a_devinit_new }, |
| .fb = { 0x00000001, nv47_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv40_instmem_new }, |
| .mc = { 0x00000001, nv17_mc_new }, |
| .mmu = { 0x00000001, nv41_mmu_new }, |
| .pci = { 0x00000001, nv40_pci_new }, |
| .therm = { 0x00000001, nv40_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv40_fifo_new }, |
| .gr = { 0x00000001, nv40_gr_new }, |
| .mpeg = { 0x00000001, nv44_mpeg_new }, |
| .pm = { 0x00000001, nv40_pm_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv49_chipset = { |
| .name = "G71", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv31_bus_new }, |
| .clk = { 0x00000001, nv40_clk_new }, |
| .devinit = { 0x00000001, nv1a_devinit_new }, |
| .fb = { 0x00000001, nv49_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv40_instmem_new }, |
| .mc = { 0x00000001, nv17_mc_new }, |
| .mmu = { 0x00000001, nv41_mmu_new }, |
| .pci = { 0x00000001, nv40_pci_new }, |
| .therm = { 0x00000001, nv40_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv40_fifo_new }, |
| .gr = { 0x00000001, nv40_gr_new }, |
| .mpeg = { 0x00000001, nv44_mpeg_new }, |
| .pm = { 0x00000001, nv40_pm_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv4a_chipset = { |
| .name = "NV44A", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv31_bus_new }, |
| .clk = { 0x00000001, nv40_clk_new }, |
| .devinit = { 0x00000001, nv1a_devinit_new }, |
| .fb = { 0x00000001, nv44_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv40_instmem_new }, |
| .mc = { 0x00000001, nv44_mc_new }, |
| .mmu = { 0x00000001, nv04_mmu_new }, |
| .pci = { 0x00000001, nv40_pci_new }, |
| .therm = { 0x00000001, nv40_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv40_fifo_new }, |
| .gr = { 0x00000001, nv44_gr_new }, |
| .mpeg = { 0x00000001, nv44_mpeg_new }, |
| .pm = { 0x00000001, nv40_pm_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv4b_chipset = { |
| .name = "G73", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv31_bus_new }, |
| .clk = { 0x00000001, nv40_clk_new }, |
| .devinit = { 0x00000001, nv1a_devinit_new }, |
| .fb = { 0x00000001, nv49_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv40_instmem_new }, |
| .mc = { 0x00000001, nv17_mc_new }, |
| .mmu = { 0x00000001, nv41_mmu_new }, |
| .pci = { 0x00000001, nv40_pci_new }, |
| .therm = { 0x00000001, nv40_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv40_fifo_new }, |
| .gr = { 0x00000001, nv40_gr_new }, |
| .mpeg = { 0x00000001, nv44_mpeg_new }, |
| .pm = { 0x00000001, nv40_pm_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv4c_chipset = { |
| .name = "C61", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv31_bus_new }, |
| .clk = { 0x00000001, nv40_clk_new }, |
| .devinit = { 0x00000001, nv1a_devinit_new }, |
| .fb = { 0x00000001, nv46_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv40_instmem_new }, |
| .mc = { 0x00000001, nv44_mc_new }, |
| .mmu = { 0x00000001, nv44_mmu_new }, |
| .pci = { 0x00000001, nv4c_pci_new }, |
| .therm = { 0x00000001, nv40_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv40_fifo_new }, |
| .gr = { 0x00000001, nv44_gr_new }, |
| .mpeg = { 0x00000001, nv44_mpeg_new }, |
| .pm = { 0x00000001, nv40_pm_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv4e_chipset = { |
| .name = "C51", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv31_bus_new }, |
| .clk = { 0x00000001, nv40_clk_new }, |
| .devinit = { 0x00000001, nv1a_devinit_new }, |
| .fb = { 0x00000001, nv4e_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv4e_i2c_new }, |
| .imem = { 0x00000001, nv40_instmem_new }, |
| .mc = { 0x00000001, nv44_mc_new }, |
| .mmu = { 0x00000001, nv44_mmu_new }, |
| .pci = { 0x00000001, nv4c_pci_new }, |
| .therm = { 0x00000001, nv40_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv40_fifo_new }, |
| .gr = { 0x00000001, nv44_gr_new }, |
| .mpeg = { 0x00000001, nv44_mpeg_new }, |
| .pm = { 0x00000001, nv40_pm_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv50_chipset = { |
| .name = "G80", |
| .bar = { 0x00000001, nv50_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv50_bus_new }, |
| .clk = { 0x00000001, nv50_clk_new }, |
| .devinit = { 0x00000001, nv50_devinit_new }, |
| .fb = { 0x00000001, nv50_fb_new }, |
| .fuse = { 0x00000001, nv50_fuse_new }, |
| .gpio = { 0x00000001, nv50_gpio_new }, |
| .i2c = { 0x00000001, nv50_i2c_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .mc = { 0x00000001, nv50_mc_new }, |
| .mmu = { 0x00000001, nv50_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, nv46_pci_new }, |
| .therm = { 0x00000001, nv50_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .disp = { 0x00000001, nv50_disp_new }, |
| .dma = { 0x00000001, nv50_dma_new }, |
| .fifo = { 0x00000001, nv50_fifo_new }, |
| .gr = { 0x00000001, nv50_gr_new }, |
| .mpeg = { 0x00000001, nv50_mpeg_new }, |
| .pm = { 0x00000001, nv50_pm_new }, |
| .sw = { 0x00000001, nv50_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv63_chipset = { |
| .name = "C73", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv31_bus_new }, |
| .clk = { 0x00000001, nv40_clk_new }, |
| .devinit = { 0x00000001, nv1a_devinit_new }, |
| .fb = { 0x00000001, nv46_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv40_instmem_new }, |
| .mc = { 0x00000001, nv44_mc_new }, |
| .mmu = { 0x00000001, nv44_mmu_new }, |
| .pci = { 0x00000001, nv4c_pci_new }, |
| .therm = { 0x00000001, nv40_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv40_fifo_new }, |
| .gr = { 0x00000001, nv44_gr_new }, |
| .mpeg = { 0x00000001, nv44_mpeg_new }, |
| .pm = { 0x00000001, nv40_pm_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv67_chipset = { |
| .name = "C67", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv31_bus_new }, |
| .clk = { 0x00000001, nv40_clk_new }, |
| .devinit = { 0x00000001, nv1a_devinit_new }, |
| .fb = { 0x00000001, nv46_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv40_instmem_new }, |
| .mc = { 0x00000001, nv44_mc_new }, |
| .mmu = { 0x00000001, nv44_mmu_new }, |
| .pci = { 0x00000001, nv4c_pci_new }, |
| .therm = { 0x00000001, nv40_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv40_fifo_new }, |
| .gr = { 0x00000001, nv44_gr_new }, |
| .mpeg = { 0x00000001, nv44_mpeg_new }, |
| .pm = { 0x00000001, nv40_pm_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv68_chipset = { |
| .name = "C68", |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv31_bus_new }, |
| .clk = { 0x00000001, nv40_clk_new }, |
| .devinit = { 0x00000001, nv1a_devinit_new }, |
| .fb = { 0x00000001, nv46_fb_new }, |
| .gpio = { 0x00000001, nv10_gpio_new }, |
| .i2c = { 0x00000001, nv04_i2c_new }, |
| .imem = { 0x00000001, nv40_instmem_new }, |
| .mc = { 0x00000001, nv44_mc_new }, |
| .mmu = { 0x00000001, nv44_mmu_new }, |
| .pci = { 0x00000001, nv4c_pci_new }, |
| .therm = { 0x00000001, nv40_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .disp = { 0x00000001, nv04_disp_new }, |
| .dma = { 0x00000001, nv04_dma_new }, |
| .fifo = { 0x00000001, nv40_fifo_new }, |
| .gr = { 0x00000001, nv44_gr_new }, |
| .mpeg = { 0x00000001, nv44_mpeg_new }, |
| .pm = { 0x00000001, nv40_pm_new }, |
| .sw = { 0x00000001, nv10_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv84_chipset = { |
| .name = "G84", |
| .bar = { 0x00000001, g84_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv50_bus_new }, |
| .clk = { 0x00000001, g84_clk_new }, |
| .devinit = { 0x00000001, g84_devinit_new }, |
| .fb = { 0x00000001, g84_fb_new }, |
| .fuse = { 0x00000001, nv50_fuse_new }, |
| .gpio = { 0x00000001, nv50_gpio_new }, |
| .i2c = { 0x00000001, nv50_i2c_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .mc = { 0x00000001, g84_mc_new }, |
| .mmu = { 0x00000001, g84_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, g84_pci_new }, |
| .therm = { 0x00000001, g84_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .bsp = { 0x00000001, g84_bsp_new }, |
| .cipher = { 0x00000001, g84_cipher_new }, |
| .disp = { 0x00000001, g84_disp_new }, |
| .dma = { 0x00000001, nv50_dma_new }, |
| .fifo = { 0x00000001, g84_fifo_new }, |
| .gr = { 0x00000001, g84_gr_new }, |
| .mpeg = { 0x00000001, g84_mpeg_new }, |
| .pm = { 0x00000001, g84_pm_new }, |
| .sw = { 0x00000001, nv50_sw_new }, |
| .vp = { 0x00000001, g84_vp_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv86_chipset = { |
| .name = "G86", |
| .bar = { 0x00000001, g84_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv50_bus_new }, |
| .clk = { 0x00000001, g84_clk_new }, |
| .devinit = { 0x00000001, g84_devinit_new }, |
| .fb = { 0x00000001, g84_fb_new }, |
| .fuse = { 0x00000001, nv50_fuse_new }, |
| .gpio = { 0x00000001, nv50_gpio_new }, |
| .i2c = { 0x00000001, nv50_i2c_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .mc = { 0x00000001, g84_mc_new }, |
| .mmu = { 0x00000001, g84_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, g84_pci_new }, |
| .therm = { 0x00000001, g84_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .bsp = { 0x00000001, g84_bsp_new }, |
| .cipher = { 0x00000001, g84_cipher_new }, |
| .disp = { 0x00000001, g84_disp_new }, |
| .dma = { 0x00000001, nv50_dma_new }, |
| .fifo = { 0x00000001, g84_fifo_new }, |
| .gr = { 0x00000001, g84_gr_new }, |
| .mpeg = { 0x00000001, g84_mpeg_new }, |
| .pm = { 0x00000001, g84_pm_new }, |
| .sw = { 0x00000001, nv50_sw_new }, |
| .vp = { 0x00000001, g84_vp_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv92_chipset = { |
| .name = "G92", |
| .bar = { 0x00000001, g84_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, nv50_bus_new }, |
| .clk = { 0x00000001, g84_clk_new }, |
| .devinit = { 0x00000001, g84_devinit_new }, |
| .fb = { 0x00000001, g84_fb_new }, |
| .fuse = { 0x00000001, nv50_fuse_new }, |
| .gpio = { 0x00000001, nv50_gpio_new }, |
| .i2c = { 0x00000001, nv50_i2c_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .mc = { 0x00000001, g84_mc_new }, |
| .mmu = { 0x00000001, g84_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, g92_pci_new }, |
| .therm = { 0x00000001, g84_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .bsp = { 0x00000001, g84_bsp_new }, |
| .cipher = { 0x00000001, g84_cipher_new }, |
| .disp = { 0x00000001, g84_disp_new }, |
| .dma = { 0x00000001, nv50_dma_new }, |
| .fifo = { 0x00000001, g84_fifo_new }, |
| .gr = { 0x00000001, g84_gr_new }, |
| .mpeg = { 0x00000001, g84_mpeg_new }, |
| .pm = { 0x00000001, g84_pm_new }, |
| .sw = { 0x00000001, nv50_sw_new }, |
| .vp = { 0x00000001, g84_vp_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv94_chipset = { |
| .name = "G94", |
| .bar = { 0x00000001, g84_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, g94_bus_new }, |
| .clk = { 0x00000001, g84_clk_new }, |
| .devinit = { 0x00000001, g84_devinit_new }, |
| .fb = { 0x00000001, g84_fb_new }, |
| .fuse = { 0x00000001, nv50_fuse_new }, |
| .gpio = { 0x00000001, g94_gpio_new }, |
| .i2c = { 0x00000001, g94_i2c_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .mc = { 0x00000001, g84_mc_new }, |
| .mmu = { 0x00000001, g84_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, g94_pci_new }, |
| .therm = { 0x00000001, g84_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .bsp = { 0x00000001, g84_bsp_new }, |
| .cipher = { 0x00000001, g84_cipher_new }, |
| .disp = { 0x00000001, g94_disp_new }, |
| .dma = { 0x00000001, nv50_dma_new }, |
| .fifo = { 0x00000001, g84_fifo_new }, |
| .gr = { 0x00000001, g84_gr_new }, |
| .mpeg = { 0x00000001, g84_mpeg_new }, |
| .pm = { 0x00000001, g84_pm_new }, |
| .sw = { 0x00000001, nv50_sw_new }, |
| .vp = { 0x00000001, g84_vp_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv96_chipset = { |
| .name = "G96", |
| .bar = { 0x00000001, g84_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, g94_bus_new }, |
| .clk = { 0x00000001, g84_clk_new }, |
| .devinit = { 0x00000001, g84_devinit_new }, |
| .fb = { 0x00000001, g84_fb_new }, |
| .fuse = { 0x00000001, nv50_fuse_new }, |
| .gpio = { 0x00000001, g94_gpio_new }, |
| .i2c = { 0x00000001, g94_i2c_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .mc = { 0x00000001, g84_mc_new }, |
| .mmu = { 0x00000001, g84_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, g94_pci_new }, |
| .therm = { 0x00000001, g84_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .bsp = { 0x00000001, g84_bsp_new }, |
| .cipher = { 0x00000001, g84_cipher_new }, |
| .disp = { 0x00000001, g94_disp_new }, |
| .dma = { 0x00000001, nv50_dma_new }, |
| .fifo = { 0x00000001, g84_fifo_new }, |
| .gr = { 0x00000001, g84_gr_new }, |
| .mpeg = { 0x00000001, g84_mpeg_new }, |
| .pm = { 0x00000001, g84_pm_new }, |
| .sw = { 0x00000001, nv50_sw_new }, |
| .vp = { 0x00000001, g84_vp_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv98_chipset = { |
| .name = "G98", |
| .bar = { 0x00000001, g84_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, g94_bus_new }, |
| .clk = { 0x00000001, g84_clk_new }, |
| .devinit = { 0x00000001, g98_devinit_new }, |
| .fb = { 0x00000001, g84_fb_new }, |
| .fuse = { 0x00000001, nv50_fuse_new }, |
| .gpio = { 0x00000001, g94_gpio_new }, |
| .i2c = { 0x00000001, g94_i2c_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .mc = { 0x00000001, g98_mc_new }, |
| .mmu = { 0x00000001, g84_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, g94_pci_new }, |
| .therm = { 0x00000001, g84_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .disp = { 0x00000001, g94_disp_new }, |
| .dma = { 0x00000001, nv50_dma_new }, |
| .fifo = { 0x00000001, g84_fifo_new }, |
| .gr = { 0x00000001, g84_gr_new }, |
| .mspdec = { 0x00000001, g98_mspdec_new }, |
| .msppp = { 0x00000001, g98_msppp_new }, |
| .msvld = { 0x00000001, g98_msvld_new }, |
| .pm = { 0x00000001, g84_pm_new }, |
| .sec = { 0x00000001, g98_sec_new }, |
| .sw = { 0x00000001, nv50_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nva0_chipset = { |
| .name = "GT200", |
| .bar = { 0x00000001, g84_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, g94_bus_new }, |
| .clk = { 0x00000001, g84_clk_new }, |
| .devinit = { 0x00000001, g84_devinit_new }, |
| .fb = { 0x00000001, g84_fb_new }, |
| .fuse = { 0x00000001, nv50_fuse_new }, |
| .gpio = { 0x00000001, g94_gpio_new }, |
| .i2c = { 0x00000001, nv50_i2c_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .mc = { 0x00000001, g84_mc_new }, |
| .mmu = { 0x00000001, g84_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, g94_pci_new }, |
| .therm = { 0x00000001, g84_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .bsp = { 0x00000001, g84_bsp_new }, |
| .cipher = { 0x00000001, g84_cipher_new }, |
| .disp = { 0x00000001, gt200_disp_new }, |
| .dma = { 0x00000001, nv50_dma_new }, |
| .fifo = { 0x00000001, g84_fifo_new }, |
| .gr = { 0x00000001, gt200_gr_new }, |
| .mpeg = { 0x00000001, g84_mpeg_new }, |
| .pm = { 0x00000001, gt200_pm_new }, |
| .sw = { 0x00000001, nv50_sw_new }, |
| .vp = { 0x00000001, g84_vp_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nva3_chipset = { |
| .name = "GT215", |
| .bar = { 0x00000001, g84_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, g94_bus_new }, |
| .clk = { 0x00000001, gt215_clk_new }, |
| .devinit = { 0x00000001, gt215_devinit_new }, |
| .fb = { 0x00000001, gt215_fb_new }, |
| .fuse = { 0x00000001, nv50_fuse_new }, |
| .gpio = { 0x00000001, g94_gpio_new }, |
| .i2c = { 0x00000001, g94_i2c_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .mc = { 0x00000001, gt215_mc_new }, |
| .mmu = { 0x00000001, g84_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, g94_pci_new }, |
| .pmu = { 0x00000001, gt215_pmu_new }, |
| .therm = { 0x00000001, gt215_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .ce = { 0x00000001, gt215_ce_new }, |
| .disp = { 0x00000001, gt215_disp_new }, |
| .dma = { 0x00000001, nv50_dma_new }, |
| .fifo = { 0x00000001, g84_fifo_new }, |
| .gr = { 0x00000001, gt215_gr_new }, |
| .mpeg = { 0x00000001, g84_mpeg_new }, |
| .mspdec = { 0x00000001, gt215_mspdec_new }, |
| .msppp = { 0x00000001, gt215_msppp_new }, |
| .msvld = { 0x00000001, gt215_msvld_new }, |
| .pm = { 0x00000001, gt215_pm_new }, |
| .sw = { 0x00000001, nv50_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nva5_chipset = { |
| .name = "GT216", |
| .bar = { 0x00000001, g84_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, g94_bus_new }, |
| .clk = { 0x00000001, gt215_clk_new }, |
| .devinit = { 0x00000001, gt215_devinit_new }, |
| .fb = { 0x00000001, gt215_fb_new }, |
| .fuse = { 0x00000001, nv50_fuse_new }, |
| .gpio = { 0x00000001, g94_gpio_new }, |
| .i2c = { 0x00000001, g94_i2c_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .mc = { 0x00000001, gt215_mc_new }, |
| .mmu = { 0x00000001, g84_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, g94_pci_new }, |
| .pmu = { 0x00000001, gt215_pmu_new }, |
| .therm = { 0x00000001, gt215_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .ce = { 0x00000001, gt215_ce_new }, |
| .disp = { 0x00000001, gt215_disp_new }, |
| .dma = { 0x00000001, nv50_dma_new }, |
| .fifo = { 0x00000001, g84_fifo_new }, |
| .gr = { 0x00000001, gt215_gr_new }, |
| .mspdec = { 0x00000001, gt215_mspdec_new }, |
| .msppp = { 0x00000001, gt215_msppp_new }, |
| .msvld = { 0x00000001, gt215_msvld_new }, |
| .pm = { 0x00000001, gt215_pm_new }, |
| .sw = { 0x00000001, nv50_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nva8_chipset = { |
| .name = "GT218", |
| .bar = { 0x00000001, g84_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, g94_bus_new }, |
| .clk = { 0x00000001, gt215_clk_new }, |
| .devinit = { 0x00000001, gt215_devinit_new }, |
| .fb = { 0x00000001, gt215_fb_new }, |
| .fuse = { 0x00000001, nv50_fuse_new }, |
| .gpio = { 0x00000001, g94_gpio_new }, |
| .i2c = { 0x00000001, g94_i2c_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .mc = { 0x00000001, gt215_mc_new }, |
| .mmu = { 0x00000001, g84_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, g94_pci_new }, |
| .pmu = { 0x00000001, gt215_pmu_new }, |
| .therm = { 0x00000001, gt215_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .ce = { 0x00000001, gt215_ce_new }, |
| .disp = { 0x00000001, gt215_disp_new }, |
| .dma = { 0x00000001, nv50_dma_new }, |
| .fifo = { 0x00000001, g84_fifo_new }, |
| .gr = { 0x00000001, gt215_gr_new }, |
| .mspdec = { 0x00000001, gt215_mspdec_new }, |
| .msppp = { 0x00000001, gt215_msppp_new }, |
| .msvld = { 0x00000001, gt215_msvld_new }, |
| .pm = { 0x00000001, gt215_pm_new }, |
| .sw = { 0x00000001, nv50_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nvaa_chipset = { |
| .name = "MCP77/MCP78", |
| .bar = { 0x00000001, g84_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, g94_bus_new }, |
| .clk = { 0x00000001, mcp77_clk_new }, |
| .devinit = { 0x00000001, g98_devinit_new }, |
| .fb = { 0x00000001, mcp77_fb_new }, |
| .fuse = { 0x00000001, nv50_fuse_new }, |
| .gpio = { 0x00000001, g94_gpio_new }, |
| .i2c = { 0x00000001, g94_i2c_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .mc = { 0x00000001, g98_mc_new }, |
| .mmu = { 0x00000001, mcp77_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, g94_pci_new }, |
| .therm = { 0x00000001, g84_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .disp = { 0x00000001, mcp77_disp_new }, |
| .dma = { 0x00000001, nv50_dma_new }, |
| .fifo = { 0x00000001, g84_fifo_new }, |
| .gr = { 0x00000001, gt200_gr_new }, |
| .mspdec = { 0x00000001, g98_mspdec_new }, |
| .msppp = { 0x00000001, g98_msppp_new }, |
| .msvld = { 0x00000001, g98_msvld_new }, |
| .pm = { 0x00000001, g84_pm_new }, |
| .sec = { 0x00000001, g98_sec_new }, |
| .sw = { 0x00000001, nv50_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nvac_chipset = { |
| .name = "MCP79/MCP7A", |
| .bar = { 0x00000001, g84_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, g94_bus_new }, |
| .clk = { 0x00000001, mcp77_clk_new }, |
| .devinit = { 0x00000001, g98_devinit_new }, |
| .fb = { 0x00000001, mcp77_fb_new }, |
| .fuse = { 0x00000001, nv50_fuse_new }, |
| .gpio = { 0x00000001, g94_gpio_new }, |
| .i2c = { 0x00000001, g94_i2c_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .mc = { 0x00000001, g98_mc_new }, |
| .mmu = { 0x00000001, mcp77_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, g94_pci_new }, |
| .therm = { 0x00000001, g84_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .disp = { 0x00000001, mcp77_disp_new }, |
| .dma = { 0x00000001, nv50_dma_new }, |
| .fifo = { 0x00000001, g84_fifo_new }, |
| .gr = { 0x00000001, mcp79_gr_new }, |
| .mspdec = { 0x00000001, g98_mspdec_new }, |
| .msppp = { 0x00000001, g98_msppp_new }, |
| .msvld = { 0x00000001, g98_msvld_new }, |
| .pm = { 0x00000001, g84_pm_new }, |
| .sec = { 0x00000001, g98_sec_new }, |
| .sw = { 0x00000001, nv50_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nvaf_chipset = { |
| .name = "MCP89", |
| .bar = { 0x00000001, g84_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, g94_bus_new }, |
| .clk = { 0x00000001, gt215_clk_new }, |
| .devinit = { 0x00000001, mcp89_devinit_new }, |
| .fb = { 0x00000001, mcp89_fb_new }, |
| .fuse = { 0x00000001, nv50_fuse_new }, |
| .gpio = { 0x00000001, g94_gpio_new }, |
| .i2c = { 0x00000001, g94_i2c_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .mc = { 0x00000001, gt215_mc_new }, |
| .mmu = { 0x00000001, mcp77_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, g94_pci_new }, |
| .pmu = { 0x00000001, gt215_pmu_new }, |
| .therm = { 0x00000001, gt215_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, nv40_volt_new }, |
| .ce = { 0x00000001, gt215_ce_new }, |
| .disp = { 0x00000001, mcp89_disp_new }, |
| .dma = { 0x00000001, nv50_dma_new }, |
| .fifo = { 0x00000001, g84_fifo_new }, |
| .gr = { 0x00000001, mcp89_gr_new }, |
| .mspdec = { 0x00000001, gt215_mspdec_new }, |
| .msppp = { 0x00000001, gt215_msppp_new }, |
| .msvld = { 0x00000001, mcp89_msvld_new }, |
| .pm = { 0x00000001, gt215_pm_new }, |
| .sw = { 0x00000001, nv50_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nvc0_chipset = { |
| .name = "GF100", |
| .bar = { 0x00000001, gf100_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .clk = { 0x00000001, gf100_clk_new }, |
| .devinit = { 0x00000001, gf100_devinit_new }, |
| .fb = { 0x00000001, gf100_fb_new }, |
| .fuse = { 0x00000001, gf100_fuse_new }, |
| .gpio = { 0x00000001, g94_gpio_new }, |
| .i2c = { 0x00000001, g94_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gf100_ltc_new }, |
| .mc = { 0x00000001, gf100_mc_new }, |
| .mmu = { 0x00000001, gf100_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gf100_pci_new }, |
| .pmu = { 0x00000001, gf100_pmu_new }, |
| .privring = { 0x00000001, gf100_privring_new }, |
| .therm = { 0x00000001, gt215_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, gf100_volt_new }, |
| .ce = { 0x00000003, gf100_ce_new }, |
| .disp = { 0x00000001, gt215_disp_new }, |
| .dma = { 0x00000001, gf100_dma_new }, |
| .fifo = { 0x00000001, gf100_fifo_new }, |
| .gr = { 0x00000001, gf100_gr_new }, |
| .mspdec = { 0x00000001, gf100_mspdec_new }, |
| .msppp = { 0x00000001, gf100_msppp_new }, |
| .msvld = { 0x00000001, gf100_msvld_new }, |
| .pm = { 0x00000001, gf100_pm_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nvc1_chipset = { |
| .name = "GF108", |
| .bar = { 0x00000001, gf100_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .clk = { 0x00000001, gf100_clk_new }, |
| .devinit = { 0x00000001, gf100_devinit_new }, |
| .fb = { 0x00000001, gf108_fb_new }, |
| .fuse = { 0x00000001, gf100_fuse_new }, |
| .gpio = { 0x00000001, g94_gpio_new }, |
| .i2c = { 0x00000001, g94_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gf100_ltc_new }, |
| .mc = { 0x00000001, gf100_mc_new }, |
| .mmu = { 0x00000001, gf100_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gf106_pci_new }, |
| .pmu = { 0x00000001, gf100_pmu_new }, |
| .privring = { 0x00000001, gf100_privring_new }, |
| .therm = { 0x00000001, gt215_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, gf100_volt_new }, |
| .ce = { 0x00000001, gf100_ce_new }, |
| .disp = { 0x00000001, gt215_disp_new }, |
| .dma = { 0x00000001, gf100_dma_new }, |
| .fifo = { 0x00000001, gf100_fifo_new }, |
| .gr = { 0x00000001, gf108_gr_new }, |
| .mspdec = { 0x00000001, gf100_mspdec_new }, |
| .msppp = { 0x00000001, gf100_msppp_new }, |
| .msvld = { 0x00000001, gf100_msvld_new }, |
| .pm = { 0x00000001, gf108_pm_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nvc3_chipset = { |
| .name = "GF106", |
| .bar = { 0x00000001, gf100_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .clk = { 0x00000001, gf100_clk_new }, |
| .devinit = { 0x00000001, gf100_devinit_new }, |
| .fb = { 0x00000001, gf100_fb_new }, |
| .fuse = { 0x00000001, gf100_fuse_new }, |
| .gpio = { 0x00000001, g94_gpio_new }, |
| .i2c = { 0x00000001, g94_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gf100_ltc_new }, |
| .mc = { 0x00000001, gf100_mc_new }, |
| .mmu = { 0x00000001, gf100_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gf106_pci_new }, |
| .pmu = { 0x00000001, gf100_pmu_new }, |
| .privring = { 0x00000001, gf100_privring_new }, |
| .therm = { 0x00000001, gt215_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, gf100_volt_new }, |
| .ce = { 0x00000001, gf100_ce_new }, |
| .disp = { 0x00000001, gt215_disp_new }, |
| .dma = { 0x00000001, gf100_dma_new }, |
| .fifo = { 0x00000001, gf100_fifo_new }, |
| .gr = { 0x00000001, gf104_gr_new }, |
| .mspdec = { 0x00000001, gf100_mspdec_new }, |
| .msppp = { 0x00000001, gf100_msppp_new }, |
| .msvld = { 0x00000001, gf100_msvld_new }, |
| .pm = { 0x00000001, gf100_pm_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nvc4_chipset = { |
| .name = "GF104", |
| .bar = { 0x00000001, gf100_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .clk = { 0x00000001, gf100_clk_new }, |
| .devinit = { 0x00000001, gf100_devinit_new }, |
| .fb = { 0x00000001, gf100_fb_new }, |
| .fuse = { 0x00000001, gf100_fuse_new }, |
| .gpio = { 0x00000001, g94_gpio_new }, |
| .i2c = { 0x00000001, g94_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gf100_ltc_new }, |
| .mc = { 0x00000001, gf100_mc_new }, |
| .mmu = { 0x00000001, gf100_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gf100_pci_new }, |
| .pmu = { 0x00000001, gf100_pmu_new }, |
| .privring = { 0x00000001, gf100_privring_new }, |
| .therm = { 0x00000001, gt215_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, gf100_volt_new }, |
| .ce = { 0x00000003, gf100_ce_new }, |
| .disp = { 0x00000001, gt215_disp_new }, |
| .dma = { 0x00000001, gf100_dma_new }, |
| .fifo = { 0x00000001, gf100_fifo_new }, |
| .gr = { 0x00000001, gf104_gr_new }, |
| .mspdec = { 0x00000001, gf100_mspdec_new }, |
| .msppp = { 0x00000001, gf100_msppp_new }, |
| .msvld = { 0x00000001, gf100_msvld_new }, |
| .pm = { 0x00000001, gf100_pm_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nvc8_chipset = { |
| .name = "GF110", |
| .bar = { 0x00000001, gf100_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .clk = { 0x00000001, gf100_clk_new }, |
| .devinit = { 0x00000001, gf100_devinit_new }, |
| .fb = { 0x00000001, gf100_fb_new }, |
| .fuse = { 0x00000001, gf100_fuse_new }, |
| .gpio = { 0x00000001, g94_gpio_new }, |
| .i2c = { 0x00000001, g94_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gf100_ltc_new }, |
| .mc = { 0x00000001, gf100_mc_new }, |
| .mmu = { 0x00000001, gf100_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gf100_pci_new }, |
| .pmu = { 0x00000001, gf100_pmu_new }, |
| .privring = { 0x00000001, gf100_privring_new }, |
| .therm = { 0x00000001, gt215_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, gf100_volt_new }, |
| .ce = { 0x00000003, gf100_ce_new }, |
| .disp = { 0x00000001, gt215_disp_new }, |
| .dma = { 0x00000001, gf100_dma_new }, |
| .fifo = { 0x00000001, gf100_fifo_new }, |
| .gr = { 0x00000001, gf110_gr_new }, |
| .mspdec = { 0x00000001, gf100_mspdec_new }, |
| .msppp = { 0x00000001, gf100_msppp_new }, |
| .msvld = { 0x00000001, gf100_msvld_new }, |
| .pm = { 0x00000001, gf100_pm_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nvce_chipset = { |
| .name = "GF114", |
| .bar = { 0x00000001, gf100_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .clk = { 0x00000001, gf100_clk_new }, |
| .devinit = { 0x00000001, gf100_devinit_new }, |
| .fb = { 0x00000001, gf100_fb_new }, |
| .fuse = { 0x00000001, gf100_fuse_new }, |
| .gpio = { 0x00000001, g94_gpio_new }, |
| .i2c = { 0x00000001, g94_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gf100_ltc_new }, |
| .mc = { 0x00000001, gf100_mc_new }, |
| .mmu = { 0x00000001, gf100_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gf100_pci_new }, |
| .pmu = { 0x00000001, gf100_pmu_new }, |
| .privring = { 0x00000001, gf100_privring_new }, |
| .therm = { 0x00000001, gt215_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, gf100_volt_new }, |
| .ce = { 0x00000003, gf100_ce_new }, |
| .disp = { 0x00000001, gt215_disp_new }, |
| .dma = { 0x00000001, gf100_dma_new }, |
| .fifo = { 0x00000001, gf100_fifo_new }, |
| .gr = { 0x00000001, gf104_gr_new }, |
| .mspdec = { 0x00000001, gf100_mspdec_new }, |
| .msppp = { 0x00000001, gf100_msppp_new }, |
| .msvld = { 0x00000001, gf100_msvld_new }, |
| .pm = { 0x00000001, gf100_pm_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nvcf_chipset = { |
| .name = "GF116", |
| .bar = { 0x00000001, gf100_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .clk = { 0x00000001, gf100_clk_new }, |
| .devinit = { 0x00000001, gf100_devinit_new }, |
| .fb = { 0x00000001, gf100_fb_new }, |
| .fuse = { 0x00000001, gf100_fuse_new }, |
| .gpio = { 0x00000001, g94_gpio_new }, |
| .i2c = { 0x00000001, g94_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gf100_ltc_new }, |
| .mc = { 0x00000001, gf100_mc_new }, |
| .mmu = { 0x00000001, gf100_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gf106_pci_new }, |
| .pmu = { 0x00000001, gf100_pmu_new }, |
| .privring = { 0x00000001, gf100_privring_new }, |
| .therm = { 0x00000001, gt215_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, gf100_volt_new }, |
| .ce = { 0x00000001, gf100_ce_new }, |
| .disp = { 0x00000001, gt215_disp_new }, |
| .dma = { 0x00000001, gf100_dma_new }, |
| .fifo = { 0x00000001, gf100_fifo_new }, |
| .gr = { 0x00000001, gf104_gr_new }, |
| .mspdec = { 0x00000001, gf100_mspdec_new }, |
| .msppp = { 0x00000001, gf100_msppp_new }, |
| .msvld = { 0x00000001, gf100_msvld_new }, |
| .pm = { 0x00000001, gf100_pm_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nvd7_chipset = { |
| .name = "GF117", |
| .bar = { 0x00000001, gf100_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .clk = { 0x00000001, gf100_clk_new }, |
| .devinit = { 0x00000001, gf100_devinit_new }, |
| .fb = { 0x00000001, gf100_fb_new }, |
| .fuse = { 0x00000001, gf100_fuse_new }, |
| .gpio = { 0x00000001, gf119_gpio_new }, |
| .i2c = { 0x00000001, gf117_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gf100_ltc_new }, |
| .mc = { 0x00000001, gf100_mc_new }, |
| .mmu = { 0x00000001, gf100_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gf106_pci_new }, |
| .privring = { 0x00000001, gf117_privring_new }, |
| .therm = { 0x00000001, gf119_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, gf117_volt_new }, |
| .ce = { 0x00000001, gf100_ce_new }, |
| .disp = { 0x00000001, gf119_disp_new }, |
| .dma = { 0x00000001, gf119_dma_new }, |
| .fifo = { 0x00000001, gf100_fifo_new }, |
| .gr = { 0x00000001, gf117_gr_new }, |
| .mspdec = { 0x00000001, gf100_mspdec_new }, |
| .msppp = { 0x00000001, gf100_msppp_new }, |
| .msvld = { 0x00000001, gf100_msvld_new }, |
| .pm = { 0x00000001, gf117_pm_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nvd9_chipset = { |
| .name = "GF119", |
| .bar = { 0x00000001, gf100_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .clk = { 0x00000001, gf100_clk_new }, |
| .devinit = { 0x00000001, gf100_devinit_new }, |
| .fb = { 0x00000001, gf100_fb_new }, |
| .fuse = { 0x00000001, gf100_fuse_new }, |
| .gpio = { 0x00000001, gf119_gpio_new }, |
| .i2c = { 0x00000001, gf119_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gf100_ltc_new }, |
| .mc = { 0x00000001, gf100_mc_new }, |
| .mmu = { 0x00000001, gf100_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gf106_pci_new }, |
| .pmu = { 0x00000001, gf119_pmu_new }, |
| .privring = { 0x00000001, gf117_privring_new }, |
| .therm = { 0x00000001, gf119_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .volt = { 0x00000001, gf100_volt_new }, |
| .ce = { 0x00000001, gf100_ce_new }, |
| .disp = { 0x00000001, gf119_disp_new }, |
| .dma = { 0x00000001, gf119_dma_new }, |
| .fifo = { 0x00000001, gf100_fifo_new }, |
| .gr = { 0x00000001, gf119_gr_new }, |
| .mspdec = { 0x00000001, gf100_mspdec_new }, |
| .msppp = { 0x00000001, gf100_msppp_new }, |
| .msvld = { 0x00000001, gf100_msvld_new }, |
| .pm = { 0x00000001, gf117_pm_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nve4_chipset = { |
| .name = "GK104", |
| .bar = { 0x00000001, gf100_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .clk = { 0x00000001, gk104_clk_new }, |
| .devinit = { 0x00000001, gf100_devinit_new }, |
| .fb = { 0x00000001, gk104_fb_new }, |
| .fuse = { 0x00000001, gf100_fuse_new }, |
| .gpio = { 0x00000001, gk104_gpio_new }, |
| .i2c = { 0x00000001, gk104_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gk104_ltc_new }, |
| .mc = { 0x00000001, gk104_mc_new }, |
| .mmu = { 0x00000001, gk104_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gk104_pci_new }, |
| .pmu = { 0x00000001, gk104_pmu_new }, |
| .privring = { 0x00000001, gk104_privring_new }, |
| .therm = { 0x00000001, gk104_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .top = { 0x00000001, gk104_top_new }, |
| .volt = { 0x00000001, gk104_volt_new }, |
| .ce = { 0x00000007, gk104_ce_new }, |
| .disp = { 0x00000001, gk104_disp_new }, |
| .dma = { 0x00000001, gf119_dma_new }, |
| .fifo = { 0x00000001, gk104_fifo_new }, |
| .gr = { 0x00000001, gk104_gr_new }, |
| .mspdec = { 0x00000001, gk104_mspdec_new }, |
| .msppp = { 0x00000001, gf100_msppp_new }, |
| .msvld = { 0x00000001, gk104_msvld_new }, |
| .pm = { 0x00000001, gk104_pm_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nve6_chipset = { |
| .name = "GK106", |
| .bar = { 0x00000001, gf100_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .clk = { 0x00000001, gk104_clk_new }, |
| .devinit = { 0x00000001, gf100_devinit_new }, |
| .fb = { 0x00000001, gk104_fb_new }, |
| .fuse = { 0x00000001, gf100_fuse_new }, |
| .gpio = { 0x00000001, gk104_gpio_new }, |
| .i2c = { 0x00000001, gk104_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gk104_ltc_new }, |
| .mc = { 0x00000001, gk104_mc_new }, |
| .mmu = { 0x00000001, gk104_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gk104_pci_new }, |
| .pmu = { 0x00000001, gk104_pmu_new }, |
| .privring = { 0x00000001, gk104_privring_new }, |
| .therm = { 0x00000001, gk104_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .top = { 0x00000001, gk104_top_new }, |
| .volt = { 0x00000001, gk104_volt_new }, |
| .ce = { 0x00000007, gk104_ce_new }, |
| .disp = { 0x00000001, gk104_disp_new }, |
| .dma = { 0x00000001, gf119_dma_new }, |
| .fifo = { 0x00000001, gk104_fifo_new }, |
| .gr = { 0x00000001, gk104_gr_new }, |
| .mspdec = { 0x00000001, gk104_mspdec_new }, |
| .msppp = { 0x00000001, gf100_msppp_new }, |
| .msvld = { 0x00000001, gk104_msvld_new }, |
| .pm = { 0x00000001, gk104_pm_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nve7_chipset = { |
| .name = "GK107", |
| .bar = { 0x00000001, gf100_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .clk = { 0x00000001, gk104_clk_new }, |
| .devinit = { 0x00000001, gf100_devinit_new }, |
| .fb = { 0x00000001, gk104_fb_new }, |
| .fuse = { 0x00000001, gf100_fuse_new }, |
| .gpio = { 0x00000001, gk104_gpio_new }, |
| .i2c = { 0x00000001, gk104_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gk104_ltc_new }, |
| .mc = { 0x00000001, gk104_mc_new }, |
| .mmu = { 0x00000001, gk104_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gk104_pci_new }, |
| .pmu = { 0x00000001, gk104_pmu_new }, |
| .privring = { 0x00000001, gk104_privring_new }, |
| .therm = { 0x00000001, gk104_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .top = { 0x00000001, gk104_top_new }, |
| .volt = { 0x00000001, gk104_volt_new }, |
| .ce = { 0x00000007, gk104_ce_new }, |
| .disp = { 0x00000001, gk104_disp_new }, |
| .dma = { 0x00000001, gf119_dma_new }, |
| .fifo = { 0x00000001, gk104_fifo_new }, |
| .gr = { 0x00000001, gk104_gr_new }, |
| .mspdec = { 0x00000001, gk104_mspdec_new }, |
| .msppp = { 0x00000001, gf100_msppp_new }, |
| .msvld = { 0x00000001, gk104_msvld_new }, |
| .pm = { 0x00000001, gk104_pm_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nvea_chipset = { |
| .name = "GK20A", |
| .bar = { 0x00000001, gk20a_bar_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .clk = { 0x00000001, gk20a_clk_new }, |
| .fb = { 0x00000001, gk20a_fb_new }, |
| .fuse = { 0x00000001, gf100_fuse_new }, |
| .imem = { 0x00000001, gk20a_instmem_new }, |
| .ltc = { 0x00000001, gk104_ltc_new }, |
| .mc = { 0x00000001, gk20a_mc_new }, |
| .mmu = { 0x00000001, gk20a_mmu_new }, |
| .pmu = { 0x00000001, gk20a_pmu_new }, |
| .privring = { 0x00000001, gk20a_privring_new }, |
| .timer = { 0x00000001, gk20a_timer_new }, |
| .top = { 0x00000001, gk104_top_new }, |
| .volt = { 0x00000001, gk20a_volt_new }, |
| .ce = { 0x00000004, gk104_ce_new }, |
| .dma = { 0x00000001, gf119_dma_new }, |
| .fifo = { 0x00000001, gk20a_fifo_new }, |
| .gr = { 0x00000001, gk20a_gr_new }, |
| .pm = { 0x00000001, gk104_pm_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nvf0_chipset = { |
| .name = "GK110", |
| .bar = { 0x00000001, gf100_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .clk = { 0x00000001, gk104_clk_new }, |
| .devinit = { 0x00000001, gf100_devinit_new }, |
| .fb = { 0x00000001, gk110_fb_new }, |
| .fuse = { 0x00000001, gf100_fuse_new }, |
| .gpio = { 0x00000001, gk104_gpio_new }, |
| .i2c = { 0x00000001, gk110_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gk104_ltc_new }, |
| .mc = { 0x00000001, gk104_mc_new }, |
| .mmu = { 0x00000001, gk104_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gk104_pci_new }, |
| .pmu = { 0x00000001, gk110_pmu_new }, |
| .privring = { 0x00000001, gk104_privring_new }, |
| .therm = { 0x00000001, gk104_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .top = { 0x00000001, gk104_top_new }, |
| .volt = { 0x00000001, gk104_volt_new }, |
| .ce = { 0x00000007, gk104_ce_new }, |
| .disp = { 0x00000001, gk110_disp_new }, |
| .dma = { 0x00000001, gf119_dma_new }, |
| .fifo = { 0x00000001, gk110_fifo_new }, |
| .gr = { 0x00000001, gk110_gr_new }, |
| .mspdec = { 0x00000001, gk104_mspdec_new }, |
| .msppp = { 0x00000001, gf100_msppp_new }, |
| .msvld = { 0x00000001, gk104_msvld_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nvf1_chipset = { |
| .name = "GK110B", |
| .bar = { 0x00000001, gf100_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .clk = { 0x00000001, gk104_clk_new }, |
| .devinit = { 0x00000001, gf100_devinit_new }, |
| .fb = { 0x00000001, gk110_fb_new }, |
| .fuse = { 0x00000001, gf100_fuse_new }, |
| .gpio = { 0x00000001, gk104_gpio_new }, |
| .i2c = { 0x00000001, gk110_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gk104_ltc_new }, |
| .mc = { 0x00000001, gk104_mc_new }, |
| .mmu = { 0x00000001, gk104_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gk104_pci_new }, |
| .pmu = { 0x00000001, gk110_pmu_new }, |
| .privring = { 0x00000001, gk104_privring_new }, |
| .therm = { 0x00000001, gk104_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .top = { 0x00000001, gk104_top_new }, |
| .volt = { 0x00000001, gk104_volt_new }, |
| .ce = { 0x00000007, gk104_ce_new }, |
| .disp = { 0x00000001, gk110_disp_new }, |
| .dma = { 0x00000001, gf119_dma_new }, |
| .fifo = { 0x00000001, gk110_fifo_new }, |
| .gr = { 0x00000001, gk110b_gr_new }, |
| .mspdec = { 0x00000001, gk104_mspdec_new }, |
| .msppp = { 0x00000001, gf100_msppp_new }, |
| .msvld = { 0x00000001, gk104_msvld_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv106_chipset = { |
| .name = "GK208B", |
| .bar = { 0x00000001, gf100_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .clk = { 0x00000001, gk104_clk_new }, |
| .devinit = { 0x00000001, gf100_devinit_new }, |
| .fb = { 0x00000001, gk110_fb_new }, |
| .fuse = { 0x00000001, gf100_fuse_new }, |
| .gpio = { 0x00000001, gk104_gpio_new }, |
| .i2c = { 0x00000001, gk110_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gk104_ltc_new }, |
| .mc = { 0x00000001, gk20a_mc_new }, |
| .mmu = { 0x00000001, gk104_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gk104_pci_new }, |
| .pmu = { 0x00000001, gk208_pmu_new }, |
| .privring = { 0x00000001, gk104_privring_new }, |
| .therm = { 0x00000001, gk104_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .top = { 0x00000001, gk104_top_new }, |
| .volt = { 0x00000001, gk104_volt_new }, |
| .ce = { 0x00000007, gk104_ce_new }, |
| .disp = { 0x00000001, gk110_disp_new }, |
| .dma = { 0x00000001, gf119_dma_new }, |
| .fifo = { 0x00000001, gk208_fifo_new }, |
| .gr = { 0x00000001, gk208_gr_new }, |
| .mspdec = { 0x00000001, gk104_mspdec_new }, |
| .msppp = { 0x00000001, gf100_msppp_new }, |
| .msvld = { 0x00000001, gk104_msvld_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv108_chipset = { |
| .name = "GK208", |
| .bar = { 0x00000001, gf100_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .clk = { 0x00000001, gk104_clk_new }, |
| .devinit = { 0x00000001, gf100_devinit_new }, |
| .fb = { 0x00000001, gk110_fb_new }, |
| .fuse = { 0x00000001, gf100_fuse_new }, |
| .gpio = { 0x00000001, gk104_gpio_new }, |
| .i2c = { 0x00000001, gk110_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gk104_ltc_new }, |
| .mc = { 0x00000001, gk20a_mc_new }, |
| .mmu = { 0x00000001, gk104_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gk104_pci_new }, |
| .pmu = { 0x00000001, gk208_pmu_new }, |
| .privring = { 0x00000001, gk104_privring_new }, |
| .therm = { 0x00000001, gk104_therm_new }, |
| .timer = { 0x00000001, nv41_timer_new }, |
| .top = { 0x00000001, gk104_top_new }, |
| .volt = { 0x00000001, gk104_volt_new }, |
| .ce = { 0x00000007, gk104_ce_new }, |
| .disp = { 0x00000001, gk110_disp_new }, |
| .dma = { 0x00000001, gf119_dma_new }, |
| .fifo = { 0x00000001, gk208_fifo_new }, |
| .gr = { 0x00000001, gk208_gr_new }, |
| .mspdec = { 0x00000001, gk104_mspdec_new }, |
| .msppp = { 0x00000001, gf100_msppp_new }, |
| .msvld = { 0x00000001, gk104_msvld_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv117_chipset = { |
| .name = "GM107", |
| .bar = { 0x00000001, gm107_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .clk = { 0x00000001, gk104_clk_new }, |
| .devinit = { 0x00000001, gm107_devinit_new }, |
| .fb = { 0x00000001, gm107_fb_new }, |
| .fuse = { 0x00000001, gm107_fuse_new }, |
| .gpio = { 0x00000001, gk104_gpio_new }, |
| .i2c = { 0x00000001, gk110_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gm107_ltc_new }, |
| .mc = { 0x00000001, gk20a_mc_new }, |
| .mmu = { 0x00000001, gk104_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gk104_pci_new }, |
| .pmu = { 0x00000001, gm107_pmu_new }, |
| .privring = { 0x00000001, gk104_privring_new }, |
| .therm = { 0x00000001, gm107_therm_new }, |
| .timer = { 0x00000001, gk20a_timer_new }, |
| .top = { 0x00000001, gk104_top_new }, |
| .volt = { 0x00000001, gk104_volt_new }, |
| .ce = { 0x00000005, gm107_ce_new }, |
| .disp = { 0x00000001, gm107_disp_new }, |
| .dma = { 0x00000001, gf119_dma_new }, |
| .fifo = { 0x00000001, gm107_fifo_new }, |
| .gr = { 0x00000001, gm107_gr_new }, |
| .nvdec = { 0x00000001, gm107_nvdec_new }, |
| .nvenc = { 0x00000001, gm107_nvenc_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv118_chipset = { |
| .name = "GM108", |
| .bar = { 0x00000001, gm107_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .clk = { 0x00000001, gk104_clk_new }, |
| .devinit = { 0x00000001, gm107_devinit_new }, |
| .fb = { 0x00000001, gm107_fb_new }, |
| .fuse = { 0x00000001, gm107_fuse_new }, |
| .gpio = { 0x00000001, gk104_gpio_new }, |
| .i2c = { 0x00000001, gk110_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gm107_ltc_new }, |
| .mc = { 0x00000001, gk20a_mc_new }, |
| .mmu = { 0x00000001, gk104_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gk104_pci_new }, |
| .pmu = { 0x00000001, gm107_pmu_new }, |
| .privring = { 0x00000001, gk104_privring_new }, |
| .therm = { 0x00000001, gm107_therm_new }, |
| .timer = { 0x00000001, gk20a_timer_new }, |
| .top = { 0x00000001, gk104_top_new }, |
| .volt = { 0x00000001, gk104_volt_new }, |
| .ce = { 0x00000005, gm107_ce_new }, |
| .disp = { 0x00000001, gm107_disp_new }, |
| .dma = { 0x00000001, gf119_dma_new }, |
| .fifo = { 0x00000001, gm107_fifo_new }, |
| .gr = { 0x00000001, gm107_gr_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv120_chipset = { |
| .name = "GM200", |
| .acr = { 0x00000001, gm200_acr_new }, |
| .bar = { 0x00000001, gm107_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .devinit = { 0x00000001, gm200_devinit_new }, |
| .fb = { 0x00000001, gm200_fb_new }, |
| .fuse = { 0x00000001, gm107_fuse_new }, |
| .gpio = { 0x00000001, gk104_gpio_new }, |
| .i2c = { 0x00000001, gm200_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gm200_ltc_new }, |
| .mc = { 0x00000001, gk20a_mc_new }, |
| .mmu = { 0x00000001, gm200_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gk104_pci_new }, |
| .pmu = { 0x00000001, gm200_pmu_new }, |
| .privring = { 0x00000001, gm200_privring_new }, |
| .therm = { 0x00000001, gm200_therm_new }, |
| .timer = { 0x00000001, gk20a_timer_new }, |
| .top = { 0x00000001, gk104_top_new }, |
| .volt = { 0x00000001, gk104_volt_new }, |
| .ce = { 0x00000007, gm200_ce_new }, |
| .disp = { 0x00000001, gm200_disp_new }, |
| .dma = { 0x00000001, gf119_dma_new }, |
| .fifo = { 0x00000001, gm200_fifo_new }, |
| .gr = { 0x00000001, gm200_gr_new }, |
| .nvdec = { 0x00000001, gm107_nvdec_new }, |
| .nvenc = { 0x00000003, gm107_nvenc_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv124_chipset = { |
| .name = "GM204", |
| .acr = { 0x00000001, gm200_acr_new }, |
| .bar = { 0x00000001, gm107_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .devinit = { 0x00000001, gm200_devinit_new }, |
| .fb = { 0x00000001, gm200_fb_new }, |
| .fuse = { 0x00000001, gm107_fuse_new }, |
| .gpio = { 0x00000001, gk104_gpio_new }, |
| .i2c = { 0x00000001, gm200_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gm200_ltc_new }, |
| .mc = { 0x00000001, gk20a_mc_new }, |
| .mmu = { 0x00000001, gm200_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gk104_pci_new }, |
| .pmu = { 0x00000001, gm200_pmu_new }, |
| .privring = { 0x00000001, gm200_privring_new }, |
| .therm = { 0x00000001, gm200_therm_new }, |
| .timer = { 0x00000001, gk20a_timer_new }, |
| .top = { 0x00000001, gk104_top_new }, |
| .volt = { 0x00000001, gk104_volt_new }, |
| .ce = { 0x00000007, gm200_ce_new }, |
| .disp = { 0x00000001, gm200_disp_new }, |
| .dma = { 0x00000001, gf119_dma_new }, |
| .fifo = { 0x00000001, gm200_fifo_new }, |
| .gr = { 0x00000001, gm200_gr_new }, |
| .nvdec = { 0x00000001, gm107_nvdec_new }, |
| .nvenc = { 0x00000003, gm107_nvenc_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv126_chipset = { |
| .name = "GM206", |
| .acr = { 0x00000001, gm200_acr_new }, |
| .bar = { 0x00000001, gm107_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .devinit = { 0x00000001, gm200_devinit_new }, |
| .fb = { 0x00000001, gm200_fb_new }, |
| .fuse = { 0x00000001, gm107_fuse_new }, |
| .gpio = { 0x00000001, gk104_gpio_new }, |
| .i2c = { 0x00000001, gm200_i2c_new }, |
| .iccsense = { 0x00000001, gf100_iccsense_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gm200_ltc_new }, |
| .mc = { 0x00000001, gk20a_mc_new }, |
| .mmu = { 0x00000001, gm200_mmu_new }, |
| .mxm = { 0x00000001, nv50_mxm_new }, |
| .pci = { 0x00000001, gk104_pci_new }, |
| .pmu = { 0x00000001, gm200_pmu_new }, |
| .privring = { 0x00000001, gm200_privring_new }, |
| .therm = { 0x00000001, gm200_therm_new }, |
| .timer = { 0x00000001, gk20a_timer_new }, |
| .top = { 0x00000001, gk104_top_new }, |
| .volt = { 0x00000001, gk104_volt_new }, |
| .ce = { 0x00000007, gm200_ce_new }, |
| .disp = { 0x00000001, gm200_disp_new }, |
| .dma = { 0x00000001, gf119_dma_new }, |
| .fifo = { 0x00000001, gm200_fifo_new }, |
| .gr = { 0x00000001, gm200_gr_new }, |
| .nvdec = { 0x00000001, gm107_nvdec_new }, |
| .nvenc = { 0x00000001, gm107_nvenc_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv12b_chipset = { |
| .name = "GM20B", |
| .acr = { 0x00000001, gm20b_acr_new }, |
| .bar = { 0x00000001, gm20b_bar_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .clk = { 0x00000001, gm20b_clk_new }, |
| .fb = { 0x00000001, gm20b_fb_new }, |
| .fuse = { 0x00000001, gm107_fuse_new }, |
| .imem = { 0x00000001, gk20a_instmem_new }, |
| .ltc = { 0x00000001, gm200_ltc_new }, |
| .mc = { 0x00000001, gk20a_mc_new }, |
| .mmu = { 0x00000001, gm20b_mmu_new }, |
| .pmu = { 0x00000001, gm20b_pmu_new }, |
| .privring = { 0x00000001, gk20a_privring_new }, |
| .timer = { 0x00000001, gk20a_timer_new }, |
| .top = { 0x00000001, gk104_top_new }, |
| .volt = { 0x00000001, gm20b_volt_new }, |
| .ce = { 0x00000004, gm200_ce_new }, |
| .dma = { 0x00000001, gf119_dma_new }, |
| .fifo = { 0x00000001, gm20b_fifo_new }, |
| .gr = { 0x00000001, gm20b_gr_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv130_chipset = { |
| .name = "GP100", |
| .acr = { 0x00000001, gm200_acr_new }, |
| .bar = { 0x00000001, gm107_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .devinit = { 0x00000001, gm200_devinit_new }, |
| .fault = { 0x00000001, gp100_fault_new }, |
| .fb = { 0x00000001, gp100_fb_new }, |
| .fuse = { 0x00000001, gm107_fuse_new }, |
| .gpio = { 0x00000001, gk104_gpio_new }, |
| .i2c = { 0x00000001, gm200_i2c_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gp100_ltc_new }, |
| .mc = { 0x00000001, gp100_mc_new }, |
| .mmu = { 0x00000001, gp100_mmu_new }, |
| .therm = { 0x00000001, gp100_therm_new }, |
| .pci = { 0x00000001, gp100_pci_new }, |
| .pmu = { 0x00000001, gm200_pmu_new }, |
| .privring = { 0x00000001, gm200_privring_new }, |
| .timer = { 0x00000001, gk20a_timer_new }, |
| .top = { 0x00000001, gk104_top_new }, |
| .ce = { 0x0000003f, gp100_ce_new }, |
| .dma = { 0x00000001, gf119_dma_new }, |
| .disp = { 0x00000001, gp100_disp_new }, |
| .fifo = { 0x00000001, gp100_fifo_new }, |
| .gr = { 0x00000001, gp100_gr_new }, |
| .nvdec = { 0x00000001, gm107_nvdec_new }, |
| .nvenc = { 0x00000007, gm107_nvenc_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv132_chipset = { |
| .name = "GP102", |
| .acr = { 0x00000001, gp102_acr_new }, |
| .bar = { 0x00000001, gm107_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .devinit = { 0x00000001, gm200_devinit_new }, |
| .fault = { 0x00000001, gp100_fault_new }, |
| .fb = { 0x00000001, gp102_fb_new }, |
| .fuse = { 0x00000001, gm107_fuse_new }, |
| .gpio = { 0x00000001, gk104_gpio_new }, |
| .i2c = { 0x00000001, gm200_i2c_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gp102_ltc_new }, |
| .mc = { 0x00000001, gp100_mc_new }, |
| .mmu = { 0x00000001, gp100_mmu_new }, |
| .therm = { 0x00000001, gp100_therm_new }, |
| .pci = { 0x00000001, gp100_pci_new }, |
| .pmu = { 0x00000001, gp102_pmu_new }, |
| .privring = { 0x00000001, gm200_privring_new }, |
| .timer = { 0x00000001, gk20a_timer_new }, |
| .top = { 0x00000001, gk104_top_new }, |
| .ce = { 0x0000000f, gp102_ce_new }, |
| .disp = { 0x00000001, gp102_disp_new }, |
| .dma = { 0x00000001, gf119_dma_new }, |
| .fifo = { 0x00000001, gp100_fifo_new }, |
| .gr = { 0x00000001, gp102_gr_new }, |
| .nvdec = { 0x00000001, gm107_nvdec_new }, |
| .nvenc = { 0x00000003, gm107_nvenc_new }, |
| .sec2 = { 0x00000001, gp102_sec2_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv134_chipset = { |
| .name = "GP104", |
| .acr = { 0x00000001, gp102_acr_new }, |
| .bar = { 0x00000001, gm107_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .devinit = { 0x00000001, gm200_devinit_new }, |
| .fault = { 0x00000001, gp100_fault_new }, |
| .fb = { 0x00000001, gp102_fb_new }, |
| .fuse = { 0x00000001, gm107_fuse_new }, |
| .gpio = { 0x00000001, gk104_gpio_new }, |
| .i2c = { 0x00000001, gm200_i2c_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
| .ltc = { 0x00000001, gp102_ltc_new }, |
| .mc = { 0x00000001, gp100_mc_new }, |
| .mmu = { 0x00000001, gp100_mmu_new }, |
| .therm = { 0x00000001, gp100_therm_new }, |
| .pci = { 0x00000001, gp100_pci_new }, |
| .pmu = { 0x00000001, gp102_pmu_new }, |
| .privring = { 0x00000001, gm200_privring_new }, |
| .timer = { 0x00000001, gk20a_timer_new }, |
| .top = { 0x00000001, gk104_top_new }, |
| .ce = { 0x0000000f, gp102_ce_new }, |
| .disp = { 0x00000001, gp102_disp_new }, |
| .dma = { 0x00000001, gf119_dma_new }, |
| .fifo = { 0x00000001, gp100_fifo_new }, |
| .gr = { 0x00000001, gp104_gr_new }, |
| .nvdec = { 0x00000001, gm107_nvdec_new }, |
| .nvenc = { 0x00000003, gm107_nvenc_new }, |
| .sec2 = { 0x00000001, gp102_sec2_new }, |
| .sw = { 0x00000001, gf100_sw_new }, |
| }; |
| |
| static const struct nvkm_device_chip |
| nv136_chipset = { |
| .name = "GP106", |
| .acr = { 0x00000001, gp102_acr_new }, |
| .bar = { 0x00000001, gm107_bar_new }, |
| .bios = { 0x00000001, nvkm_bios_new }, |
| .bus = { 0x00000001, gf100_bus_new }, |
| .devinit = { 0x00000001, gm200_devinit_new }, |
| .fault = { 0x00000001, gp100_fault_new }, |
| .fb = { 0x00000001, gp102_fb_new }, |
| .fuse = { 0x00000001, gm107_fuse_new }, |
| .gpio = { 0x00000001, gk104_gpio_new }, |
| .i2c = { 0x00000001, gm200_i2c_new }, |
| .imem = { 0x00000001, nv50_instmem_new }, |
|