tree a60e86b50fc682e83468a63cd639f18928af1ba4
parent e783362eb54cd99b2cac8b3a9aeac942e6f6ac07
author Dinh Nguyen <dinguyen@kernel.org> 1641512223 -0600
committer Dinh Nguyen <dinguyen@kernel.org> 1644434293 -0600

dt-bindings: usb: dwc2: add compatible "intel,socfpga-agilex-hsotg"

Add the compatible "intel,socfpga-agilex-hsotg" to the DWC2
implementation, because the Agilex DWC2 implementation does not support
clock gating.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>