commit | 7575a745f9ea12d7fdbc7cf02c862bad0a47c50f | [log] [tgz] |
---|---|---|
author | Arseny Solokha <asolokha@kb.kras.ru> | Thu Dec 07 17:20:02 2017 +0700 |
committer | Wolfram Sang <wsa@the-dreams.de> | Mon Jan 15 19:16:14 2018 +0100 |
tree | b4178fb80fbad9d04362eec15514f78ef3856f5c | |
parent | f6214f6f2b11e696a83b97f90b7a0f04efb8ec09 [diff] |
i2c: mpc: fix PORDEVSR2 mask for MPC8533/44 According to the reference manuals for the corresponding SoCs, SEC frequency ratio configuration is indicated by bit 26 of the POR Device Status Register 2. Consequently, SEC_CFG bit should be tested by mask 0x20, not 0x80. Testing the wrong bit leads to selection of wrong I2C clock prescaler on those SoCs. Signed-off-by: Arseny Solokha <asolokha@kb.kras.ru> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>