tree d373d2e53dea658a33c505278244c38bfea115a0
parent 76a4121e86649bf381aa32cb69ede913def57202
author Dan Williams <dan.j.williams@intel.com> 1652916877 -0700
committer Dan Williams <dan.j.williams@intel.com> 1652975441 -0700

cxl/mem: Validate port connectivity before dvsec ranges

In preparation for validating DVSEC ranges against the platform declared
CXL memory ranges (ACPI CFMWS) move port enumeration before the
endpoint's decoder validation. Ultimately this logic will move to the
port driver, but create a bisect point before that larger move.

Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/165291687749.1426646.18091538443879226995.stgit@dwillia2-xfh
Signed-off-by: Dan Williams <dan.j.williams@intel.com>