commit 81e499224a7ef02e1889736ebb6b432da1735ab6
author Jerry Huang <Chang-Ming.Huang@freescale.com> Mon Jan 16 14:13:03 2012 +0800
committer Chris Ball <cjb@laptop.org> Mon Feb 13 20:38:59 2012 -0500
tree ab93daf08770a47ce137cba476c0012ae241315a
parent 2c4967f741e87cdd63de7271b97807041dccbf3b

mmc: esdhc: add PIO mode support

For some FSL ESDHC controllers (e.g. P2020E, Rev1.0), the SDHC can not
work on DMA mode because of the hardware bug, so we set a broken dma flag
and use PIO mode.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Gao Guanhua <B22826@freescale.com>
Acked-by: Anton Vorontsov <cbouatmailru@gmail.com>
Signed-off-by: Chris Ball <cjb@laptop.org>

drivers/mmc/host/sdhci-pltfm.c

diff --git a/drivers/mmc/host/sdhci-pltfm.c b/drivers/mmc/host/sdhci-pltfm.c
index 03970bc..67b9ab0 100644
--- a/drivers/mmc/host/sdhci-pltfm.c
+++ b/drivers/mmc/host/sdhci-pltfm.c
@@ -2,7 +2,7 @@
  * sdhci-pltfm.c Support for SDHCI platform devices
  * Copyright (c) 2009 Intel Corporation
  *
- * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ * Copyright (c) 2007, 2011 Freescale Semiconductor, Inc.
  * Copyright (c) 2009 MontaVista Software, Inc.
  *
  * Authors: Xiaobo Xie <X.Xie@freescale.com>
@@ -71,6 +71,9 @@
 		if (sdhci_of_wp_inverted(np))
 			host->quirks |= SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
 
+		if (of_device_is_compatible(np, "fsl,p2020-rev1-esdhc"))
+			host->quirks |= SDHCI_QUIRK_BROKEN_DMA;
+
 		clk = of_get_property(np, "clock-frequency", &size);
 		if (clk && size == sizeof(*clk) && *clk)
 			pltfm_host->clock = be32_to_cpup(clk);