| commit | 88b9ae600138baff18c7f4c4870622584acc6111 | [log] [tgz] |
|---|---|---|
| author | Neil Armstrong <narmstrong@baylibre.com> | Thu Nov 26 15:16:00 2020 +0100 |
| committer | Jerome Brunet <jbrunet@baylibre.com> | Thu Nov 26 15:25:20 2020 +0100 |
| tree | dfc529c5afb2b53286e39cf891354c67d82ea50e | |
| parent | dee6ecc7c330ba471192614015f8a072b2d1bb75 [diff] |
clk: meson: g12a: add MIPI DSI Host Pixel Clock This adds the MIPI DSI Host Pixel Clock, unlike AXG, the pixel clock can be different from the VPU ENCL output clock to feed the DSI Host controller with a different clock rate. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20201126141600.2084586-3-narmstrong@baylibre.com