// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) Siemens AG, 2018-2024
 *
 * Authors:
 *   Le Jin <le.jin@siemens.com>
 *   Jan Kiszka <jan.kiszka@siemens.com>
 *
 * Common bits of the IOT2050 Basic and Advanced variants, PG1 and PG2
 */

#include <dt-bindings/leds/common.h>
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/net/ti-dp83867.h>

/ {
	aliases {
		serial0 = &wkup_uart0;
		serial1 = &mcu_uart0;
		serial2 = &main_uart0;
		serial3 = &main_uart1;
		i2c0 = &wkup_i2c0;
		i2c1 = &mcu_i2c0;
		i2c2 = &main_i2c0;
		i2c3 = &main_i2c1;
		i2c4 = &main_i2c2;
		i2c5 = &main_i2c3;
		spi0 = &mcu_spi0;
		mmc0 = &sdhci1;
		mmc1 = &sdhci0;
		ethernet1 = &icssg0_emac0;
		ethernet2 = &icssg0_emac1;
	};

	chosen {
		stdout-path = "serial3:115200n8";
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		secure_ddr: secure-ddr@9e800000 {
			reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
			alignment = <0x1000>;
			no-map;
		};

		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa0000000 0 0x100000>;
			no-map;
		};

		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa0100000 0 0xf00000>;
			no-map;
		};

		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa1000000 0 0x100000>;
			no-map;
		};

		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa1100000 0 0xf00000>;
			no-map;
		};

		rtos_ipc_memory_region: ipc-memories@a2000000 {
			reg = <0x00 0xa2000000 0x00 0x00200000>;
			alignment = <0x1000>;
			no-map;
		};

		/* To reserve the power-on(PON) reason for watchdog reset */
		wdt_reset_memory_region: wdt-memory@a2200000 {
			reg = <0x00 0xa2200000 0x00 0x1000>;
			no-map;
		};
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&leds_pins_default>;

		led-0 {
			color = <LED_COLOR_ID_RED>;
			function = LED_FUNCTION_STATUS;
			label = "status-led-red";
			gpios = <&wkup_gpio0 32 GPIO_ACTIVE_HIGH>;
			panic-indicator;
		};

		led-1 {
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_STATUS;
			label = "status-led-green";
			gpios = <&wkup_gpio0 24 GPIO_ACTIVE_HIGH>;
		};

		led-2 {
			color = <LED_COLOR_ID_RED>;
			function = LED_FUNCTION_INDICATOR;
			label = "user-led1-red";
			gpios = <&pcal9535_3 14 GPIO_ACTIVE_HIGH>;
		};

		led-3 {
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_INDICATOR;
			label = "user-led1-green";
			gpios = <&pcal9535_2 15 GPIO_ACTIVE_HIGH>;
		};

		led-4 {
			color = <LED_COLOR_ID_RED>;
			function = LED_FUNCTION_INDICATOR;
			label = "user-led2-red";
			gpios = <&wkup_gpio0 17 GPIO_ACTIVE_HIGH>;
		};

		led-5 {
			color = <LED_COLOR_ID_RED>;
			function = LED_FUNCTION_INDICATOR;
			label = "user-led2-green";
			gpios = <&wkup_gpio0 22 GPIO_ACTIVE_HIGH>;
		};
	};

	dp_refclk: clock {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <19200000>;
	};

	/* Dual Ethernet application node on PRU-ICSSG0 */
	icssg0_eth: icssg0-eth {
		compatible = "ti,am654-icssg-prueth";
		pinctrl-names = "default";
		pinctrl-0 = <&icssg0_rgmii_pins_default>;
		sram = <&msmc_ram>;

		ti,prus = <&pru0_0>, <&rtu0_0>, <&tx_pru0_0>,
			<&pru0_1>, <&rtu0_1>, <&tx_pru0_1>;
		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,      /* MII mode */
				      <2>,
				      <2>,
				      <2>,	/* MII mode */
				      <2>,
				      <2>;

		ti,mii-g-rt = <&icssg0_mii_g_rt>;
		ti,mii-rt = <&icssg0_mii_rt>;
		ti,iep = <&icssg0_iep0>,  <&icssg0_iep1>;

		interrupt-parent = <&icssg0_intc>;
		interrupts = <24 0 2>, <25 1 3>;
		interrupt-names = "tx_ts0", "tx_ts1";

		dmas = <&main_udmap 0xc100>, /* egress slice 0 */
		       <&main_udmap 0xc101>, /* egress slice 0 */
		       <&main_udmap 0xc102>, /* egress slice 0 */
		       <&main_udmap 0xc103>, /* egress slice 0 */
		       <&main_udmap 0xc104>, /* egress slice 1 */
		       <&main_udmap 0xc105>, /* egress slice 1 */
		       <&main_udmap 0xc106>, /* egress slice 1 */
		       <&main_udmap 0xc107>, /* egress slice 1 */
		       <&main_udmap 0x4100>, /* ingress slice 0 */
		       <&main_udmap 0x4101>; /* ingress slice 1 */
		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
			    "rx0", "rx1";

		ethernet-ports {
			#address-cells = <1>;
			#size-cells = <0>;
			icssg0_emac0: port@0 {
				reg = <0>;
				phy-handle = <&icssg0_eth0_phy>;
				phy-mode = "rgmii-id";
				ti,syscon-rgmii-delay = <&scm_conf 0x4100>;
				ti,half-duplex-capable;
				/* Filled in by bootloader */
				local-mac-address = [00 00 00 00 00 00];
			};

			icssg0_emac1: port@1 {
				reg = <1>;
				phy-handle = <&icssg0_eth1_phy>;
				phy-mode = "rgmii-id";
				ti,syscon-rgmii-delay = <&scm_conf 0x4104>;
				ti,half-duplex-capable;
				/* Filled in by bootloader */
				local-mac-address = [00 00 00 00 00 00];
			};
		};
	};
};

&wkup_pmx0 {
	mcu_i2c0_pins_default: mcu-i2c0-default-pins {
		pinctrl-single,pins = <
			/* (AD8) MCU_I2C0_SCL */
			AM65X_WKUP_IOPAD(0x00e8, PIN_INPUT,  0)
			/* (AD7) MCU_I2C0_SDA */
			AM65X_WKUP_IOPAD(0x00ec, PIN_INPUT,  0)
		>;
	};

	push_button_pins_default: push-button-default-pins {
		pinctrl-single,pins = <
			/* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */
			AM65X_WKUP_IOPAD(0x0034, PIN_INPUT,  7)
		>;
	};

	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
		pinctrl-single,pins = <
			/* (V1) MCU_OSPI0_CLK */
			AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0)
			/* (U2) MCU_OSPI0_DQS */
			AM65X_WKUP_IOPAD(0x0008, PIN_INPUT,  0)
			/* (U4) MCU_OSPI0_D0 */
			AM65X_WKUP_IOPAD(0x000c, PIN_INPUT,  0)
			/* (U5) MCU_OSPI0_D1 */
			AM65X_WKUP_IOPAD(0x0010, PIN_INPUT,  0)
			/* (R4) MCU_OSPI0_CSn0 */
			AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0)
		>;
	};

	db9_com_mode_pins_default: db9-com-mode-default-pins {
		pinctrl-single,pins = <
			/* (AD3) WKUP_GPIO0_5, used as uart0 mode 0 */
			AM65X_WKUP_IOPAD(0x00c4, PIN_OUTPUT, 7)
			/* (AC3) WKUP_GPIO0_4, used as uart0 mode 1 */
			AM65X_WKUP_IOPAD(0x00c0, PIN_OUTPUT, 7)
			/* (AC1) WKUP_GPIO0_7, used as uart0 term */
			AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 7)
			/* (AC2) WKUP_GPIO0_6, used as uart0 en */
			AM65X_WKUP_IOPAD(0x00c8, PIN_OUTPUT, 7)
		>;
	};

	leds_pins_default: leds-default-pins {
		pinctrl-single,pins = <
			/* (T2) WKUP_GPIO0_17, used as user led1 red */
			AM65X_WKUP_IOPAD(0x0014, PIN_OUTPUT, 7)
			/* (R3) WKUP_GPIO0_22, used as user led1 green */
			AM65X_WKUP_IOPAD(0x0028, PIN_OUTPUT, 7)
			/* (R5) WKUP_GPIO0_24, used as status led red */
			AM65X_WKUP_IOPAD(0x0030, PIN_OUTPUT, 7)
			/* (N2) WKUP_GPIO0_32, used as status led green */
			AM65X_WKUP_IOPAD(0x0050, PIN_OUTPUT, 7)
		>;
	};

	mcu_spi0_pins_default: mcu-spi0-default-pins {
		pinctrl-single,pins = <
			/* (Y1) MCU_SPI0_CLK */
			AM65X_WKUP_IOPAD(0x0090, PIN_INPUT,  0)
			/* (Y3) MCU_SPI0_D0 */
			AM65X_WKUP_IOPAD(0x0094, PIN_INPUT,  0)
			/* (Y2) MCU_SPI0_D1 */
			AM65X_WKUP_IOPAD(0x0098, PIN_INPUT,  0)
			/* (Y4) MCU_SPI0_CS0 */
			AM65X_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0)
		>;
	};

	minipcie_pins_default: minipcie-default-pins {
		pinctrl-single,pins = <
			/* (P2) MCU_OSPI1_DQS.WKUP_GPIO0_27 */
			AM65X_WKUP_IOPAD(0x003C, PIN_OUTPUT, 7)
		>;
	};
};

&main_pmx0 {
	main_pcie_enable_pins_default: main-pcie-enable-default-pins {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01c4, PIN_INPUT_PULLUP, 7)  /* (AH13) GPIO1_17 */
		>;
	};

	main_uart1_pins_default: main-uart1-default-pins {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0174, PIN_INPUT,  6)  /* (AE23) UART1_RXD */
			AM65X_IOPAD(0x014c, PIN_OUTPUT, 6)  /* (AD23) UART1_TXD */
			AM65X_IOPAD(0x0178, PIN_INPUT,  6)  /* (AD22) UART1_CTSn */
			AM65X_IOPAD(0x017c, PIN_OUTPUT, 6)  /* (AC21) UART1_RTSn */
		>;
	};

	main_i2c3_pins_default: main-i2c3-default-pins {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01c0, PIN_INPUT,  2)  /* (AF13) I2C3_SCL */
			AM65X_IOPAD(0x01d4, PIN_INPUT,  2)  /* (AG12) I2C3_SDA */
		>;
	};

	main_mmc1_pins_default: main-mmc1-default-pins {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0)  /* (C27) MMC1_CLK */
			AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP,   0)  /* (C28) MMC1_CMD */
			AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP,   0)  /* (D28) MMC1_DAT0 */
			AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP,   0)  /* (E27) MMC1_DAT1 */
			AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP,   0)  /* (D26) MMC1_DAT2 */
			AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP,   0)  /* (D27) MMC1_DAT3 */
			AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP,   0)  /* (B24) MMC1_SDCD */
			AM65X_IOPAD(0x02e0, PIN_INPUT_PULLUP,   0)  /* (C24) MMC1_SDWP */
		>;
	};

	usb0_pins_default: usb0-default-pins {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0)  /* (AD9) USB0_DRVVBUS */
		>;
	};

	usb1_pins_default: usb1-default-pins {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0)  /* (AC8) USB1_DRVVBUS */
		>;
	};

	main_i2c2_pins_default: main-i2c2-default-pins {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0074, PIN_INPUT,  5)  /* (T27) I2C2_SCL */
			AM65X_IOPAD(0x0070, PIN_INPUT,  5)  /* (R25) I2C2_SDA */
		>;
	};

	icssg0_mdio_pins_default: icssg0-mdio-default-pins {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0294, PIN_INPUT, 0) /* (AE26) PRG0_MDIO0_MDIO */
			AM65X_IOPAD(0x0298, PIN_OUTPUT, 0) /* (AE28) PRG0_MDIO0_MDC */
		>;
	};

	icssg0_rgmii_pins_default: icssg0-rgmii-default-pins {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0244, PIN_INPUT, 2) /* (AB28) PRG0_PRU1_GPO0.PRG0_RGMII2_RD0 */
			AM65X_IOPAD(0x0248, PIN_INPUT, 2) /* (AC28) PRG0_PRU1_GPO1.PRG0_RGMII2_RD1 */
			AM65X_IOPAD(0x024c, PIN_INPUT, 2) /* (AC27) PRG0_PRU1_GPO2.PRG0_RGMII2_RD2 */
			AM65X_IOPAD(0x0250, PIN_INPUT, 2) /* (AB26) PRG0_PRU1_GPO3.PRG0_RGMII2_RD3 */
			AM65X_IOPAD(0x0274, PIN_OUTPUT, 2) /* (AC25) PRG0_PRU1_GPO12.PRG0_RGMII2_TD0 */
			AM65X_IOPAD(0x0278, PIN_OUTPUT, 2) /* (AD25) PRG0_PRU1_GPO13.PRG0_RGMII2_TD1 */
			AM65X_IOPAD(0x027c, PIN_OUTPUT, 2) /* (AD24) PRG0_PRU1_GPO14.PRG0_RGMII2_TD2 */
			AM65X_IOPAD(0x0280, PIN_OUTPUT, 2) /* (AE27) PRG0_PRU1_GPO15.PRG0_RGMII2_TD3 */
			AM65X_IOPAD(0x0284, PIN_INPUT, 2) /* (AC24) PRG0_PRU1_GPO16.PRG0_RGMII2_TXC */
			AM65X_IOPAD(0x0270, PIN_OUTPUT, 2) /* (AB24) PRG0_PRU1_GPO11.PRG0_RGMII2_TX_CTL */
			AM65X_IOPAD(0x025c, PIN_INPUT, 2) /* (AB27) PRG0_PRU1_GPO6.PRG0_RGMII2_RXC */
			AM65X_IOPAD(0x0254, PIN_INPUT, 2) /* (AA25) PRG0_PRU1_GPO4.PRG0_RGMII2_RX_CTL */

			AM65X_IOPAD(0x01f4, PIN_INPUT, 2) /* (V24) PRG0_PRU0_GPO0.PRG0_RGMII1_RD0 */
			AM65X_IOPAD(0x01f8, PIN_INPUT, 2) /* (W25) PRG0_PRU0_GPO1.PRG0_RGMII1_RD1 */
			AM65X_IOPAD(0x01fc, PIN_INPUT, 2) /* (W24) PRG0_PRU0_GPO2.PRG0_RGMII1_RD2 */
			AM65X_IOPAD(0x0200, PIN_INPUT, 2) /* (AA27) PRG0_PRU0_GPO3.PRG0_RGMII1_RD3 */
			AM65X_IOPAD(0x0224, PIN_OUTPUT, 2) /* (AD27) PRG0_PRU0_GPO12.PRG0_RGMII1_TD0 */
			AM65X_IOPAD(0x0228, PIN_OUTPUT, 2) /* (AC26) PRG0_PRU0_GPO13.PRG0_RGMII1_TD1 */
			AM65X_IOPAD(0x022c, PIN_OUTPUT, 2) /* (AD26) PRG0_PRU0_GPO14.PRG0_RGMII1_TD2 */
			AM65X_IOPAD(0x0230, PIN_OUTPUT, 2) /* (AA24) PRG0_PRU0_GPO15.PRG0_RGMII1_TD3 */
			AM65X_IOPAD(0x0234, PIN_INPUT, 2) /* (AD28) PRG0_PRU0_GPO16.PRG0_RGMII1_TXC */
			AM65X_IOPAD(0x0220, PIN_OUTPUT, 2) /* (AB25) PRG0_PRU0_GPO11.PRG0_RGMII1_TX_CTL */
			AM65X_IOPAD(0x020c, PIN_INPUT, 2) /* (Y25) PRG0_PRU0_GPO6.PRG0_RGMII1_RXC */
			AM65X_IOPAD(0x0204, PIN_INPUT, 2) /* (Y24) PRG0_PRU0_GPO4.PRG0_RGMII1_RX_CTL */
		>;
	};
};

&main_pmx1 {
	main_i2c0_pins_default: main-i2c0-default-pins {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0000, PIN_INPUT,  0)  /* (D20) I2C0_SCL */
			AM65X_IOPAD(0x0004, PIN_INPUT,  0)  /* (C21) I2C0_SDA */
		>;
	};

	main_i2c1_pins_default: main-i2c1-default-pins {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0008, PIN_INPUT,  0)  /* (B21) I2C1_SCL */
			AM65X_IOPAD(0x000c, PIN_INPUT,  0)  /* (E21) I2C1_SDA */
		>;
	};
};

&wkup_uart0 {
	/* Wakeup UART is used by System firmware */
	status = "reserved";
};

&main_uart1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart1_pins_default>;
};

&main_gpio1 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_pcie_enable_pins_default>;
};

&mcu_i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_i2c0_pins_default>;
	clock-frequency = <400000>;

	psu: regulator@60 {
		compatible = "ti,tps62363";
		reg = <0x60>;
		regulator-name = "tps62363-vout";
		regulator-min-microvolt = <500000>;
		regulator-max-microvolt = <1500000>;
		regulator-boot-on;
		ti,vsel0-state-high;
		ti,vsel1-state-high;
		ti,enable-vout-discharge;
	};
};

&main_i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c0_pins_default>;
	clock-frequency = <400000>;

	rtc: rtc@51 {
		compatible = "nxp,pcf8563";
		reg = <0x51>;
	};

	eeprom: eeprom@54 {
		compatible = "atmel,24c08";
		reg = <0x54>;
		pagesize = <16>;
	};
};

&main_i2c1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c1_pins_default>;
	clock-frequency = <400000>;
};

&main_i2c2 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c2_pins_default>;
	clock-frequency = <400000>;
};

&main_i2c3 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c3_pins_default>;
	clock-frequency = <400000>;

	#address-cells = <1>;
	#size-cells = <0>;
};

&mcu_cpsw {
	status = "disabled";
};

&sdhci1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_mmc1_pins_default>;
	ti,driver-strength-ohm = <50>;
	disable-wp;
};

&usb0 {
	pinctrl-names = "default";
	pinctrl-0 = <&usb0_pins_default>;
	dr_mode = "host";
};

&usb1 {
	pinctrl-names = "default";
	pinctrl-0 = <&usb1_pins_default>;
	dr_mode = "host";
};

&mcu_spi0 {
	status = "okay";
	#address-cells = <1>;
	#size-cells = <0>;
	ti,pindir-d0-out-d1-in;
};

&ospi0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0x0>;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <1>;
		spi-max-frequency = <50000000>;
		cdns,tshsl-ns = <60>;
		cdns,tsd2d-ns = <60>;
		cdns,tchsh-ns = <60>;
		cdns,tslch-ns = <60>;
		cdns,read-delay = <2>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			seboot@0 {
				label = "seboot";
				reg = <0x0 0x180000>; /* 1.5M */
			};

			tispl@180000 {
				label = "tispl";
				reg = <0x180000 0x200000>; /* 2M */
			};

			u-boot@380000 {
				label = "u-boot";
				reg = <0x380000 0x300000>; /* 3M */
			};

			env@680000 {
				label = "env";
				reg = <0x680000 0x20000>; /* 128K */
			};

			env-backup@6a0000 {
				label = "env.backup";
				reg = <0x6a0000 0x20000>; /* 128K */
			};

			otpcmd@6c0000 {
				label = "otpcmd";
				reg = <0x6c0000 0x10000>; /* 64K */
			};

			unused@6d0000 {
				label = "unused";
				reg = <0x6d0000 0x7b0000>; /* 7872K */
			};

			seboot-backup@e80000 {
				label = "seboot.backup";
				reg = <0xe80000 0x180000>; /* 1.5M */
			};
		};
	};
};

&pcie1_rc {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&minipcie_pins_default>;

	num-lanes = <1>;
	phys = <&serdes1 PHY_TYPE_PCIE 0>;
	phy-names = "pcie-phy0";
	reset-gpios = <&wkup_gpio0 27 GPIO_ACTIVE_HIGH>;
};

&mailbox0_cluster0 {
	status = "okay";
	interrupts = <436>;

	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
		ti,mbox-tx = <1 0 0>;
		ti,mbox-rx = <0 0 0>;
	};
};

&mailbox0_cluster1 {
	status = "okay";
	interrupts = <432>;

	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
		ti,mbox-tx = <1 0 0>;
		ti,mbox-rx = <0 0 0>;
	};
};

&mcu_r5fss0_core0 {
	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
			<&mcu_r5fss0_core0_memory_region>;
	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
};

&mcu_r5fss0_core1 {
	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
			<&mcu_r5fss0_core1_memory_region>;
	mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
};

&mcu_rti1 {
	memory-region = <&wdt_reset_memory_region>;
};

&icssg0_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg0_mdio_pins_default>;

	icssg0_eth0_phy: ethernet-phy@0 {
		reg = <0>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};

	icssg0_eth1_phy: ethernet-phy@1 {
		reg = <1>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};