8eb060e10185cfc97ef0200d197ec246ba0f9f8c - linux

commit	8eb060e10185cfc97ef0200d197ec246ba0f9f8c	[log] [tgz]
author	Dao Lu <daolu@rivosinc.com>	Mon Jun 20 13:15:25 2022 -0700
committer	Palmer Dabbelt <palmer@rivosinc.com>	Thu Aug 11 08:03:49 2022 -0700
tree	5d72c5ef54b14b6b84b202ceae056cb401cf4284
parent	3aefb2ee5bdd4a8976298415a5a017bf9844bfd5 [diff]

arch/riscv: add Zihintpause support

Implement support for the ZiHintPause extension.

The PAUSE instruction is a HINT that indicates the current hart’s rate
of instruction retirement should be temporarily reduced or paused.

Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Dao Lu <daolu@rivosinc.com>
[Palmer: Some minor merge conflicts.]
Link: https://lore.kernel.org/all/20220620201530.3929352-1-daolu@rivosinc.com/
Link: https://lore.kernel.org/all/20220811053356.17375-1-palmer@rivosinc.com/
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

arch/riscv/Makefile[diff]
arch/riscv/include/asm/hwcap.h[diff]
arch/riscv/include/asm/vdso/processor.h[diff]
arch/riscv/kernel/cpu.c[diff]
arch/riscv/kernel/cpufeature.c[diff]

5 files changed

tree: 5d72c5ef54b14b6b84b202ceae056cb401cf4284