tree 3cbf9723124a52478c2cb424abf1705a5d0240e0
parent 86a612349fa58467cd63b30748114ec377d61807
author Stephen Boyd <sboyd@codeaurora.org> 1395875196 -0700
committer Mike Turquette <mturquette@linaro.org> 1398883908 -0700

clk: Consolidate recalc rate logic

The same if-else statement exists four times to recalculate the
rate of a clock. Consolidate this logic into a single function to
save some lines.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>