| commit | 900c33e86e4b53e96e6ea10e9737870e03911a66 | [log] [tgz] |
|---|---|---|
| author | Sakari Ailus <sakari.ailus@linux.intel.com> | Tue Aug 25 00:06:26 2020 +0200 |
| committer | Mauro Carvalho Chehab <mchehab+huawei@kernel.org> | Mon Dec 07 17:03:56 2020 +0100 |
| tree | 8dff709510edc0705b6368f05058a6fccf46cf94 | |
| parent | b41f270841f85b9b4f8530b9f2020ff3ba1cfec5 [diff] |
media: ccs-pll: Add support for DDR OP system and pixel clocks Add support for dual data rate operational system and pixel clocks. This is implemented using two PLL flags. Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>