| commit | 95105a998dff0747327f11708ea24480ee0eca54 | [log] [tgz] |
|---|---|---|
| author | Gregory Herrero <gregory.herrero@intel.com> | Fri Nov 20 11:49:29 2015 +0100 |
| committer | Felipe Balbi <balbi@ti.com> | Tue Dec 15 09:12:41 2015 -0600 |
| tree | c634437396d62b1672f56b6a1f884374a4980271 | |
| parent | fbb9e22b15ad3c9a98c66bad801b4d1366e8bf20 [diff] |
usb: dwc2: host: avoid usage of dma_alloc_coherent with irqs disabled Use Streaming DMA mappings to handle cache coherency of frame list and descriptor list. Cache are always flushed before controller access it or before cpu access it. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Gregory Herrero <gregory.herrero@intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>