| Broadcom Northstar pins mux controller |
| Some of Northstar SoCs's pins can be used for various purposes thanks to the mux |
| controller. This binding allows describing mux controller and listing available |
| functions. They can be referenced later by other bindings to let system |
| configure controller correctly. |
| A list of pins varies across chipsets so few bindings are available. |
| Node of the pinmux must be nested in the CRU (Central Resource Unit) "syscon" |
| - compatible: must be one of: |
| - offset: offset of pin registers in the CRU block |
| Functions and their groups available for all chipsets: |
| - "pwm": "pwm0_grp", "pwm1_grp", "pwm2_grp", "pwm3_grp" |
| Additionally available on BCM4709 and BCM53012: |
| - "sdio": "sdio_pwr_grp", "sdio_1p8v_grp" |
| For documentation of subnodes see: |
| Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt |
| compatible = "simple-bus"; |
| ranges = <0 0x1800c000 0x1000>; |
| compatible = "syscon", "simple-mfd"; |
| compatible = "brcm,bcm4708-pinmux"; |